The connectivity routine would consider symbols, overwriting unused
subgraphs for pins that were not in the change list. This is resolved
by updating the full connectivity to only use pins in the graph since
symbols are not connected independently.
In the process of adding QA tests for this change, additional issues
with the schematic QA were discovered. Specifically, we were not
properly setting the root sheet UUID. This was partially masked by a
const_cast setting of the RefDes in sch_symbol when called the RefDes
getter. This exposed the fact that our QA ERC numbers did not match the
schematic editor stand alone ERC numbers. So the test value for one
check needed to be updated
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17528
When we add vertices to the tesselation routines, we cannot reuse these
without the original vertex points.
It may be possible to copy and modify the vertices from the hint data so
that they are properly positioned but naive attempts (moving based on
first point) did not work, so for now, we disable the hint cache when
the vertex sizes do not match as this prevents OOB access
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17621
Polygon intersections happen against the original outline, not against
the currently remaining polygon. This avoids pathalogical cases
Adds new simplification system to avoid duplicated points
Adds new edge-splitting algorithm to provide additional fall-back
Verifies that polygon cuts do not swap holes for outlines (negative
area)
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17559
The clearance between two zones could be rather slow. This was in part
to trying to do triangle-triangle collisions between zones when we only
need outline collision and in part to the shape_line_chain collision
routine. The shape_line_chain collisions don't need to recreate
segments on each iteration and should instead create them once and using
this to check all collisions
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17327
These need to be re-done in a way that is more
tolerant of the inherent instability/noise in
the simulated circuits (or more ideally, changed
to test a particular thing that can be more
well-defined rather than just simulating a circuit
and seeing if the numbers come out a certain way)