Commit Graph

2 Commits

Author SHA1 Message Date
Mikolaj Wielgus 484620eeb5 Sim QA: Add test for VDMOS 2022-11-29 09:48:01 +01:00
Mikolaj Wielgus 6984f63af8 Sim: Transmission line models
Implement transmission line models and perform some adjustments to
the current models. Add some QA tests.
2022-07-30 02:25:34 +00:00