Headings:

1 - Presentation

1.1 - Description

1.2 - Principal Design features

1.3 - Remark

Presentation

Description

PCBNEW is a powerful printed circuit board program, available for both the LINUX and WINDOWS operating systems.

It is used in association with the schematic capture software program EESCHEMA, which provides the Netlist file - this describes the electrical connections of the PCB to design.

A second program CVPCB is used to assign each component in the Netlist produced by EESCHEMA, to a module that is used by PCBNEW. This can be done either interactively or automatically using equivalence files.

PCBNEW manages libraries of modules. Each module is a drawing of the physical component including its footprint - the layout of pads providing connections to the component. The required modules are automatically loaded during the reading of the Netlist produced by CVPCB.

PCBNEW integrates, automatically and immediately, any circuit modification, by removal of any erroneous tracks, addition of the new components, or by modifying any value (and under certain conditions any reference) of the old or new modules, according to the electrical connections appearing in the scheme.

PCBNEW provides a rats nest display, a hairline connecting the pads of modules which are connected on the schematic. These connections move dynamically as track and module movements are made.

PCBNEW has an active Design Rules Check (DRC) which automatically indicates any error of track layout in real time.

PCBNEW can automatically generate a copper plane, with or without thermal breaks on the pads.

PCBNEW has a simple but effective autorouter to assist in the production of the circuit.

PCBNEW provides options specifically for the production of ultra high frequency circuits (such as pads of trapezoidal and complex form, automatic layout of coils on the printed circuit…).

PCBNEW displays the elements (tracks, pads, texts, drawings…) as actual size and according to personal preferences:

display in full or outline

display of the track/pad clearance…

Principal Design features

PCBNEW has an internal resolution of 1/10000 inch.

PCBNEW works on 16 layers of copper, plus 12 technical layers (silk screen, solder mask, component adhesive, solder paste, drawings and comments…) and manages in real time the hairline indication (rats nest) of missing tracks.
The display of the PCB elements (tracks, pads, text, drawings…) can be customised:

In full or outline.

With or without track clearance.

by hiding certain elements (copper layers, technical layers, zones of copper, modules...), which is useful for high density multi-layer circuits

For the complex circuits, the display of layers, zones, components can be removed in a selective way for a better legibility of the screen.

Modules can be rotated to any angle, with a margin of 0,1 degree.

Pads can be round, rectangular, oval or trapezoidal (the latter is necessary for the production of ultra high frequency circuits). In addition several basic pads can be grouped.

Both the size of each pad, and the layers where they appear, can be adjusted.

The drilling of holes can be offset.

PCBNEW can automatically generate a copper plane, with automatic generation of thermal breaks around the pads concerned.

The Module Editor can be accessed from the PCBNEW toolbar. The Editor allows creation or modification of a module from the PCB or a library and then saved to either. A module saved to the PCB can be subsequently saved to a library. In addition all modules on the PCB can be saved to a library by creating a footprint archive.

PCBNEW generates in an extremely simple way all the documents necessary:

Files for Photoplotters in GERBER format

Files for drilling in EXCELLON format and plans of drilling

Files for tracing and drilling in HPGL format

Files for tracing and drilling in POSTSCRIPT format

Local Printout.

Remark

PCBNEW requires a 3 button mouse (the 3rd button is not strictly necessary, but extremely useful for many commands).

Finally it should be noted that the diagrammatic tool EESchema and CVPCB are needed to create the required netlists.

PCBNEW: Presentation.

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Keith Cockburn

2005-06-13T12:16:17

Keith Cockburn