270 lines
9.0 KiB
C++
270 lines
9.0 KiB
C++
/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2004-2022 KiCad Developers.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include <common.h>
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#include <board.h>
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#include <footprint.h>
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#include <pcb_shape.h>
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#include <pcb_track.h>
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#include <pad.h>
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#include <geometry/shape_segment.h>
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#include <geometry/seg.h>
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#include <drc/drc_engine.h>
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#include <drc/drc_item.h>
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#include <drc/drc_rule.h>
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#include <drc/drc_test_provider_clearance_base.h>
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#include <drc/drc_rtree.h>
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/*
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Silk to silk clearance test. Check all silkscreen features against each other.
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Errors generated:
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- DRCE_OVERLAPPING_SILK
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*/
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class DRC_TEST_PROVIDER_SILK_CLEARANCE : public DRC_TEST_PROVIDER
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{
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public:
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DRC_TEST_PROVIDER_SILK_CLEARANCE ():
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m_board( nullptr ),
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m_largestClearance( 0 )
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{
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}
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virtual ~DRC_TEST_PROVIDER_SILK_CLEARANCE()
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{
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}
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virtual bool Run() override;
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virtual const wxString GetName() const override
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{
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return wxT( "silk_clearance" );
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};
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virtual const wxString GetDescription() const override
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{
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return wxT( "Tests for overlapping silkscreen features." );
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}
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private:
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BOARD* m_board;
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int m_largestClearance;
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};
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bool DRC_TEST_PROVIDER_SILK_CLEARANCE::Run()
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{
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const int progressDelta = 500;
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if( m_drcEngine->IsErrorLimitExceeded( DRCE_OVERLAPPING_SILK ) )
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{
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reportAux( wxT( "Overlapping silk violations ignored. Tests not run." ) );
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return true; // continue with other tests
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}
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m_board = m_drcEngine->GetBoard();
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DRC_CONSTRAINT worstClearanceConstraint;
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m_largestClearance = 0;
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if( m_drcEngine->QueryWorstConstraint( SILK_CLEARANCE_CONSTRAINT, worstClearanceConstraint ) )
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m_largestClearance = worstClearanceConstraint.m_Value.Min();
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reportAux( wxT( "Worst clearance : %d nm" ), m_largestClearance );
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if( !reportPhase( _( "Checking silkscreen for overlapping items..." ) ) )
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return false; // DRC cancelled
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DRC_RTREE silkTree;
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DRC_RTREE targetTree;
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int ii = 0;
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int items = 0;
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auto countItems =
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[&]( BOARD_ITEM* item ) -> bool
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{
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++items;
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return true;
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};
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auto addToSilkTree =
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[&]( BOARD_ITEM* item ) -> bool
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{
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if( !reportProgress( ii++, items, progressDelta ) )
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return false;
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for( PCB_LAYER_ID layer : { F_SilkS, B_SilkS } )
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{
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if( item->IsOnLayer( layer ) )
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silkTree.Insert( item, layer );
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}
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return true;
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};
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auto addToTargetTree =
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[&]( BOARD_ITEM* item ) -> bool
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{
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if( !reportProgress( ii++, items, progressDelta ) )
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return false;
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for( PCB_LAYER_ID layer : item->GetLayerSet().Seq() )
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targetTree.Insert( item, layer );
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return true;
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};
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forEachGeometryItem( s_allBasicItems, LSET( 2, F_SilkS, B_SilkS ), countItems );
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forEachGeometryItem( s_allBasicItems,
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LSET::FrontMask() | LSET::BackMask() | LSET( 2, Edge_Cuts, Margin ),
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countItems );
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forEachGeometryItem( s_allBasicItems, LSET( 2, F_SilkS, B_SilkS ), addToSilkTree );
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forEachGeometryItem( s_allBasicItems,
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LSET::FrontMask() | LSET::BackMask() | LSET( 2, Edge_Cuts, Margin ),
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addToTargetTree );
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reportAux( wxT( "Testing %d silkscreen features against %d board items." ),
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silkTree.size(),
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targetTree.size() );
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const std::vector<DRC_RTREE::LAYER_PAIR> layerPairs =
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{
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DRC_RTREE::LAYER_PAIR( F_SilkS, F_SilkS ),
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DRC_RTREE::LAYER_PAIR( F_SilkS, F_Mask ),
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DRC_RTREE::LAYER_PAIR( F_SilkS, F_Adhes ),
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DRC_RTREE::LAYER_PAIR( F_SilkS, F_Paste ),
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DRC_RTREE::LAYER_PAIR( F_SilkS, F_CrtYd ),
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DRC_RTREE::LAYER_PAIR( F_SilkS, F_Fab ),
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DRC_RTREE::LAYER_PAIR( F_SilkS, F_Cu ),
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DRC_RTREE::LAYER_PAIR( F_SilkS, Edge_Cuts ),
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DRC_RTREE::LAYER_PAIR( F_SilkS, Margin ),
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DRC_RTREE::LAYER_PAIR( B_SilkS, B_SilkS ),
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DRC_RTREE::LAYER_PAIR( B_SilkS, B_Mask ),
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DRC_RTREE::LAYER_PAIR( B_SilkS, B_Adhes ),
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DRC_RTREE::LAYER_PAIR( B_SilkS, B_Paste ),
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DRC_RTREE::LAYER_PAIR( B_SilkS, B_CrtYd ),
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DRC_RTREE::LAYER_PAIR( B_SilkS, B_Fab ),
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DRC_RTREE::LAYER_PAIR( B_SilkS, B_Cu ),
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DRC_RTREE::LAYER_PAIR( B_SilkS, Edge_Cuts ),
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DRC_RTREE::LAYER_PAIR( B_SilkS, Margin )
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};
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targetTree.QueryCollidingPairs( &silkTree, layerPairs,
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[&]( const DRC_RTREE::LAYER_PAIR& aLayers, DRC_RTREE::ITEM_WITH_SHAPE* aRefItemShape,
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DRC_RTREE::ITEM_WITH_SHAPE* aTestItemShape, bool* aCollisionDetected ) -> bool
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{
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BOARD_ITEM* refItem = aRefItemShape->parent;
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const SHAPE* refShape = aRefItemShape->shape;
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BOARD_ITEM* testItem = aTestItemShape->parent;
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const SHAPE* testShape = aTestItemShape->shape;
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std::shared_ptr<SHAPE> hole;
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if( m_drcEngine->IsErrorLimitExceeded( DRCE_OVERLAPPING_SILK ) )
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return false;
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if( isInvisibleText( refItem ) || isInvisibleText( testItem ) )
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return true;
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if( testItem->IsTented() )
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{
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if( testItem->HasHole() )
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{
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hole = testItem->GetEffectiveHoleShape();
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testShape = hole.get();
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}
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else
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{
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return true;
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}
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}
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DRC_CONSTRAINT constraint = m_drcEngine->EvalRules( SILK_CLEARANCE_CONSTRAINT,
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refItem, testItem,
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aLayers.second );
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if( constraint.IsNull() || constraint.GetSeverity() == RPT_SEVERITY_IGNORE )
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return true;
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int minClearance = constraint.GetValue().Min();
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if( minClearance < 0 )
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return true;
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int actual;
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VECTOR2I pos;
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// Graphics are often compound shapes so ignore collisions between shapes in a
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// single footprint or on the board (both parent footprints will be nullptr).
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if( refItem->Type() == PCB_SHAPE_T && testItem->Type() == PCB_SHAPE_T
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&& refItem->GetParentFootprint() == testItem->GetParentFootprint() )
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{
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return true;
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}
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if( refShape->Collide( testShape, minClearance, &actual, &pos ) )
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{
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std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_OVERLAPPING_SILK );
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if( minClearance > 0 )
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{
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wxString msg = formatMsg( _( "(%s clearance %s; actual %s)" ),
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constraint.GetParentRule()->m_Name,
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minClearance,
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actual );
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drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + msg );
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}
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drcItem->SetItems( refItem, testItem );
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drcItem->SetViolatingRule( constraint.GetParentRule() );
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reportViolation( drcItem, pos, aLayers.second );
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*aCollisionDetected = true;
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}
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return true;
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},
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m_largestClearance,
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[&]( int aCount, int aSize ) -> bool
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{
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return reportProgress( aCount, aSize, progressDelta );
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} );
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reportRuleStatistics();
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return !m_drcEngine->IsCancelled();
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}
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namespace detail
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{
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static DRC_REGISTER_TEST_PROVIDER<DRC_TEST_PROVIDER_SILK_CLEARANCE> dummy;
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}
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