941 lines
28 KiB
C++
941 lines
28 KiB
C++
/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2007, 2008 Lubo Racko <developer@lura.sk>
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* Copyright (C) 2007, 2008, 2012-2013 Alexander Lunev <al.lunev@yahoo.com>
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* Copyright (C) 2012 KiCad Developers, see CHANGELOG.TXT for contributors.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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/**
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* @file pcb.cpp
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*/
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#include <wx/wx.h>
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#include <wx/config.h>
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#include <common.h>
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#include <pcb.h>
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#include <pcb_arc.h>
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#include <pcb_copper_pour.h>
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#include <pcb_cutout.h>
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#include <pcb_keepout.h>
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#include <pcb_line.h>
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#include <pcb_module.h>
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#include <pcb_pad_shape.h>
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#include <pcb_via_shape.h>
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#include <pcb_pad.h>
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#include <pcb_text.h>
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#include <pcb_via.h>
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#include <s_expr_loader.h>
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namespace PCAD2KICAD {
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PCB_LAYER_ID PCB::GetKiCadLayer( int aPCadLayer )
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{
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wxASSERT( aPCadLayer >= 0 && aPCadLayer < MAX_PCAD_LAYER_QTY );
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return m_layersMap[aPCadLayer].KiCadLayer;
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}
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LAYER_TYPE_T PCB::GetLayerType( int aPCadLayer )
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{
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wxASSERT( aPCadLayer >= 0 && aPCadLayer < MAX_PCAD_LAYER_QTY );
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return m_layersMap[aPCadLayer].layerType;
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}
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wxString PCB::GetLayerNetNameRef( int aPCadLayer )
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{
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wxASSERT( aPCadLayer >= 0 && aPCadLayer < MAX_PCAD_LAYER_QTY );
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return m_layersMap[aPCadLayer].netNameRef;
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}
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PCB::PCB( BOARD* aBoard ) : PCB_MODULE( this, aBoard )
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{
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int i;
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m_defaultMeasurementUnit = wxT( "mil" );
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for( i = 0; i < MAX_PCAD_LAYER_QTY; i++ )
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{
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m_layersMap[i].KiCadLayer = F_Mask; // default
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m_layersMap[i].layerType = LAYER_TYPE_NONSIGNAL; // default
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m_layersMap[i].netNameRef = wxT( "" ); // default
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}
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m_sizeX = 0;
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m_sizeY = 0;
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m_layersMap[1].KiCadLayer = F_Cu;
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m_layersMap[1].layerType = LAYER_TYPE_SIGNAL;
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m_layersMap[2].KiCadLayer = B_Cu;
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m_layersMap[2].layerType = LAYER_TYPE_SIGNAL;
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m_layersMap[3].KiCadLayer = Eco2_User;
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m_layersMap[6].KiCadLayer = F_SilkS;
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m_layersMap[7].KiCadLayer = B_SilkS;
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m_timestamp_cnt = 0x10000000;
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}
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PCB::~PCB()
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{
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int i;
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for( i = 0; i < (int) m_pcbComponents.GetCount(); i++ )
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{
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delete m_pcbComponents[i];
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}
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for( i = 0; i < (int) m_pcbNetlist.GetCount(); i++ )
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{
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delete m_pcbNetlist[i];
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}
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}
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int PCB::GetNewTimestamp()
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{
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return m_timestamp_cnt++;
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}
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int PCB::GetNetCode( wxString aNetName )
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{
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PCB_NET* net;
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for( int i = 0; i < (int) m_pcbNetlist.GetCount(); i++ )
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{
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net = m_pcbNetlist[i];
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if( net->m_name == aNetName )
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{
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return net->m_netCode;
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}
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}
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return 0;
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}
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XNODE* PCB::FindCompDefName( XNODE* aNode, const wxString& aName )
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{
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XNODE* result = NULL, * lNode;
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wxString propValue;
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lNode = FindNode( aNode, wxT( "compDef" ) );
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while( lNode )
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{
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if( lNode->GetName() == wxT( "compDef" ) )
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{
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lNode->GetAttribute( wxT( "Name" ), &propValue );
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if( propValue == aName )
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{
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result = lNode;
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lNode = NULL;
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}
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}
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if( lNode )
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lNode = lNode->GetNext();
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}
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return result;
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}
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void PCB::SetTextProperty( XNODE* aNode, TTEXTVALUE* aTextValue,
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const wxString& aPatGraphRefName,
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const wxString& aXmlName,
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const wxString& aActualConversion )
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{
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XNODE* tNode, * t1Node;
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wxString n, nnew, pn, propValue, str;
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// aNode is pattern now
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tNode = aNode;
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t1Node = aNode;
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n = aXmlName;
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// new file format version
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if( FindNode( tNode, wxT( "patternGraphicsNameRef" ) ) )
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{
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FindNode( tNode,
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wxT( "patternGraphicsNameRef" ) )->GetAttribute( wxT( "Name" ),
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&pn );
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pn.Trim( false );
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pn.Trim( true );
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tNode = FindNode( tNode, wxT( "patternGraphicsRef" ) );
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while( tNode )
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{
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if( tNode->GetName() == wxT( "patternGraphicsRef" ) )
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{
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if( FindNode( tNode, wxT( "patternGraphicsNameRef" ) ) )
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{
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FindNode( tNode,
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wxT( "patternGraphicsNameRef" ) )->GetAttribute( wxT( "Name" ),
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&propValue );
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if( propValue == pn )
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{
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t1Node = tNode; // find correct section with same name.
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str = aTextValue->text;
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str.Trim( false );
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str.Trim( true );
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nnew = n; // new file version
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n = n + wxT( ' ' ) + str; // old file version
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tNode = NULL;
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}
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}
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}
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if( tNode )
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tNode = tNode->GetNext();
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}
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}
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// old version and compatibile fr both from this point
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tNode = FindNode( t1Node, wxT( "attr" ) );
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while( tNode )
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{
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tNode->GetAttribute( wxT( "Name" ), &propValue );
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propValue.Trim( false );
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propValue.Trim( true );
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if( propValue == n || propValue == nnew )
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break;
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tNode = tNode->GetNext();
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}
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if( tNode )
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SetTextParameters( tNode, aTextValue, m_defaultMeasurementUnit, aActualConversion );
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}
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void PCB::DoPCBComponents( XNODE* aNode,
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wxXmlDocument* aXmlDoc,
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const wxString& aActualConversion,
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wxStatusBar* aStatusBar )
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{
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XNODE* lNode, * tNode, * mNode;
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PCB_MODULE* mc;
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PCB_PAD* pad;
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PCB_VIA* via;
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PCB_KEEPOUT* keepOut;
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wxString cn, str, propValue;
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lNode = aNode->GetChildren();
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while( lNode )
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{
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mc = NULL;
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if( lNode->GetName() == wxT( "pattern" ) )
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{
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FindNode( lNode, wxT( "patternRef" ) )->GetAttribute( wxT( "Name" ),
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&cn );
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cn = ValidateName( cn );
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tNode = FindNode( (XNODE *)aXmlDoc->GetRoot(), wxT( "library" ) );
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if( tNode && cn.Len() > 0 )
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{
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tNode = FindModulePatternDefName( tNode, cn );
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if( tNode )
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{
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mc = new PCB_MODULE( this, m_board );
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mNode = FindNode( lNode, wxT( "patternGraphicsNameRef" ) );
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if( mNode )
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mNode->GetAttribute( wxT( "Name" ), &mc->m_patGraphRefName );
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mc->Parse( tNode, aStatusBar, m_defaultMeasurementUnit, aActualConversion );
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}
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}
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if( mc )
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{
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mc->m_compRef = cn; // default - in new version of file it is updated later....
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tNode = FindNode( lNode, wxT( "refDesRef" ) );
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if( tNode )
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{
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tNode->GetAttribute( wxT( "Name" ), &mc->m_name.text );
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SetTextProperty( lNode, &mc->m_name, mc->m_patGraphRefName, wxT(
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"RefDes" ), aActualConversion );
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SetTextProperty( lNode, &mc->m_value, mc->m_patGraphRefName, wxT(
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"Value" ), aActualConversion );
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}
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tNode = FindNode( lNode, wxT( "pt" ) );
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if( tNode )
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SetPosition( tNode->GetNodeContent(),
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m_defaultMeasurementUnit,
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&mc->m_positionX,
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&mc->m_positionY,
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aActualConversion );
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tNode = FindNode( lNode, wxT( "rotation" ) );
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if( tNode )
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{
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str = tNode->GetNodeContent();
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str.Trim( false );
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mc->m_rotation = StrToInt1Units( str );
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}
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str = FindNodeGetContent( lNode, wxT( "isFlipped" ) );
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if( str == wxT( "True" ) )
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mc->m_mirror = 1;
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tNode = aNode;
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while( tNode->GetName() != wxT( "www.lura.sk" ) )
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tNode = tNode->GetParent();
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tNode = FindNode( tNode, wxT( "netlist" ) );
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if( tNode )
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{
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tNode = FindNode( tNode, wxT( "compInst" ) );
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while( tNode )
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{
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tNode->GetAttribute( wxT( "Name" ), &propValue );
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if( propValue == mc->m_name.text )
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{
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if( FindNode( tNode, wxT( "compValue" ) ) )
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{
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FindNode( tNode,
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wxT( "compValue" ) )->GetAttribute( wxT( "Name" ),
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&mc->m_value.text );
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mc->m_value.text.Trim( false );
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mc->m_value.text.Trim( true );
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}
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if( FindNode( tNode, wxT( "compRef" ) ) )
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{
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FindNode( tNode,
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wxT( "compRef" ) )->GetAttribute( wxT( "Name" ),
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&mc->m_compRef );
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mc->m_compRef.Trim( false );
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mc->m_compRef.Trim( true );
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}
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tNode = NULL;
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}
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else
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tNode = tNode->GetNext();
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}
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}
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// map pins
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tNode = FindNode( (XNODE *)aXmlDoc->GetRoot(), wxT( "library" ) );
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tNode = FindCompDefName( tNode, mc->m_compRef );
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if( tNode )
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{
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tNode = FindPinMap( tNode );
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if( tNode )
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{
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mNode = tNode->GetChildren();
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while( mNode )
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{
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if( mNode->GetName() == wxT( "padNum" ) )
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{
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str = mNode->GetNodeContent();
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mNode = mNode->GetNext();
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if( !mNode )
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break;
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mNode->GetAttribute( wxT( "Name" ), &propValue );
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mc->SetName( str, propValue );
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mNode = mNode->GetNext();
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}
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else
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{
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mNode = mNode->GetNext();
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if( !mNode )
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break;
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mNode = mNode->GetNext();
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}
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}
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}
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}
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m_pcbComponents.Add( mc );
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}
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}
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else if( lNode->GetName() == wxT( "pad" ) )
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{
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pad = new PCB_PAD( this, m_board );
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pad->Parse( lNode, m_defaultMeasurementUnit, aActualConversion );
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m_pcbComponents.Add( pad );
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}
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else if( lNode->GetName() == wxT( "via" ) )
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{
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via = new PCB_VIA( this, m_board );
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via->Parse( lNode, m_defaultMeasurementUnit, aActualConversion );
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m_pcbComponents.Add( via );
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}
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else if( lNode->GetName() == wxT( "polyKeepOut" ) )
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{
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keepOut = new PCB_KEEPOUT( m_callbacks, m_board, 0 );
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if( keepOut->Parse( lNode, m_defaultMeasurementUnit, aActualConversion ) )
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m_pcbComponents.Add( keepOut );
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else
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delete keepOut;
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}
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lNode = lNode->GetNext();
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}
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}
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void PCB::ConnectPinToNet( const wxString& aCompRef,
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const wxString& aPinRef,
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const wxString& aNetName )
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{
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PCB_MODULE* module;
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PCB_PAD* cp;
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int i, j;
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for( i = 0; i < (int) m_pcbComponents.GetCount(); i++ )
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{
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module = (PCB_MODULE*) m_pcbComponents[i];
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if( module->m_objType == wxT( 'M' ) && module->m_name.text == aCompRef )
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{
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for( j = 0; j < (int) module->m_moduleObjects.GetCount(); j++ )
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{
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if( module->m_moduleObjects[j]->m_objType == wxT( 'P' ) )
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{
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cp = (PCB_PAD*) module->m_moduleObjects[j];
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if( cp->m_name.text == aPinRef )
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cp->m_net = aNetName;
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}
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}
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}
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}
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}
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int PCB::FindLayer( const wxString& aLayerName )
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{
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for( LAYER_NUM i = 0; i < (int)m_layersStackup.GetCount(); ++i )
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{
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if( m_layersStackup[i] == aLayerName )
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return i;
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}
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return -1;
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}
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/* KiCad layers
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* 0 Copper layer
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* 1 to 14 Inner layers
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* 15 Component layer
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* 16 Copper side adhesive layer Technical layers
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* 17 Component side adhesive layer
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* 18 Copper side Solder paste layer
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* 19 Component Solder paste layer
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* 20 Copper side Silk screen layer
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* 21 Component Silk screen layer
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* 22 Copper side Solder mask layer
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* 23 Component Solder mask layer
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* 24 Draw layer (Used for general drawings)
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* 25 Comment layer (Other layer used for general drawings)
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* 26 ECO1 layer (Other layer used for general drawings) // BUG
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* 26 ECO2 layer (Other layer used for general drawings) // BUG 27
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* 27 Edge layer. Items on Edge layer are seen on all layers // BUG 28
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*/
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void PCB::MapLayer( XNODE* aNode )
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{
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wxString lName, layerType;
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PCB_LAYER_ID KiCadLayer;
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long num = 0;
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aNode->GetAttribute( wxT( "Name" ), &lName );
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lName = lName.MakeUpper();
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if( lName == wxT( "TOP ASSY" ) )
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KiCadLayer = F_Fab;
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else if( lName == wxT( "TOP SILK" ) )
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KiCadLayer = F_SilkS;
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else if( lName == wxT( "TOP PASTE" ) )
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KiCadLayer = F_Paste;
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else if( lName == wxT( "TOP MASK" ) )
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KiCadLayer = F_Mask;
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else if( lName == wxT( "TOP" ) )
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KiCadLayer = F_Cu;
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else if( lName == wxT( "BOTTOM" ) )
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KiCadLayer = B_Cu;
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else if( lName == wxT( "BOT MASK" ) )
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KiCadLayer = B_Mask;
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else if( lName == wxT( "BOT PASTE" ) )
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KiCadLayer = B_Paste;
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else if( lName == wxT( "BOT SILK" ) )
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KiCadLayer = B_SilkS;
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else if( lName == wxT( "BOT ASSY" ) )
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KiCadLayer = B_Fab;
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else if( lName == wxT( "BOARD" ) )
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KiCadLayer = Edge_Cuts;
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else
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{
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int layernum = FindLayer( lName );
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if( layernum == -1 )
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KiCadLayer = Dwgs_User; // default
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else
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#if 0 // was:
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KiCadLayer = FIRST_COPPER_LAYER + m_layersStackup.GetCount() - 1 - layernum;
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#else
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KiCadLayer = ToLAYER_ID( layernum );
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#endif
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}
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if( FindNode( aNode, wxT( "layerNum" ) ) )
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FindNode( aNode, wxT( "layerNum" ) )->GetNodeContent().ToLong( &num );
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if( num < 0 || num >= MAX_PCAD_LAYER_QTY )
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THROW_IO_ERROR( wxString::Format( wxT( "layerNum = %ld is out of range" ), num ) );
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|
m_layersMap[(int) num].KiCadLayer = KiCadLayer;
|
|
|
|
if( FindNode( aNode, wxT( "layerType" ) ) )
|
|
{
|
|
layerType = FindNode( aNode, wxT( "layerType" ) )->GetNodeContent().Trim( false );
|
|
|
|
if( layerType == wxT( "NonSignal" ) )
|
|
m_layersMap[(int) num].layerType = LAYER_TYPE_NONSIGNAL;
|
|
if( layerType == wxT( "Signal" ) )
|
|
m_layersMap[(int) num].layerType = LAYER_TYPE_SIGNAL;
|
|
if( layerType == wxT( "Plane" ) )
|
|
m_layersMap[(int) num].layerType = LAYER_TYPE_PLANE;
|
|
}
|
|
|
|
if( FindNode( aNode, wxT( "netNameRef" ) ) )
|
|
{
|
|
FindNode( aNode, wxT( "netNameRef" ) )->GetAttribute( wxT( "Name" ),
|
|
&m_layersMap[(int) num].netNameRef );
|
|
}
|
|
}
|
|
|
|
int PCB::FindOutlinePoint( VERTICES_ARRAY* aOutline, wxRealPoint aPoint )
|
|
{
|
|
int i;
|
|
|
|
for( i = 0; i < (int) aOutline->GetCount(); i++ )
|
|
if( *((*aOutline)[i]) == aPoint )
|
|
return i;
|
|
|
|
return -1;
|
|
}
|
|
|
|
/*int cmpFunc( wxRealPoint **first, wxRealPoint **second )
|
|
{
|
|
return sqrt( pow( (double) aPointA.x - (double) aPointB.x, 2 ) +
|
|
pow( (double) aPointA.y - (double) aPointB.y, 2 ) );
|
|
|
|
return 0;
|
|
}*/
|
|
double PCB::GetDistance( wxRealPoint* aPoint1, wxRealPoint* aPoint2 )
|
|
{
|
|
return sqrt( ( aPoint1->x - aPoint2->x ) *
|
|
( aPoint1->x - aPoint2->x ) +
|
|
( aPoint1->y - aPoint2->y ) *
|
|
( aPoint1->y - aPoint2->y ) );
|
|
}
|
|
|
|
void PCB::GetBoardOutline( wxXmlDocument* aXmlDoc, const wxString& aActualConversion )
|
|
{
|
|
XNODE* iNode, *lNode, *pNode;
|
|
long PCadLayer = 0;
|
|
int x, y, i, j, targetInd;
|
|
wxRealPoint* xchgPoint;
|
|
double minDistance, distance;
|
|
|
|
iNode = FindNode( (XNODE *)aXmlDoc->GetRoot(), wxT( "pcbDesign" ) );
|
|
|
|
if( iNode )
|
|
{
|
|
// COMPONENTS AND OBJECTS
|
|
iNode = iNode->GetChildren();
|
|
|
|
while( iNode )
|
|
{
|
|
// objects
|
|
if( iNode->GetName() == wxT( "layerContents" ) )
|
|
{
|
|
if( FindNode( iNode, wxT( "layerNumRef" ) ) )
|
|
FindNode( iNode, wxT( "layerNumRef" ) )->GetNodeContent().ToLong( &PCadLayer );
|
|
|
|
if( GetKiCadLayer( PCadLayer ) == Edge_Cuts )
|
|
{
|
|
lNode = iNode->GetChildren();
|
|
while( lNode )
|
|
{
|
|
if( lNode->GetName() == wxT( "line" ) )
|
|
{
|
|
pNode = FindNode( lNode, wxT( "pt" ) );
|
|
|
|
if( pNode )
|
|
{
|
|
SetPosition( pNode->GetNodeContent(), m_defaultMeasurementUnit,
|
|
&x, &y, aActualConversion );
|
|
|
|
if( FindOutlinePoint( &m_boardOutline, wxRealPoint( x, y) ) == -1 )
|
|
m_boardOutline.Add( new wxRealPoint( x, y ) );
|
|
}
|
|
|
|
if( pNode )
|
|
pNode = pNode->GetNext();
|
|
|
|
if( pNode )
|
|
{
|
|
SetPosition( pNode->GetNodeContent(), m_defaultMeasurementUnit,
|
|
&x, &y, aActualConversion );
|
|
|
|
if( FindOutlinePoint( &m_boardOutline, wxRealPoint( x, y) ) == -1 )
|
|
m_boardOutline.Add( new wxRealPoint( x, y ) );
|
|
}
|
|
}
|
|
|
|
lNode = lNode->GetNext();
|
|
}
|
|
|
|
//m_boardOutline.Sort( cmpFunc );
|
|
// sort vertices according to the distances between them
|
|
if( m_boardOutline.GetCount() > 3 )
|
|
{
|
|
for( i = 0; i < (int) m_boardOutline.GetCount() - 1; i++ )
|
|
{
|
|
minDistance = GetDistance( m_boardOutline[i], m_boardOutline[i + 1] );
|
|
targetInd = i + 1;
|
|
|
|
for( j = i + 2; j < (int) m_boardOutline.GetCount(); j++ )
|
|
{
|
|
distance = GetDistance( m_boardOutline[i], m_boardOutline[j] );
|
|
if( distance < minDistance )
|
|
{
|
|
minDistance = distance;
|
|
targetInd = j;
|
|
}
|
|
}
|
|
|
|
xchgPoint = m_boardOutline[i + 1];
|
|
m_boardOutline[i + 1] = m_boardOutline[targetInd];
|
|
m_boardOutline[targetInd] = xchgPoint;
|
|
}
|
|
}
|
|
|
|
break;
|
|
}
|
|
}
|
|
|
|
iNode = iNode->GetNext();
|
|
}
|
|
}
|
|
}
|
|
|
|
void PCB::ParseBoard( wxStatusBar* aStatusBar, wxXmlDocument* aXmlDoc, const wxString& aActualConversion )
|
|
{
|
|
XNODE* aNode;//, *aaNode;
|
|
PCB_NET* net;
|
|
PCB_COMPONENT* comp;
|
|
PCB_MODULE* module;
|
|
wxString compRef, pinRef, layerName, layerType;
|
|
int i, j, netCode;
|
|
|
|
// Defaut measurement units
|
|
aNode = FindNode( (XNODE *)aXmlDoc->GetRoot(), wxT( "asciiHeader" ) );
|
|
|
|
if( aNode )
|
|
{
|
|
aNode = FindNode( aNode, wxT( "fileUnits" ) );
|
|
|
|
if( aNode )
|
|
{
|
|
m_defaultMeasurementUnit = aNode->GetNodeContent().Lower();
|
|
m_defaultMeasurementUnit.Trim( true );
|
|
m_defaultMeasurementUnit.Trim( false );
|
|
}
|
|
}
|
|
|
|
// Determine layers stackup
|
|
aNode = FindNode( (XNODE *)aXmlDoc->GetRoot(), wxT( "pcbDesign" ) );
|
|
|
|
/*if( aNode )
|
|
{
|
|
aNode = FindNode( aNode, wxT( "layersStackup" ) );
|
|
|
|
if( aNode )
|
|
{
|
|
aNode = FindNode( aNode, wxT( "layerStackupData" ) );
|
|
|
|
while( aNode )
|
|
{
|
|
if( aNode->GetName() == wxT( "layerStackupData" ) )
|
|
{
|
|
aaNode = FindNode( aNode, wxT( "layerStackupName" ) );
|
|
|
|
if( aaNode ) {
|
|
aaNode->GetAttribute( wxT( "Name" ), &layerName );
|
|
layerName = layerName.MakeUpper();
|
|
m_layersStackup.Add( layerName );
|
|
}
|
|
}
|
|
|
|
aNode = aNode->GetNext();
|
|
}
|
|
}
|
|
}*/
|
|
|
|
if( aNode )
|
|
{
|
|
aNode = FindNode( aNode, wxT( "layerDef" ) );
|
|
|
|
while( aNode )
|
|
{
|
|
if( aNode->GetName() == wxT( "layerDef" ) )
|
|
{
|
|
if( FindNode( aNode, wxT( "layerType" ) ) )
|
|
{
|
|
layerType = FindNode( aNode,
|
|
wxT( "layerType" ) )->GetNodeContent().Trim( false );
|
|
|
|
if( layerType == wxT( "Signal" ) || layerType == wxT( "Plane" ) )
|
|
{
|
|
aNode->GetAttribute( wxT( "Name" ), &layerName );
|
|
layerName = layerName.MakeUpper();
|
|
m_layersStackup.Add( layerName );
|
|
}
|
|
}
|
|
}
|
|
|
|
aNode = aNode->GetNext();
|
|
}
|
|
}
|
|
|
|
// Layers mapping
|
|
aNode = FindNode( (XNODE *)aXmlDoc->GetRoot(), wxT( "pcbDesign" ) );
|
|
|
|
if( aNode )
|
|
{
|
|
aNode = FindNode( aNode, wxT( "layerDef" ) );
|
|
|
|
while( aNode )
|
|
{
|
|
if( aNode->GetName() == wxT( "layerDef" ) )
|
|
MapLayer( aNode );
|
|
|
|
aNode = aNode->GetNext();
|
|
}
|
|
}
|
|
|
|
GetBoardOutline( aXmlDoc, aActualConversion );
|
|
|
|
// NETLIST
|
|
// aStatusBar->SetStatusText( wxT( "Loading NETLIST " ) );
|
|
|
|
aNode = FindNode( (XNODE *)aXmlDoc->GetRoot(), wxT( "netlist" ) );
|
|
|
|
if( aNode )
|
|
{
|
|
aNode = FindNode( aNode, wxT( "net" ) );
|
|
|
|
netCode = 1;
|
|
|
|
while( aNode )
|
|
{
|
|
net = new PCB_NET( netCode++ );
|
|
net->Parse( aNode );
|
|
m_pcbNetlist.Add( net );
|
|
|
|
aNode = aNode->GetNext();
|
|
}
|
|
}
|
|
|
|
// BOARD FILE
|
|
// aStatusBar->SetStatusText( wxT( "Loading BOARD DEFINITION " ) );
|
|
|
|
aNode = FindNode( (XNODE *)aXmlDoc->GetRoot(), wxT( "pcbDesign" ) );
|
|
|
|
if( aNode )
|
|
{
|
|
// COMPONENTS AND OBJECTS
|
|
aNode = aNode->GetChildren();
|
|
|
|
while( aNode )
|
|
{
|
|
// Components/modules
|
|
if( aNode->GetName() == wxT( "multiLayer" ) )
|
|
DoPCBComponents( aNode, aXmlDoc, aActualConversion, aStatusBar );
|
|
|
|
// objects
|
|
if( aNode->GetName() == wxT( "layerContents" ) )
|
|
DoLayerContentsObjects( aNode, NULL, &m_pcbComponents, aStatusBar,
|
|
m_defaultMeasurementUnit, aActualConversion );
|
|
|
|
aNode = aNode->GetNext();
|
|
}
|
|
|
|
// POSTPROCESS -- SET NETLIST REFERENCES
|
|
// aStatusBar->SetStatusText( wxT( "Processing NETLIST " ) );
|
|
|
|
for( i = 0; i < (int) m_pcbNetlist.GetCount(); i++ )
|
|
{
|
|
net = m_pcbNetlist[i];
|
|
|
|
for( j = 0; j < (int) net->m_netNodes.GetCount(); j++ )
|
|
{
|
|
compRef = net->m_netNodes[j]->m_compRef;
|
|
compRef.Trim( false );
|
|
compRef.Trim( true );
|
|
pinRef = net->m_netNodes[j]->m_pinRef;
|
|
pinRef.Trim( false );
|
|
pinRef.Trim( true );
|
|
ConnectPinToNet( compRef, pinRef, net->m_name );
|
|
}
|
|
}
|
|
|
|
// POSTPROCESS -- FLIP COMPONENTS
|
|
for( i = 0; i < (int) m_pcbComponents.GetCount(); i++ )
|
|
{
|
|
if( m_pcbComponents[i]->m_objType == wxT( 'M' ) )
|
|
( (PCB_MODULE*) m_pcbComponents[i] )->Flip();
|
|
}
|
|
|
|
// POSTPROCESS -- SET/OPTIMIZE NEW PCB POSITION
|
|
// aStatusBar->SetStatusText( wxT( "Optimizing BOARD POSITION " ) );
|
|
|
|
m_sizeX = 10000000;
|
|
m_sizeY = 0;
|
|
|
|
for( i = 0; i < (int) m_pcbComponents.GetCount(); i++ )
|
|
{
|
|
comp = m_pcbComponents[i];
|
|
|
|
if( comp->m_positionY < m_sizeY )
|
|
m_sizeY = comp->m_positionY; // max Y
|
|
|
|
if( comp->m_positionX < m_sizeX && comp->m_positionX > 0 )
|
|
m_sizeX = comp->m_positionX; // Min X
|
|
}
|
|
|
|
m_sizeY -= 10000;
|
|
m_sizeX -= 10000;
|
|
// aStatusBar->SetStatusText( wxT( " POSITIONING POSTPROCESS " ) );
|
|
|
|
for( i = 0; i < (int) m_pcbComponents.GetCount(); i++ )
|
|
m_pcbComponents[i]->SetPosOffset( -m_sizeX, -m_sizeY );
|
|
|
|
m_sizeX = 0;
|
|
m_sizeY = 0;
|
|
|
|
for( i = 0; i < (int) m_pcbComponents.GetCount(); i++ )
|
|
{
|
|
comp = m_pcbComponents[i];
|
|
|
|
if( comp->m_positionY < m_sizeY )
|
|
m_sizeY = comp->m_positionY; // max Y
|
|
|
|
if( comp->m_positionX > m_sizeX )
|
|
m_sizeX = comp->m_positionX; // Min X
|
|
}
|
|
|
|
// SHEET SIZE CALCULATION
|
|
m_sizeY = -m_sizeY; // it is in absolute units
|
|
m_sizeX += 10000;
|
|
m_sizeY += 10000;
|
|
|
|
// A4 is minimum $Descr A4 11700 8267
|
|
if( m_sizeX < 11700 )
|
|
m_sizeX = 11700;
|
|
|
|
if( m_sizeY < 8267 )
|
|
m_sizeY = 8267;
|
|
}
|
|
else
|
|
{
|
|
// LIBRARY FILE
|
|
// aStatusBar->SetStatusText( wxT( "Processing LIBRARY FILE " ) );
|
|
|
|
aNode = FindNode( (XNODE *)aXmlDoc->GetRoot(), wxT( "library" ) );
|
|
|
|
if( aNode )
|
|
{
|
|
aNode = FindNode( aNode, wxT( "compDef" ) );
|
|
|
|
while( aNode )
|
|
{
|
|
// aStatusBar->SetStatusText( wxT( "Processing COMPONENTS " ) );
|
|
|
|
if( aNode->GetName() == wxT( "compDef" ) )
|
|
{
|
|
module = new PCB_MODULE( this, m_board );
|
|
module->Parse( aNode, aStatusBar, m_defaultMeasurementUnit,
|
|
aActualConversion );
|
|
m_pcbComponents.Add( module );
|
|
}
|
|
|
|
aNode = aNode->GetNext();
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
void PCB::AddToBoard()
|
|
{
|
|
int i;
|
|
PCB_NET* net;
|
|
|
|
m_board->SetCopperLayerCount( m_layersStackup.GetCount() );
|
|
|
|
for( i = 0; i < (int) m_pcbNetlist.GetCount(); i++ )
|
|
{
|
|
net = m_pcbNetlist[i];
|
|
|
|
m_board->Add( new NETINFO_ITEM( m_board, net->m_name, net->m_netCode ) );
|
|
}
|
|
|
|
for( i = 0; i < (int) m_pcbComponents.GetCount(); i++ )
|
|
{
|
|
m_pcbComponents[i]->AddToBoard();
|
|
}
|
|
}
|
|
|
|
} // namespace PCAD2KICAD
|