diff --git a/README.md b/README.md
index 183c7af..6142aad 100644
--- a/README.md
+++ b/README.md
@@ -79,13 +79,13 @@ The pin mapping for the RP2040 is as follows:
 | GND        | <ground> | <ground> | GND        |
 | GP2        | SWCLK/TCK      |                | 3V3 EN     |
 | GP3        | SWDIO/TMS      |                | 3V3 OUT    |
-| GP4        | UART TX        |                | ADC VREF   |
-| GP5        | UART RX        |                | GP28 / ADC2|
+| GP4        | TDI            |                | ADC VREF   |
+| GP5        | TDO            |                | GP28 / ADC2|
 | GND        | <ground> | <ground> | GND  / AGND|
-| GP6        | TDI            |                | GP27 / ADC1|
-| GP7        | TDO            |                | GP26 / ADC0|
-| GP8        | nTRST          |                | RUN        |
-| GP9        | nRESET         |                | GP22       |
+| GP6        | nTRST          |                | GP27 / ADC1|
+| GP7        | nRESET         |                | GP26 / ADC0|
+| GP8        | UART TX        |                | RUN        |
+| GP9        | UART RX        | (1-wire, TODO) | GP22       |
 | GND        | <ground> | <ground> | GND        |
 | GP10       | UART CTS       | SCL            | GP21       |
 | GP11       | UART RTS       | SDA            | GP20       |
@@ -259,6 +259,7 @@ libco is licensed under the [ISC license](https://opensource.org/licenses/ISC)
   - Can probably be included in the "Better USB interface stuff".
 - [ ] JTAG pinout detector
   - https://github.com/cyphunk/JTAGenum
+  - https://github.com/travisgoodspeed/goodfet/blob/master/firmware/apps/jscan/jscan.c
 - [ ] Host-side script that is an XVC (or hw_server) cable and communicates
       with the device to perform the JTAG commands, because Vivado no likey
       OpenOCD.
@@ -274,16 +275,30 @@ libco is licensed under the [ISC license](https://opensource.org/licenses/ISC)
 - [ ] SUMP logic analyzer mode?
   - see also [this](https://github.com/perexg/picoprobe-sump)
 - [ ] FT2232 emulation mode?
+  - watch out, still need a vnd cfg interface! libftdi expects the following stuff: (TODO: acquire detailed protocol description)
+    - interface 0 ("A"): index 1, epin 0x02, epout 0x81
+    - interface 1 ("B"): index 2, epin 0x04, epout 0x83
+    - interface 2 ("C"): index 3, epin 0x06, epout 0x85
+    - interface 3 ("D"): index 4, epin 0x08, epout 0x87
+  - or, FX2 emulation mode??? (useful links: https://sigrok.org/wiki/Fx2lafw ; https://sigrok.org/wiki/CWAV_USBee_SX/Info )
 - [ ] Mode where you can define custom PIO stuff for custom pinouts/protocols??????
   - Maybe also with code that auto-reacts to stuff from the environment?
 - [ ] Facedancer implementation by connecting two picos via GPIO, one doing host
       stuff, the other device, commands being sent over GPIO to do stuff
 - [ ] Maybe use the ADCs for something?
 - [ ] SD/MMC/SDIO (will be a pain)
+- [ ] MSP430 programming
+  - https://dlbeer.co.nz/mspdebug/usb.html
+  - https://github.com/dlbeer/mspdebug
+  - https://www.ti.com/lit/an/slaa754/slaa754.pdf
+  - https://www.ti.com/lit/ug/slau320aj/slau320aj.pdf
 - [ ] AVR programming (USBavr emulation?)
   - AVR ISP is hardly used anymore
   - TPI/UPDI requires 5V levels, Pico doesn't do that :/
   - debugWIRE????
+  - https://github.com/travisgoodspeed/goodfet/blob/master/firmware/apps/avr/avr.c
+- [ ] PIC programming
+  - https://github.com/travisgoodspeed/goodfet/tree/master/firmware/apps/pic
 - iCE40 programming??
 - Renesas E7-{0,1,2} programming thing????
   - Renesas tell us how this works pls
diff --git a/bsp/rp2040/m_default/pinout.h b/bsp/rp2040/m_default/pinout.h
index 639f88a..ebfcd0c 100644
--- a/bsp/rp2040/m_default/pinout.h
+++ b/bsp/rp2040/m_default/pinout.h
@@ -4,8 +4,8 @@
 #define PINOUT_H_
 
 // UART config
-#define PINOUT_UART_TX         4
-#define PINOUT_UART_RX         5
+#define PINOUT_UART_TX         8
+#define PINOUT_UART_RX         9
 #define PINOUT_UART_CTS       10
 #define PINOUT_UART_RTS       11
 #define PINOUT_UART_INTERFACE uart1
@@ -14,10 +14,10 @@
 // JTAG config
 #define PINOUT_JTAG_TCK    2  // == SWCLK
 #define PINOUT_JTAG_TMS    3  // == SWDIO
-#define PINOUT_JTAG_TDI    6
-#define PINOUT_JTAG_TDO    7
-#define PINOUT_JTAG_nTRST  8
-#define PINOUT_JTAG_nRESET 9
+#define PINOUT_JTAG_TDI    4
+#define PINOUT_JTAG_TDO    5
+#define PINOUT_JTAG_nTRST  6
+#define PINOUT_JTAG_nRESET 7
 
 // SPI config
 #define PINOUT_SPI_DEV  spi1