diff --git a/src/platforms/swlink/Makefile.inc b/src/platforms/swlink/Makefile.inc
index 9fed121..b7b6c1b 100644
--- a/src/platforms/swlink/Makefile.inc
+++ b/src/platforms/swlink/Makefile.inc
@@ -28,12 +28,16 @@ SRC += 	cdcacm.c	\
 	timing_stm32.c	\
 	platform_common.c \
 
-all:	blackmagic.bin blackmagic_dfu.bin blackmagic_dfu.hex
+all:	blackmagic.bin blackmagic_dfu.bin blackmagic_dfu.hex dfu_upgrade.bin dfu_upgrade.hex
 
 blackmagic_dfu: usbdfu.o dfucore.o dfu_f1.o platform_common.o
 	@echo "  LD      $@"
 	$(Q)$(CC) $^ -o $@ $(LDFLAGS_BOOT)
 
+dfu_upgrade: dfu_upgrade.o dfucore.o dfu_f1.o platform_common.o
+	@echo "  LD      $@"
+	$(Q)$(CC) $^ -o $@ $(LDFLAGS)
+
 host_clean:
 	-$(Q)$(RM) blackmagic.bin blackmagic_dfu blackmagic_dfu.bin blackmagic_dfu.hex
 
diff --git a/src/platforms/swlink/dfu_upgrade.c b/src/platforms/swlink/dfu_upgrade.c
new file mode 100644
index 0000000..c34123a
--- /dev/null
+++ b/src/platforms/swlink/dfu_upgrade.c
@@ -0,0 +1,68 @@
+/*
+ * This file is part of the Black Magic Debug project.
+ *
+ * Copyright (C) 2018 Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de)
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <string.h>
+#include <libopencm3/cm3/systick.h>
+#include <libopencm3/stm32/rcc.h>
+#include <libopencm3/stm32/gpio.h>
+#include <libopencm3/cm3/scb.h>
+
+#include "usbdfu.h"
+#include "general.h"
+#include "platform.h"
+
+uint32_t app_address = 0x08000000;
+extern uint32_t _stack;
+static uint32_t rev;
+
+void dfu_detach(void)
+{
+	platform_request_boot();
+	scb_reset_core();
+}
+
+int main(void)
+{
+	rev = detect_rev();
+	rcc_clock_setup_in_hse_8mhz_out_72mhz();
+	systick_set_clocksource(STK_CSR_CLKSOURCE_AHB_DIV8);
+	systick_set_reload(900000);
+
+	dfu_protect(UPD_MODE);
+
+	systick_interrupt_enable();
+	systick_counter_enable();
+
+	dfu_init(&st_usbfs_v1_usb_driver, UPD_MODE);
+
+	dfu_main();
+}
+
+void dfu_event(void)
+{
+}
+
+void sys_tick_handler(void)
+{
+	if (rev == 0) {
+		gpio_toggle(GPIOA, GPIO8);
+	} else {
+		gpio_toggle(GPIOC, GPIO13);
+	}
+}
diff --git a/src/platforms/swlink/platform.c b/src/platforms/swlink/platform.c
index 13f88eb..d665250 100644
--- a/src/platforms/swlink/platform.c
+++ b/src/platforms/swlink/platform.c
@@ -137,26 +137,3 @@ const char *platform_target_voltage(void)
 {
 	return "unknown";
 }
-
-void platform_request_boot(void)
-{
-	/* Disconnect USB cable by resetting USB Device and pulling USB_DP low*/
-	rcc_periph_reset_pulse(RST_USB);
-	rcc_periph_clock_enable(RCC_USB);
-	rcc_periph_clock_enable(RCC_GPIOA);
-	gpio_clear(GPIOA, GPIO12);
-	gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ,
-		GPIO_CNF_OUTPUT_OPENDRAIN, GPIO12);
-
-	/* Assert bootloader pin */
-	uint32_t crl = GPIOA_CRL;
-	rcc_periph_clock_enable(RCC_GPIOA);
-	/* Enable Pull on GPIOA1. We don't rely on the external pin
-	 * really pulled, but only on the value of the CNF register
-	 * changed from the reset value
-	 */
-	crl &= 0xffffff0f;
-	crl |= 0x80;
-	GPIOA_CRL = crl;
-}
-
diff --git a/src/platforms/swlink/platform_common.c b/src/platforms/swlink/platform_common.c
index b1a3ad3..a1df214 100644
--- a/src/platforms/swlink/platform_common.c
+++ b/src/platforms/swlink/platform_common.c
@@ -73,3 +73,16 @@ uint8_t detect_rev()
 	return rev;
 }
 
+void platform_request_boot(void)
+{
+	uint32_t crl = GPIOA_CRL;
+	/* Assert bootloader marker.
+	 * Enable Pull on GPIOA1. We don't rely on the external pin
+	 * really pulled, but only on the value of the CNF register
+	 * changed from the reset value
+	 */
+	crl &= 0xffffff0f;
+	crl |= 0x80;
+	GPIOA_CRL = crl;
+	SCB_VTOR = 0;
+}