From 14882c61abc93396340f45464b01ec7b63de19e0 Mon Sep 17 00:00:00 2001 From: James Turton Date: Fri, 16 Sep 2022 12:54:32 +0200 Subject: [PATCH] rp: Don't reset QSPI bank or flush XIP cache We should do as little 'damage' when attaching to the processor, so don't reset the entire QSPI IO and PADS subsystems. We can assume that either the bootloader or the running program has setup the QSPI pins into some kindn of useable mode. Similarly no need to clear the XIP cache as we will not be making any cacheable XIP accesses. --- src/target/rp.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/src/target/rp.c b/src/target/rp.c index e8d7457..079559a 100644 --- a/src/target/rp.c +++ b/src/target/rp.c @@ -205,9 +205,9 @@ static uint32_t rp_get_flash_length(target *t); static bool rp_mass_erase(target *t); // Our own implementation of bootloader functions for handling flash chip -static void rp_flash_connect_internal(target *t); +static void __attribute__((unused))rp_flash_connect_internal(target *t); static void rp_flash_exit_xip(target *t); -static void rp_flash_flush_cache(target *t); +static void __attribute__((unused))rp_flash_flush_cache(target *t); static void rp_flash_enter_xip(target *t); static void rp_spi_read_sfdp(target *const t, const uint32_t address, void *const buffer, const size_t length) @@ -223,7 +223,6 @@ static void rp_add_flash(target *t) return; } - rp_flash_connect_internal(t); rp_flash_exit_xip(t); spi_parameters_s spi_parameters; @@ -235,7 +234,6 @@ static void rp_add_flash(target *t) spi_parameters.sector_erase_opcode = SPI_FLASH_CMD_SECTOR_ERASE; } - rp_flash_flush_cache(t); rp_flash_enter_xip(t); DEBUG_INFO("Flash size: %" PRIu16 " MB\n", spi_parameters.capacity / (1024U * 1024U));