From 1890426669481b70a60731cb24e9c88bfb73accb Mon Sep 17 00:00:00 2001
From: dragonmux <git@dragonmux.network>
Date: Tue, 9 Aug 2022 02:19:23 +0100
Subject: [PATCH] native: Reformatted the TMS and SWDIO macros in the platform
 header

---
 src/platforms/native/platform.h | 57 +++++++++++++++++----------------
 1 file changed, 29 insertions(+), 28 deletions(-)

diff --git a/src/platforms/native/platform.h b/src/platforms/native/platform.h
index fdfd304..7ba6cd5 100644
--- a/src/platforms/native/platform.h
+++ b/src/platforms/native/platform.h
@@ -189,38 +189,39 @@ int usbuart_debug_write(const char *buf, size_t len);
 #define AUX_BTN2       GPIO9
 #define AUX_VBAT       GPIO0
 
-# define SWD_CR   GPIO_CRL(SWDIO_PORT)
-# define SWD_CR_SHIFT (4U << 2U)
+#define SWD_CR       GPIO_CRL(SWDIO_PORT)
+#define SWD_CR_SHIFT (4U << 2U)
 
-#define TMS_SET_MODE() do { \
-	gpio_set(TMS_DIR_PORT, TMS_DIR_PIN); \
-	gpio_set_mode(TMS_PORT, GPIO_MODE_OUTPUT_50_MHZ, \
-	              GPIO_CNF_OUTPUT_PUSHPULL, TMS_PIN); \
-} while(0)
+#define TMS_SET_MODE()                                                                       \
+	do {                                                                                     \
+		gpio_set(TMS_DIR_PORT, TMS_DIR_PIN);                                                 \
+		gpio_set_mode(TMS_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, TMS_PIN); \
+	} while (0)
 
-#define SWDIO_MODE_FLOAT() do { \
-	uint32_t cr = SWD_CR; \
-	cr  &= ~(0xfU << SWD_CR_SHIFT); \
-	cr  |=  (0x4U << SWD_CR_SHIFT); \
-	GPIO_BRR(SWDIO_DIR_PORT) = SWDIO_DIR_PIN; \
-	SWD_CR = cr; \
-} while(0)
+#define SWDIO_MODE_FLOAT()                        \
+	do {                                          \
+		uint32_t cr = SWD_CR;                     \
+		cr &= ~(0xfU << SWD_CR_SHIFT);            \
+		cr |= (0x4U << SWD_CR_SHIFT);             \
+		GPIO_BRR(SWDIO_DIR_PORT) = SWDIO_DIR_PIN; \
+		SWD_CR = cr;                              \
+	} while (0)
 
-#define SWDIO_MODE_DRIVE() do { \
-	uint32_t cr = SWD_CR; \
-	cr  &= ~(0xfU << SWD_CR_SHIFT); \
-	cr  |=  (0x1U << SWD_CR_SHIFT); \
-	GPIO_BSRR(SWDIO_DIR_PORT) = SWDIO_DIR_PIN; \
-	SWD_CR = cr; \
-} while(0)
+#define SWDIO_MODE_DRIVE()                         \
+	do {                                           \
+		uint32_t cr = SWD_CR;                      \
+		cr &= ~(0xfU << SWD_CR_SHIFT);             \
+		cr |= (0x1U << SWD_CR_SHIFT);              \
+		GPIO_BSRR(SWDIO_DIR_PORT) = SWDIO_DIR_PIN; \
+		SWD_CR = cr;                               \
+	} while (0)
 
-#define UART_PIN_SETUP() do { \
-	gpio_set_mode(USBUSART_PORT, GPIO_MODE_OUTPUT_50_MHZ, \
-	              GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, USBUSART_TX_PIN); \
-	gpio_set_mode(USBUSART_PORT, GPIO_MODE_INPUT, \
-				  GPIO_CNF_INPUT_PULL_UPDOWN, USBUSART_RX_PIN); \
-	gpio_set(USBUSART_PORT, USBUSART_RX_PIN); \
-} while(0)
+#define UART_PIN_SETUP()                                                                                        \
+	do {                                                                                                        \
+		gpio_set_mode(USBUSART_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, USBUSART_TX_PIN); \
+		gpio_set_mode(USBUSART_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, USBUSART_RX_PIN);             \
+		gpio_set(USBUSART_PORT, USBUSART_RX_PIN);                                                               \
+	} while (0)
 
 #define USB_DRIVER st_usbfs_v1_usb_driver
 #define USB_IRQ    NVIC_USB_LP_CAN_RX0_IRQ