From 66562847281736ff2972cf0970c5f5f9dcf68cd9 Mon Sep 17 00:00:00 2001 From: cyber-murmel Date: Tue, 17 May 2022 13:24:42 +0200 Subject: [PATCH] added RTS and DTR to UART interface --- src/platforms/common/cdcacm.c | 22 +++++++++++++++------- src/platforms/swlink/platform.h | 4 ++++ 2 files changed, 19 insertions(+), 7 deletions(-) diff --git a/src/platforms/common/cdcacm.c b/src/platforms/common/cdcacm.c index ed7b08d..fe90c49 100644 --- a/src/platforms/common/cdcacm.c +++ b/src/platforms/common/cdcacm.c @@ -450,13 +450,21 @@ static enum usbd_request_return_codes cdcacm_control_request(usbd_device *dev, switch(req->bRequest) { case USB_CDC_REQ_SET_CONTROL_LINE_STATE: cdcacm_set_modem_state(dev, req->wIndex, true, true); - /* Ignore if not for GDB interface */ - if(req->wIndex != GDB_IF_NO) - return USBD_REQ_HANDLED; - - cdcacm_gdb_dtr = req->wValue & 1; - - return USBD_REQ_HANDLED; + switch(req->wIndex) { + case UART_IF_NO: + #ifdef USBUSART_DTR_PIN + gpio_set_val(USBUSART_PORT, USBUSART_DTR_PIN, !(req->wValue & 1)); + #endif + #ifdef USBUSART_RTS_PIN + gpio_set_val(USBUSART_PORT, USBUSART_RTS_PIN, !((req->wValue >> 1) & 1)); + #endif + return USBD_REQ_HANDLED; + case GDB_IF_NO: + cdcacm_gdb_dtr = req->wValue & 1; + return USBD_REQ_HANDLED; + default: + return USBD_REQ_NOTSUPP; + } case USB_CDC_REQ_SET_LINE_CODING: if(*len < sizeof(struct usb_cdc_line_coding)) return USBD_REQ_NOTSUPP; diff --git a/src/platforms/swlink/platform.h b/src/platforms/swlink/platform.h index 36cab71..1407429 100644 --- a/src/platforms/swlink/platform.h +++ b/src/platforms/swlink/platform.h @@ -88,6 +88,8 @@ int usbuart_debug_write(const char *buf, size_t len); gpio_set_mode(USBUSART_PORT, GPIO_MODE_INPUT, \ GPIO_CNF_INPUT_PULL_UPDOWN, USBUSART_RX_PIN); \ gpio_set(USBUSART_PORT, USBUSART_RX_PIN); \ + gpio_set_mode(USBUSART_PORT, GPIO_MODE_OUTPUT_50_MHZ, \ + GPIO_CNF_OUTPUT_PUSHPULL, USBUSART_RTS_PIN | USBUSART_DTR_PIN); \ } while(0) #define USB_DRIVER st_usbfs_v1_usb_driver @@ -110,6 +112,8 @@ int usbuart_debug_write(const char *buf, size_t len); #define USBUSART_PORT GPIOB #define USBUSART_TX_PIN GPIO6 #define USBUSART_RX_PIN GPIO7 +#define USBUSART_RTS_PIN GPIO8 +#define USBUSART_DTR_PIN GPIO9 #define USBUSART_ISR(x) usart1_isr(x) #define USBUSART_DMA_BUS DMA1 #define USBUSART_DMA_CLK RCC_DMA1