From 877b4be8ee6947bcf27bfb20da6c8605dc8231a4 Mon Sep 17 00:00:00 2001 From: Uwe Bonnes Date: Wed, 30 Sep 2020 17:44:11 +0200 Subject: [PATCH] cortexm: Restrict probing by using the ap_designer. More designers need to be observed and reported by users and added. Request users to send needed data. --- src/target/adiv5.c | 2 +- src/target/adiv5.h | 10 ++++++ src/target/cortexm.c | 81 +++++++++++++++++++++++++++++++------------- src/target/lpc11xx.c | 2 +- 4 files changed, 70 insertions(+), 25 deletions(-) diff --git a/src/target/adiv5.c b/src/target/adiv5.c index 53db209..49023eb 100644 --- a/src/target/adiv5.c +++ b/src/target/adiv5.c @@ -204,7 +204,7 @@ static const struct { {0x4c4, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("Cortex-M4 ROM", "(Cortex-M4 ROM)")}, {0x4c7, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("Cortex-M7 PPB", "(Private Peripheral Bus ROM Table)")}, {0x906, 0x14, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight CTI", "(Cross Trigger)")}, - {0x907, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight ETB", "(Trace Buffer)")}, + {0x907, 0x21, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight ETB", "(Trace Buffer)")}, {0x908, 0x12, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight CSTF", "(Trace Funnel)")}, {0x910, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight ETM9", "(Embedded Trace)")}, {0x912, 0x11, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight TPIU", "(Trace Port Interface Unit)")}, diff --git a/src/target/adiv5.h b/src/target/adiv5.h index 9f57ca8..39d4d5a 100644 --- a/src/target/adiv5.h +++ b/src/target/adiv5.h @@ -87,7 +87,17 @@ #define ADIV5_AP_IDR ADIV5_AP_REG(0xFC) /* Known designers seen in SYSROM-PIDR. Ignore Bit 7 from the designer bits*/ +#define AP_DESIGNER_FREESCALE 0x00e +#define AP_DESIGNER_TEXAS 0x017 +#define AP_DESIGNER_ATMEL 0x01f +#define AP_DESIGNER_STM 0x020 +#define AP_DESIGNER_CYPRESS 0x034 +#define AP_DESIGNER_INFINEON 0x041 +#define AP_DESIGNER_NORDIC 0x244 #define AP_DESIGNER_ARM 0x43b +/*LPC845 with designer 501. Strange!? */ +#define AP_DESIGNER_SPECULAR 0x501 +#define AP_DESIGNER_ENERGY_MICRO 0x673 /* AP Control and Status Word (CSW) */ #define ADIV5_AP_CSW_DBGSWENABLE (1u << 31) diff --git a/src/target/cortexm.c b/src/target/cortexm.c index d2f7671..f2bf525 100644 --- a/src/target/cortexm.c +++ b/src/target/cortexm.c @@ -1,9 +1,9 @@ /* * This file is part of the Black Magic Debug project. * - * Copyright (C) 2012 Black Sphere Technologies Ltd. + * Copyright (C) 2012-2020 Black Sphere Technologies Ltd. * Written by Gareth McMullin , - * Koen De Vleeschauwer and Uwe Bonne + * Koen De Vleeschauwer and Uwe Bonnes * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -35,6 +35,7 @@ #include "cortexm.h" #include "platform.h" #include "command.h" +#include "gdb_packet.h" #include @@ -375,28 +376,62 @@ bool cortexm_probe(ADIv5_AP_t *ap) #define PROBE(x) \ do { if ((x)(t)) {target_halt_resume(t, 0); return true;} else target_check_error(t); } while (0) - PROBE(stm32f1_probe); - PROBE(stm32f4_probe); - PROBE(stm32h7_probe); - PROBE(stm32l0_probe); /* STM32L0xx & STM32L1xx */ - PROBE(stm32l4_probe); - PROBE(lpc11xx_probe); - PROBE(lpc15xx_probe); - PROBE(lpc43xx_probe); - PROBE(lpc546xx_probe); - PROBE(sam3x_probe); - PROBE(sam4l_probe); - PROBE(nrf51_probe); - PROBE(samd_probe); - PROBE(samx5x_probe); - PROBE(lmi_probe); - PROBE(kinetis_probe); - PROBE(efm32_probe); - PROBE(msp432_probe); - PROBE(ke04_probe); - PROBE(lpc17xx_probe); + switch (ap->ap_designer) { + case AP_DESIGNER_FREESCALE: + PROBE(kinetis_probe); + break; + case AP_DESIGNER_STM: + PROBE(stm32f1_probe); + PROBE(stm32f4_probe); + PROBE(stm32h7_probe); + PROBE(stm32l0_probe); + PROBE(stm32l4_probe); + break; + case AP_DESIGNER_CYPRESS: + DEBUG_WARN("Unhandled Cypress device\n"); + break; + case AP_DESIGNER_INFINEON: + DEBUG_WARN("Unhandled Infineon device\n"); + break; + case AP_DESIGNER_NORDIC: + PROBE(nrf51_probe); + break; + case AP_DESIGNER_ATMEL: + PROBE(sam4l_probe); + PROBE(samd_probe); + PROBE(samx5x_probe); + break; + case AP_DESIGNER_ARM: + if (ap->ap_partno == 0x4c3) /* Care for STM32F1 clones */ + PROBE(stm32f1_probe); + PROBE(sam3x_probe); + PROBE(lpc11xx_probe); /* LPC24C11 */ + break; + case AP_DESIGNER_ENERGY_MICRO: + PROBE(efm32_probe); + break; + case AP_DESIGNER_TEXAS: + PROBE(msp432_probe); + break; + case AP_DESIGNER_SPECULAR: + PROBE(lpc11xx_probe); /* LPC845 */ + break; + default: +#if PC_HOSTED == 0 + gdb_outf("Please report Designer %3x and Partno %3x and the probed " + "device\n", ap->ap_designer, ap->ap_partno); +#else + DEBUG_WARN("Please report Designer %3x and Partno %3x and the probed " + "device\n", ap->ap_designer, ap->ap_partno); +#endif + PROBE(lpc11xx_probe); /* Let's get feedback if LPC11 is also Specular*/ + PROBE(lpc15xx_probe); + PROBE(lpc43xx_probe); + PROBE(lmi_probe); + PROBE(ke04_probe); + PROBE(lpc17xx_probe); + } #undef PROBE - return true; } diff --git a/src/target/lpc11xx.c b/src/target/lpc11xx.c index ba2dc6a..5cad1e7 100644 --- a/src/target/lpc11xx.c +++ b/src/target/lpc11xx.c @@ -137,7 +137,7 @@ lpc11xx_probe(target *t) target_add_commands(t, lpc11xx_cmd_list, "LPC8N04"); return true; } - if (idcode) { + if ((t->t_designer != AP_DESIGNER_SPECULAR) && !idcode) { DEBUG_INFO("LPC11xx: Unknown IDCODE 0x%08" PRIx32 "\n", idcode); } idcode = target_mem_read32(t, LPC8XX_DEVICE_ID);