From 8845a22226e3ad0e378021c5ece3441f9d399f23 Mon Sep 17 00:00:00 2001 From: Uwe Bonnes Date: Tue, 26 Oct 2021 13:01:49 +0200 Subject: [PATCH] stm32l4: Use targetid when available. Fixes STM32U5 from crashing. --- src/target/stm32l4.c | 25 +++++++++++++++++-------- 1 file changed, 17 insertions(+), 8 deletions(-) diff --git a/src/target/stm32l4.c b/src/target/stm32l4.c index 9ff6453..cdd9fdf 100644 --- a/src/target/stm32l4.c +++ b/src/target/stm32l4.c @@ -507,22 +507,31 @@ static void stm32l4_detach(target *t) bool stm32l4_probe(target *t) { - uint32_t idcode_reg = STM32L4_DBGMCU_IDCODE_PHYS; ADIv5_AP_t *ap = cortexm_ap(t); - if (ap->dp->idcode == 0x0Be12477) { - idcode_reg = STM32L5_DBGMCU_IDCODE_PHYS; - if ((stm32l4_flash_read32(t, FLASH_OPTR)) & L5_FLASH_OPTR_TZEN) { - DEBUG_WARN("STM32L5 Trust Zone enabled\n"); - } + uint32_t idcode; + if (ap->dp->targetid > 1) { /* STM32L552 has in valid TARGETID 1 */ + idcode = (ap->dp->targetid >> 16) & 0xfff; + } else { + uint32_t idcode_reg = STM32L4_DBGMCU_IDCODE_PHYS; + if (ap->dp->idcode == 0x0Be12477) + idcode_reg = STM32L5_DBGMCU_IDCODE_PHYS; + idcode = target_mem_read32(t, idcode_reg) & 0xfff; + DEBUG_INFO("Idcode %08" PRIx32 "\n", idcode); } - uint32_t idcode = target_mem_read32(t, idcode_reg) & 0xfff; - DEBUG_INFO("Read %" PRIx32 ": %" PRIx32 "\n", idcode_reg, idcode); struct stm32l4_info const *chip = stm32l4_get_chip_info(idcode); if( !chip->idcode ) /* Not found */ return false; + switch (idcode) { + case ID_STM32L55: + if ((stm32l4_flash_read32(t, FLASH_OPTR)) & L5_FLASH_OPTR_TZEN) { + DEBUG_WARN("STM32L5 Trust Zone enabled\n"); + t->core = "M33(TZ)"; + break; + } + } t->driver = chip->designator; t->attach = stm32l4_attach; t->detach = stm32l4_detach;