diff --git a/src/adiv5.c b/src/adiv5.c index 53e453f..8a38057 100644 --- a/src/adiv5.c +++ b/src/adiv5.c @@ -22,8 +22,8 @@ * ARM Debug Interface v5 Architecure Specification, ARM doc IHI0031A. */ #include "general.h" -#include "jtag_scan.h" -#include "gdb_packet.h" +#include "target.h" +#include "target_internal.h" #include "adiv5.h" #include "cortexm.h" #include "exception.h" @@ -373,7 +373,7 @@ ADIv5_AP_t *adiv5_new_ap(ADIv5_DP_t *dp, uint8_t apsel) ~(ADIV5_AP_CSW_SIZE_MASK | ADIV5_AP_CSW_ADDRINC_MASK); if (ap->csw & ADIV5_AP_CSW_TRINPROG) { - gdb_out("AP transaction in progress. Target may not be usable.\n"); + DEBUG("AP transaction in progress. Target may not be usable.\n"); ap->csw &= ~ADIV5_AP_CSW_TRINPROG; } @@ -395,7 +395,7 @@ void adiv5_dp_init(ADIv5_DP_t *dp) ctrlstat = adiv5_dp_read(dp, ADIV5_DP_CTRLSTAT); } if (e.type) { - gdb_out("DP not responding! Trying abort sequence...\n"); + DEBUG("DP not responding! Trying abort sequence...\n"); adiv5_dp_abort(dp, ADIV5_DP_ABORT_DAPABORT); ctrlstat = adiv5_dp_read(dp, ADIV5_DP_CTRLSTAT); } diff --git a/src/cortexa.c b/src/cortexa.c index 949fc5c..24a8c6c 100644 --- a/src/cortexa.c +++ b/src/cortexa.c @@ -32,9 +32,6 @@ #include "adiv5.h" #include "target.h" #include "target_internal.h" -#include "gdb_packet.h" - -#include static char cortexa_driver_str[] = "ARM Cortex-A"; @@ -585,7 +582,7 @@ static void cortexa_halt_request(target *t) apb_write(t, DBGDRCR, DBGDRCR_HRQ); } if (e.type) { - gdb_out("Timeout sending interrupt, is target in WFI?\n"); + tc_printf(t, "Timeout sending interrupt, is target in WFI?\n"); } } diff --git a/src/cortexm.c b/src/cortexm.c index 46fa6ed..6c783a4 100644 --- a/src/cortexm.c +++ b/src/cortexm.c @@ -487,7 +487,7 @@ static void cortexm_halt_request(target *t) CORTEXM_DHCSR_C_DEBUGEN); } if (e.type) { - gdb_out("Timeout sending interrupt, is target in WFI?\n"); + tc_printf(t, "Timeout sending interrupt, is target in WFI?\n"); } } @@ -818,8 +818,8 @@ static bool cortexm_vector_catch(target *t, int argc, char *argv[]) unsigned i; if ((argc < 3) || ((argv[1][0] != 'e') && (argv[1][0] != 'd'))) { - gdb_out("usage: monitor vector_catch (enable|disable) " - "(hard|int|bus|stat|chk|nocp|mm|reset)\n"); + tc_printf(t, "usage: monitor vector_catch (enable|disable) " + "(hard|int|bus|stat|chk|nocp|mm|reset)\n"); } else { for (int j = 0; j < argc; j++) for (i = 0; i < sizeof(vectors) / sizeof(char*); i++) { @@ -835,14 +835,14 @@ static bool cortexm_vector_catch(target *t, int argc, char *argv[]) target_mem_write32(t, CORTEXM_DEMCR, priv->demcr); } - gdb_out("Catching vectors: "); + tc_printf(t, "Catching vectors: "); for (i = 0; i < sizeof(vectors) / sizeof(char*); i++) { if (!vectors[i]) continue; if (priv->demcr & (1 << i)) - gdb_outf("%s ", vectors[i]); + tc_printf(t, "%s ", vectors[i]); } - gdb_out("\n"); + tc_printf(t, "\n"); return true; } diff --git a/src/efm32.c b/src/efm32.c index e71d1a4..3725121 100644 --- a/src/efm32.c +++ b/src/efm32.c @@ -39,7 +39,6 @@ #include "general.h" #include "target.h" #include "target_internal.h" -#include "gdb_packet.h" #include "cortexm.h" #define SRAM_BASE 0x20000000 @@ -334,7 +333,7 @@ bool efm32_probe(target *t) /* Setup Target */ t->target_options |= CORTEXM_TOPT_INHIBIT_SRST; t->driver = variant_string; - gdb_outf("flash size %d page size %d\n", flash_size, flash_page_size); + tc_printf(t, "flash size %d page size %d\n", flash_size, flash_page_size); target_add_ram (t, SRAM_BASE, ram_size); efm32_add_flash(t, 0x00000000, flash_size, flash_page_size); target_add_commands(t, efm32_cmd_list, "EFM32"); @@ -416,7 +415,7 @@ static bool efm32_cmd_erase_all(target *t) /* Relock mass erase */ target_mem_write32(t, EFM32_MSC_MASSLOCK, 0); - gdb_outf("Erase successful!\n"); + tc_printf(t, "Erase successful!\n"); return true; } @@ -430,7 +429,7 @@ static bool efm32_cmd_serial(target *t) uint64_t eui = efm32_read_eui(t); /* 64 bits of unique number */ - gdb_outf("Unique Number: 0x%016llx\n", eui); + tc_printf(t, "Unique Number: 0x%016llx\n", eui); return true; } diff --git a/src/gdb_packet.c b/src/gdb_packet.c index 9ce63f2..f738996 100644 --- a/src/gdb_packet.c +++ b/src/gdb_packet.c @@ -153,16 +153,21 @@ void gdb_out(const char *buf) gdb_putpacket(hexdata, i); } -void gdb_outf(const char *fmt, ...) +void gdb_voutf(const char *fmt, va_list ap) { - va_list ap; char *buf; - va_start(ap, fmt); if (vasprintf(&buf, fmt, ap) < 0) return; gdb_out(buf); free(buf); - va_end(ap); } +void gdb_outf(const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + gdb_voutf(fmt, ap); + va_end(ap); +} diff --git a/src/include/gdb_packet.h b/src/include/gdb_packet.h index aa1a654..789cfa1 100644 --- a/src/include/gdb_packet.h +++ b/src/include/gdb_packet.h @@ -21,12 +21,15 @@ #ifndef __GDB_PACKET_H #define __GDB_PACKET_H +#include + int gdb_getpacket(char *packet, int size); void gdb_putpacket(const char *packet, int size); #define gdb_putpacketz(packet) gdb_putpacket((packet), strlen(packet)) void gdb_putpacket_f(const char *packet, ...); void gdb_out(const char *buf); +void gdb_voutf(const char *fmt, va_list); void gdb_outf(const char *fmt, ...); #endif diff --git a/src/lpc43xx.c b/src/lpc43xx.c index 699580c..1425ccf 100644 --- a/src/lpc43xx.c +++ b/src/lpc43xx.c @@ -21,7 +21,6 @@ #include "general.h" #include "target.h" #include "target_internal.h" -#include "gdb_packet.h" #include "cortexm.h" #include "lpc_common.h" @@ -174,7 +173,7 @@ static bool lpc43xx_cmd_erase(target *t, int argc, const char *argv[]) return false; } - gdb_outf("Erase OK.\n"); + tc_printf(t, "Erase OK.\n"); return true; } @@ -220,14 +219,14 @@ static bool lpc43xx_cmd_mkboot(target *t, int argc, const char *argv[]) { /* Usage: mkboot 0 or mkboot 1 */ if (argc != 2) { - gdb_outf("Expected bank argument 0 or 1.\n"); + tc_printf(t, "Expected bank argument 0 or 1.\n"); return false; } const long int bank = strtol(argv[1], NULL, 0); if ((bank != 0) && (bank != 1)) { - gdb_outf("Unexpected bank number, should be 0 or 1.\n"); + tc_printf(t, "Unexpected bank number, should be 0 or 1.\n"); return false; } @@ -236,11 +235,11 @@ static bool lpc43xx_cmd_mkboot(target *t, int argc, const char *argv[]) /* special command to compute/write magic vector for signature */ struct lpc_flash *f = (struct lpc_flash *)t->flash; if (lpc_iap_call(f, IAP_CMD_SET_ACTIVE_BANK, bank, CPU_CLK_KHZ)) { - gdb_outf("Set bootable failed.\n"); + tc_printf(t, "Set bootable failed.\n"); return false; } - gdb_outf("Set bootable OK.\n"); + tc_printf(t, "Set bootable OK.\n"); return true; } diff --git a/src/nrf51.c b/src/nrf51.c index df609f2..7012669 100644 --- a/src/nrf51.c +++ b/src/nrf51.c @@ -24,7 +24,6 @@ #include "general.h" #include "target.h" #include "target_internal.h" -#include "gdb_packet.h" #include "cortexm.h" static int nrf51_flash_erase(struct target_flash *f, uint32_t addr, size_t len); @@ -36,7 +35,7 @@ static bool nrf51_cmd_read_hwid(target *t); static bool nrf51_cmd_read_fwid(target *t); static bool nrf51_cmd_read_deviceid(target *t); static bool nrf51_cmd_read_deviceaddr(target *t); -static bool nrf51_cmd_read_help(void); +static bool nrf51_cmd_read_help(target *t); static bool nrf51_cmd_read(target *t, int argc, const char *argv[]); const struct command_s nrf51_cmd_list[] = { @@ -249,7 +248,7 @@ static int nrf51_flash_write(struct target_flash *f, static bool nrf51_cmd_erase_all(target *t) { - gdb_out("erase..\n"); + tc_printf(t, "erase..\n"); /* Enable erase */ target_mem_write32(t, NRF51_NVMC_CONFIG, NRF51_NVMC_CONFIG_EEN); @@ -273,14 +272,14 @@ static bool nrf51_cmd_erase_all(target *t) static bool nrf51_cmd_read_hwid(target *t) { uint32_t hwid = target_mem_read32(t, NRF51_FICR_CONFIGID) & 0xFFFF; - gdb_outf("Hardware ID: 0x%04X\n", hwid); + tc_printf(t, "Hardware ID: 0x%04X\n", hwid); return true; } static bool nrf51_cmd_read_fwid(target *t) { uint32_t fwid = (target_mem_read32(t, NRF51_FICR_CONFIGID) >> 16) & 0xFFFF; - gdb_outf("Firmware ID: 0x%04X\n", fwid); + tc_printf(t, "Firmware ID: 0x%04X\n", fwid); return true; } @@ -289,7 +288,7 @@ static bool nrf51_cmd_read_deviceid(target *t) uint32_t deviceid_low = target_mem_read32(t, NRF51_FICR_DEVICEID_LOW); uint32_t deviceid_high = target_mem_read32(t, NRF51_FICR_DEVICEID_HIGH); - gdb_outf("Device ID: 0x%08X%08X\n", deviceid_high, deviceid_low); + tc_printf(t, "Device ID: 0x%08X%08X\n", deviceid_high, deviceid_low); return true; } @@ -300,20 +299,20 @@ static bool nrf51_cmd_read_deviceaddr(target *t) uint32_t addr_high = target_mem_read32(t, NRF51_FICR_DEVICEADDR_HIGH) & 0xFFFF; if ((addr_type & 1) == 0) { - gdb_outf("Publicly Listed Address: 0x%04X%08X\n", addr_high, addr_low); + tc_printf(t, "Publicly Listed Address: 0x%04X%08X\n", addr_high, addr_low); } else { - gdb_outf("Randomly Assigned Address: 0x%04X%08X\n", addr_high, addr_low); + tc_printf(t, "Randomly Assigned Address: 0x%04X%08X\n", addr_high, addr_low); } return true; } -static bool nrf51_cmd_read_help(void) +static bool nrf51_cmd_read_help(target *t) { const struct command_s *c; - gdb_out("Read commands:\n"); + tc_printf(t, "Read commands:\n"); for(c = nrf51_read_cmd_list; c->cmd; c++) - gdb_outf("\t%s -- %s\n", c->cmd, c->help); + tc_printf(t, "\t%s -- %s\n", c->cmd, c->help); return true; } @@ -329,6 +328,6 @@ static bool nrf51_cmd_read(target *t, int argc, const char *argv[]) return !c->handler(t, argc - 1, &argv[1]); } - return nrf51_cmd_read_help(); + return nrf51_cmd_read_help(t); } diff --git a/src/sam3x.c b/src/sam3x.c index 4cd1227..d320c27 100644 --- a/src/sam3x.c +++ b/src/sam3x.c @@ -27,7 +27,6 @@ #include "general.h" #include "target.h" #include "target_internal.h" -#include "gdb_packet.h" static int sam4_flash_erase(struct target_flash *f, uint32_t addr, size_t len); static int sam3_flash_erase(struct target_flash *f, uint32_t addr, size_t len); @@ -334,7 +333,7 @@ static bool sam3x_cmd_gpnvm_get(target *t) uint32_t base = sam3x_flash_base(t); sam3x_flash_cmd(t, base, EEFC_FCR_FCMD_GGPB, 0); - gdb_outf("GPNVM: 0x%08X\n", target_mem_read32(t, EEFC_FRR(base))); + tc_printf(t, "GPNVM: 0x%08X\n", target_mem_read32(t, EEFC_FRR(base))); return true; } @@ -345,7 +344,7 @@ static bool sam3x_cmd_gpnvm_set(target *t, int argc, char *argv[]) uint32_t base = sam3x_flash_base(t); if (argc != 3) { - gdb_out("usage: monitor gpnvm_set \n"); + tc_printf(t, "usage: monitor gpnvm_set \n"); return false; } bit = atol(argv[1]); diff --git a/src/samd.c b/src/samd.c index 294018f..9ad99ce 100644 --- a/src/samd.c +++ b/src/samd.c @@ -35,7 +35,6 @@ #include "general.h" #include "target.h" #include "target_internal.h" -#include "gdb_packet.h" #include "cortexm.h" static int samd_flash_erase(struct target_flash *t, uint32_t addr, size_t len); @@ -538,17 +537,17 @@ static bool samd_cmd_erase_all(target *t) /* Test the protection error bit in Status A */ if (status & SAMD_STATUSA_PERR) { - gdb_outf("Erase failed due to a protection error.\n"); + tc_printf(t, "Erase failed due to a protection error.\n"); return true; } /* Test the fail bit in Status A */ if (status & SAMD_STATUSA_FAIL) { - gdb_outf("Erase failed.\n"); + tc_printf(t, "Erase failed.\n"); return true; } - gdb_outf("Erase successful!\n"); + tc_printf(t, "Erase successful!\n"); return true; } @@ -604,7 +603,7 @@ static bool samd_cmd_unlock_flash(target *t) static bool samd_cmd_read_userrow(target *t) { - gdb_outf("User Row: 0x%08x%08x\n", + tc_printf(t, "User Row: 0x%08x%08x\n", target_mem_read32(t, SAMD_NVM_USER_ROW_HIGH), target_mem_read32(t, SAMD_NVM_USER_ROW_LOW)); @@ -616,13 +615,13 @@ static bool samd_cmd_read_userrow(target *t) */ static bool samd_cmd_serial(target *t) { - gdb_outf("Serial Number: 0x"); + tc_printf(t, "Serial Number: 0x"); for (uint32_t i = 0; i < 4; i++) { - gdb_outf("%08x", target_mem_read32(t, SAMD_NVM_SERIAL(i))); + tc_printf(t, "%08x", target_mem_read32(t, SAMD_NVM_SERIAL(i))); } - gdb_outf("\n"); + tc_printf(t, "\n"); return true; } @@ -666,16 +665,16 @@ static bool samd_cmd_mbist(target *t) /* Test the protection error bit in Status A */ if (status & SAMD_STATUSA_PERR) { - gdb_outf("MBIST not run due to protection error.\n"); + tc_printf(t, "MBIST not run due to protection error.\n"); return true; } /* Test the fail bit in Status A */ if (status & SAMD_STATUSA_FAIL) { - gdb_outf("MBIST Fail @ 0x%08x\n", - target_mem_read32(t, SAMD_DSU_ADDRESS)); + tc_printf(t, "MBIST Fail @ 0x%08x\n", + target_mem_read32(t, SAMD_DSU_ADDRESS)); } else { - gdb_outf("MBIST Passed!\n"); + tc_printf(t, "MBIST Passed!\n"); } return true; @@ -694,8 +693,8 @@ static bool samd_cmd_ssb(target *t) if (target_check_error(t)) return -1; - gdb_outf("Set the security bit! " - "You will need to issue 'monitor erase_mass' to clear this.\n"); + tc_printf(t, "Set the security bit! " + "You will need to issue 'monitor erase_mass' to clear this.\n"); return true; } diff --git a/src/stm32f1.c b/src/stm32f1.c index 13996b3..7c92942 100644 --- a/src/stm32f1.c +++ b/src/stm32f1.c @@ -33,7 +33,6 @@ #include "target.h" #include "target_internal.h" #include "cortexm.h" -#include "gdb_packet.h" static bool stm32f1_cmd_erase_mass(target *t); static bool stm32f1_cmd_option(target *t, int argc, char *argv[]); @@ -166,7 +165,7 @@ bool stm32f1_probe(target *t) } flash_size = (target_mem_read32(t, FLASHSIZE_F0) & 0xffff) *0x400; - gdb_outf("flash size %d block_size %d\n", flash_size, block_size); + tc_printf(t, "flash size %d block_size %d\n", flash_size, block_size); target_add_ram(t, 0x20000000, 0x5000); stm32f1_add_flash(t, 0x8000000, flash_size, block_size); target_add_commands(t, stm32f1_cmd_list, "STM32F0"); @@ -323,16 +322,16 @@ static bool stm32f1_cmd_option(target *t, int argc, char *argv[]) stm32f1_option_erase(t); stm32f1_option_write_erased(t, FLASH_OBP_RDP, flash_obp_rdp_key); } else if (rdprt) { - gdb_out("Device is Read Protected\n"); - gdb_out("Use \"monitor option erase\" to unprotect, erasing device\n"); + tc_printf(t, "Device is Read Protected\n"); + tc_printf(t, "Use \"monitor option erase\" to unprotect, erasing device\n"); return true; } else if (argc == 3) { addr = strtol(argv[1], NULL, 0); val = strtol(argv[2], NULL, 0); stm32f1_option_write(t, addr, val); } else { - gdb_out("usage: monitor option erase\n"); - gdb_out("usage: monitor option \n"); + tc_printf(t, "usage: monitor option erase\n"); + tc_printf(t, "usage: monitor option \n"); } if (0 && flash_obp_rdp_key == FLASH_OBP_RDP_KEY_F3) { @@ -347,8 +346,8 @@ static bool stm32f1_cmd_option(target *t, int argc, char *argv[]) for (int i = 0; i < 0xf; i += 4) { addr = 0x1ffff800 + i; val = target_mem_read32(t, addr); - gdb_outf("0x%08X: 0x%04X\n", addr, val & 0xFFFF); - gdb_outf("0x%08X: 0x%04X\n", addr + 2, val >> 16); + tc_printf(t, "0x%08X: 0x%04X\n", addr, val & 0xFFFF); + tc_printf(t, "0x%08X: 0x%04X\n", addr + 2, val >> 16); } return true; } diff --git a/src/stm32f4.c b/src/stm32f4.c index 33844ae..2061925 100644 --- a/src/stm32f4.c +++ b/src/stm32f4.c @@ -34,7 +34,6 @@ #include "target.h" #include "target_internal.h" #include "cortexm.h" -#include "gdb_packet.h" static bool stm32f4_cmd_erase_mass(target *t); static bool stm32f4_cmd_option(target *t, int argc, char *argv[]); @@ -270,7 +269,7 @@ static bool stm32f4_cmd_erase_mass(target *t) const char spinner[] = "|/-\\"; int spinindex = 0; - gdb_out("Erasing flash... This may take a few seconds. "); + tc_printf(t, "Erasing flash... This may take a few seconds. "); stm32f4_flash_unlock(t); /* Flash mass erase start instruction */ @@ -279,13 +278,13 @@ static bool stm32f4_cmd_erase_mass(target *t) /* Read FLASH_SR to poll for BSY bit */ while (target_mem_read32(t, FLASH_SR) & FLASH_SR_BSY) { - gdb_outf("\b%c", spinner[spinindex++ % 4]); + tc_printf(t, "\b%c", spinner[spinindex++ % 4]); if(target_check_error(t)) { - gdb_out("\n"); + tc_printf(t, "\n"); return false; } } - gdb_out("\n"); + tc_printf(t, "\n"); /* Check for error */ uint16_t sr = target_mem_read32(t, FLASH_SR); @@ -336,14 +335,14 @@ static bool stm32f4_cmd_option(target *t, int argc, char *argv[]) val = strtoul(argv[2], NULL, 0); stm32f4_option_write(t, val); } else { - gdb_out("usage: monitor option erase\n"); - gdb_out("usage: monitor option write \n"); + tc_printf(t, "usage: monitor option erase\n"); + tc_printf(t, "usage: monitor option write \n"); } for (int i = 0; i < len; i += 8) { uint32_t addr = start + i; val = target_mem_read32(t, addr); - gdb_outf("0x%08X: 0x%04X\n", addr, val & 0xFFFF); + tc_printf(t, "0x%08X: 0x%04X\n", addr, val & 0xFFFF); } return true; } diff --git a/src/stm32l0.c b/src/stm32l0.c index 699d23e..35fda48 100644 --- a/src/stm32l0.c +++ b/src/stm32l0.c @@ -76,7 +76,6 @@ #include "general.h" #include "target.h" #include "target_internal.h" -#include "gdb_packet.h" #include "cortexm.h" #define STM32Lx_NVM_PECR(p) ((p) + 0x04) @@ -576,7 +575,7 @@ static bool stm32lx_cmd_option(target* t, int argc, char** argv) const size_t opt_size = stm32lx_nvm_option_size(t); if (!stm32lx_nvm_opt_unlock(t, nvm)) { - gdb_out("unable to unlock NVM option bytes\n"); + tc_printf(t, "unable to unlock NVM option bytes\n"); return true; } @@ -589,25 +588,25 @@ static bool stm32lx_cmd_option(target* t, int argc, char** argv) else if (argc == 4 && !strncasecmp(argv[1], "raw", cb)) { uint32_t addr = strtoul(argv[2], NULL, 0); uint32_t val = strtoul(argv[3], NULL, 0); - gdb_outf("raw %08x <- %08x\n", addr, val); + tc_printf(t, "raw %08x <- %08x\n", addr, val); if ( addr < STM32Lx_NVM_OPT_PHYS || addr >= STM32Lx_NVM_OPT_PHYS + opt_size || (addr & 3)) goto usage; if (!stm32lx_option_write(t, addr, val)) - gdb_out("option write failed\n"); + tc_printf(t, "option write failed\n"); } else if (argc == 4 && !strncasecmp(argv[1], "write", cb)) { uint32_t addr = strtoul(argv[2], NULL, 0); uint32_t val = strtoul(argv[3], NULL, 0); val = (val & 0xffff) | ((~val & 0xffff) << 16); - gdb_outf("write %08x <- %08x\n", addr, val); + tc_printf(t, "write %08x <- %08x\n", addr, val); if ( addr < STM32Lx_NVM_OPT_PHYS || addr >= STM32Lx_NVM_OPT_PHYS + opt_size || (addr & 3)) goto usage; if (!stm32lx_option_write(t, addr, val)) - gdb_out("option write failed\n"); + tc_printf(t, "option write failed\n"); } else if (argc == 2 && !strncasecmp(argv[1], "show", cb)) ; @@ -618,10 +617,10 @@ static bool stm32lx_cmd_option(target* t, int argc, char** argv) for(unsigned i = 0; i < opt_size; i += sizeof(uint32_t)) { uint32_t addr = STM32Lx_NVM_OPT_PHYS + i; uint32_t val = target_mem_read32(t, addr); - gdb_outf("0x%08x: 0x%04x 0x%04x %s\n", - addr, val & 0xffff, (val >> 16) & 0xffff, - ((val & 0xffff) == ((~val >> 16) & 0xffff)) - ? "OK" : "ERR"); + tc_printf(t, "0x%08x: 0x%04x 0x%04x %s\n", + addr, val & 0xffff, (val >> 16) & 0xffff, + ((val & 0xffff) == ((~val >> 16) & 0xffff)) + ? "OK" : "ERR"); } if (stm32lx_is_stm32l1(t)) { @@ -634,17 +633,17 @@ static bool stm32lx_cmd_option(target* t, int argc, char** argv) rdprot = 2; else rdprot = 1; - gdb_outf("OPTR: 0x%08x, RDPRT %d, SPRMD %d, " - "BOR %d, WDG_SW %d, nRST_STP %d, nRST_STBY %d, " - "nBFB2 %d\n", - optr, rdprot, - (optr & STM32L1_NVM_OPTR_SPRMOD) ? 1 : 0, - (optr >> STM32L1_NVM_OPTR_BOR_LEV_S) - & STM32L1_NVM_OPTR_BOR_LEV_M, - (optr & STM32Lx_NVM_OPTR_WDG_SW) ? 1 : 0, - (optr & STM32L1_NVM_OPTR_nRST_STOP) ? 1 : 0, - (optr & STM32L1_NVM_OPTR_nRST_STDBY) ? 1 : 0, - (optr & STM32L1_NVM_OPTR_nBFB2) ? 1 : 0); + tc_printf(t, "OPTR: 0x%08x, RDPRT %d, SPRMD %d, " + "BOR %d, WDG_SW %d, nRST_STP %d, nRST_STBY %d, " + "nBFB2 %d\n", + optr, rdprot, + (optr & STM32L1_NVM_OPTR_SPRMOD) ? 1 : 0, + (optr >> STM32L1_NVM_OPTR_BOR_LEV_S) + & STM32L1_NVM_OPTR_BOR_LEV_M, + (optr & STM32Lx_NVM_OPTR_WDG_SW) ? 1 : 0, + (optr & STM32L1_NVM_OPTR_nRST_STOP) ? 1 : 0, + (optr & STM32L1_NVM_OPTR_nRST_STDBY) ? 1 : 0, + (optr & STM32L1_NVM_OPTR_nBFB2) ? 1 : 0); } else { uint32_t optr = target_mem_read32(t, STM32Lx_NVM_OPTR(nvm)); @@ -656,28 +655,28 @@ static bool stm32lx_cmd_option(target* t, int argc, char** argv) rdprot = 2; else rdprot = 1; - gdb_outf("OPTR: 0x%08x, RDPROT %d, WPRMOD %d, WDG_SW %d, " - "BOOT1 %d\n", - optr, rdprot, - (optr & STM32L0_NVM_OPTR_WPRMOD) ? 1 : 0, - (optr & STM32Lx_NVM_OPTR_WDG_SW) ? 1 : 0, - (optr & STM32L0_NVM_OPTR_BOOT1) ? 1 : 0); + tc_printf(t, "OPTR: 0x%08x, RDPROT %d, WPRMOD %d, WDG_SW %d, " + "BOOT1 %d\n", + optr, rdprot, + (optr & STM32L0_NVM_OPTR_WPRMOD) ? 1 : 0, + (optr & STM32Lx_NVM_OPTR_WDG_SW) ? 1 : 0, + (optr & STM32L0_NVM_OPTR_BOOT1) ? 1 : 0); } goto done; usage: - gdb_out("usage: monitor option [ARGS]\n"); - gdb_out(" show - Show options in NVM and as" - " loaded\n"); - gdb_out(" obl_launch - Reload options from NVM\n"); - gdb_out(" write - Set option half-word; " - "complement computed\n"); - gdb_out(" raw - Set option word\n"); - gdb_outf("The value of must be word aligned and from 0x%08x " - "to +0x%x\n", - STM32Lx_NVM_OPT_PHYS, - STM32Lx_NVM_OPT_PHYS + opt_size - sizeof(uint32_t)); + tc_printf(t, "usage: monitor option [ARGS]\n"); + tc_printf(t, " show - Show options in NVM and as" + " loaded\n"); + tc_printf(t, " obl_launch - Reload options from NVM\n"); + tc_printf(t, " write - Set option half-word; " + "complement computed\n"); + tc_printf(t, " raw - Set option word\n"); + tc_printf(t, "The value of must be word aligned and from 0x%08x " + "to +0x%x\n", + STM32Lx_NVM_OPT_PHYS, + STM32Lx_NVM_OPT_PHYS + opt_size - sizeof(uint32_t)); done: stm32lx_nvm_lock(t, nvm); @@ -690,7 +689,7 @@ static bool stm32lx_cmd_eeprom(target* t, int argc, char** argv) const uint32_t nvm = stm32lx_nvm_phys(t); if (!stm32lx_nvm_prog_data_unlock(t, nvm)) { - gdb_out("unable to unlock EEPROM\n"); + tc_printf(t, "unable to unlock EEPROM\n"); return true; } @@ -706,23 +705,23 @@ static bool stm32lx_cmd_eeprom(target* t, int argc, char** argv) goto usage; if (!strncasecmp(argv[1], "byte", cb)) { - gdb_outf("write byte 0x%08x <- 0x%08x\n", addr, val); + tc_printf(t, "write byte 0x%08x <- 0x%08x\n", addr, val); if (!stm32lx_eeprom_write(t, addr, 1, val)) - gdb_out("eeprom write failed\n"); + tc_printf(t, "eeprom write failed\n"); } else if (!strncasecmp(argv[1], "halfword", cb)) { val &= 0xffff; - gdb_outf("write halfword 0x%08x <- 0x%04x\n", + tc_printf(t, "write halfword 0x%08x <- 0x%04x\n", addr, val); if (addr & 1) goto usage; if (!stm32lx_eeprom_write(t, addr, 2, val)) - gdb_out("eeprom write failed\n"); + tc_printf(t, "eeprom write failed\n"); } else if (!strncasecmp(argv[1], "word", cb)) { - gdb_outf("write word 0x%08x <- 0x%08x\n", addr, val); + tc_printf(t, "write word 0x%08x <- 0x%08x\n", addr, val); if (addr & 3) goto usage; if (!stm32lx_eeprom_write(t, addr, 4, val)) - gdb_out("eeprom write failed\n"); + tc_printf(t, "eeprom write failed\n"); } else goto usage; @@ -733,14 +732,13 @@ static bool stm32lx_cmd_eeprom(target* t, int argc, char** argv) goto done; usage: - gdb_out("usage: monitor eeprom [ARGS]\n"); - gdb_out(" byte - Write a byte\n"); - gdb_out(" halfword - Write a half-word\n"); - gdb_out(" word - Write a word\n"); - gdb_outf("The value of must in the interval [0x%08x, 0x%x)\n", - STM32Lx_NVM_EEPROM_PHYS, - STM32Lx_NVM_EEPROM_PHYS - + stm32lx_nvm_eeprom_size(t)); + tc_printf(t, "usage: monitor eeprom [ARGS]\n"); + tc_printf(t, " byte - Write a byte\n"); + tc_printf(t, " halfword - Write a half-word\n"); + tc_printf(t, " word - Write a word\n"); + tc_printf(t, "The value of must in the interval [0x%08x, 0x%x)\n", + STM32Lx_NVM_EEPROM_PHYS, + STM32Lx_NVM_EEPROM_PHYS + stm32lx_nvm_eeprom_size(t)); done: stm32lx_nvm_lock(t, nvm); diff --git a/src/stm32l4.c b/src/stm32l4.c index 24d1eb8..78e14ac 100644 --- a/src/stm32l4.c +++ b/src/stm32l4.c @@ -34,7 +34,6 @@ #include "target.h" #include "target_internal.h" #include "cortexm.h" -#include "gdb_packet.h" static bool stm32l4_cmd_erase_mass(target *t); static bool stm32l4_cmd_erase_bank1(target *t); @@ -228,7 +227,7 @@ static bool stm32l4_cmd_erase(target *t, uint32_t action) const char spinner[] = "|/-\\"; int spinindex = 0; - gdb_out("Erasing flash... This may take a few seconds. "); + tc_printf(t, "Erasing flash... This may take a few seconds. "); stm32l4_flash_unlock(t); /* Flash erase action start instruction */ @@ -237,13 +236,13 @@ static bool stm32l4_cmd_erase(target *t, uint32_t action) /* Read FLASH_SR to poll for BSY bit */ while (target_mem_read32(t, FLASH_SR) & FLASH_SR_BSY) { - gdb_outf("\b%c", spinner[spinindex++ % 4]); + tc_printf(t, "\b%c", spinner[spinindex++ % 4]); if(target_check_error(t)) { - gdb_out("\n"); + tc_printf(t, "\n"); return false; } } - gdb_out("\n"); + tc_printf(t, "\n"); /* Check for error */ uint16_t sr = target_mem_read32(t, FLASH_SR); @@ -276,12 +275,12 @@ static bool stm32l4_cmd_option(target *t, int argc, char *argv[]) for (int i = 0; i < 0x23; i += 8) { addr = 0x1fff7800 + i; val = target_mem_read32(t, addr); - gdb_outf("0x%08X: 0x%08x\n", addr, val); + tc_printf(t, "0x%08X: 0x%08x\n", addr, val); } for (int i = 8; i < 0x23; i += 8) { addr = 0x1ffff800 + i; val = target_mem_read32(t, addr); - gdb_outf("0x%08X: 0x%08X\n", addr, val); + tc_printf(t, "0x%08X: 0x%08X\n", addr, val); } return true; } diff --git a/src/target.c b/src/target.c index 5e98009..9401815 100644 --- a/src/target.c +++ b/src/target.c @@ -400,14 +400,12 @@ void target_mem_write8(target *t, uint32_t addr, uint8_t value) target_mem_write(t, addr, &value, sizeof(value)); } -#include "gdb_packet.h" - void target_command_help(target *t) { for (struct target_command_s *tc = t->commands; tc; tc = tc->next) { - gdb_outf("%s specific commands:\n", tc->specific_name); + tc_printf(t, "%s specific commands:\n", tc->specific_name); for(const struct command_s *c = tc->cmds; c->cmd; c++) - gdb_outf("\t%s -- %s\n", c->cmd, c->help); + tc_printf(t, "\t%s -- %s\n", c->cmd, c->help); } } @@ -420,3 +418,13 @@ int target_command(target *t, int argc, const char *argv[]) return -1; } +#include "gdb_packet.h" +void tc_printf(target *t, const char *fmt, ...) +{ + (void)t; + va_list ap; + va_start(ap, fmt); + gdb_voutf(fmt, ap); + va_end(ap); +} + diff --git a/src/target_internal.h b/src/target_internal.h index 190ea72..ea0bfbc 100644 --- a/src/target_internal.h +++ b/src/target_internal.h @@ -141,6 +141,9 @@ void target_mem_write32(target *t, uint32_t addr, uint32_t value); void target_mem_write16(target *t, uint32_t addr, uint16_t value); void target_mem_write8(target *t, uint32_t addr, uint8_t value); +/* Access to host controller interface */ +void tc_printf(target *t, const char *fmt, ...); + /* Probe for various targets. * Actual functions implemented in their respective drivers. */