diff --git a/src/target/stm32l0.c b/src/target/stm32l0.c
index 8e81d84..967f0f9 100644
--- a/src/target/stm32l0.c
+++ b/src/target/stm32l0.c
@@ -87,7 +87,10 @@
 
 #define STM32L0_NVM_PHYS             (0x40022000ul)
 #define STM32L0_NVM_OPT_SIZE         (12)
-#define STM32L0_NVM_EEPROM_SIZE      (2*1024)
+#define STM32L0_NVM_EEPROM_CAT1_SIZE (1*512)
+#define STM32L0_NVM_EEPROM_CAT2_SIZE (1*1024)
+#define STM32L0_NVM_EEPROM_CAT3_SIZE (2*1024)
+#define STM32L0_NVM_EEPROM_CAT5_SIZE (6*1024)
 
 #define STM32L1_NVM_PHYS             (0x40023c00ul)
 #define STM32L1_NVM_OPT_SIZE         (32)
@@ -174,8 +177,11 @@ enum {
 static bool stm32lx_is_stm32l1(target* t)
 {
         switch (t->idcode) {
-        case 0x417:                   /* STM32L0xx */
-                return false;
+        case 0x457:                   /* STM32L0xx Cat1 */
+        case 0x425:                   /* STM32L0xx Cat2 */
+        case 0x417:                   /* STM32L0xx Cat3 */
+        case 0x447:                   /* STM32L0xx Cat5 */
+               return false;
         default:                      /* STM32L1xx */
                 return true;
         }
@@ -184,8 +190,14 @@ static bool stm32lx_is_stm32l1(target* t)
 static uint32_t stm32lx_nvm_eeprom_size(target *t)
 {
         switch (t->idcode) {
-        case 0x417:                   /* STM32L0xx */
-                return STM32L0_NVM_EEPROM_SIZE;
+        case 0x457:                   /* STM32L0xx Cat1 */
+                return STM32L0_NVM_EEPROM_CAT1_SIZE;
+        case 0x425:                   /* STM32L0xx Cat2 */
+                return STM32L0_NVM_EEPROM_CAT2_SIZE;
+        case 0x417:                   /* STM32L0xx Cat3 */
+                return STM32L0_NVM_EEPROM_CAT3_SIZE;
+        case 0x447:                   /* STM32L0xx Cat5 */
+                return STM32L0_NVM_EEPROM_CAT5_SIZE;
         default:                      /* STM32L1xx */
                 return STM32L1_NVM_EEPROM_SIZE;
         }
@@ -194,7 +206,10 @@ static uint32_t stm32lx_nvm_eeprom_size(target *t)
 static uint32_t stm32lx_nvm_phys(target *t)
 {
         switch (t->idcode) {
-        case 0x417:                   /* STM32L0xx */
+        case 0x457:                   /* STM32L0xx Cat1 */
+        case 0x425:                   /* STM32L0xx Cat2 */
+        case 0x417:                   /* STM32L0xx Cat3 */
+        case 0x447:                   /* STM32L0xx Cat5 */
                 return STM32L0_NVM_PHYS;
         default:                      /* STM32L1xx */
                 return STM32L1_NVM_PHYS;
@@ -204,7 +219,10 @@ static uint32_t stm32lx_nvm_phys(target *t)
 static uint32_t stm32lx_nvm_option_size(target *t)
 {
         switch (t->idcode) {
-        case 0x417:                   /* STM32L0xx */
+        case 0x457:                   /* STM32L0xx Cat1 */
+        case 0x425:                   /* STM32L0xx Cat2 */
+        case 0x417:                   /* STM32L0xx Cat3 */
+        case 0x447:                   /* STM32L0xx Cat5 */
                 return STM32L0_NVM_OPT_SIZE;
         default:                      /* STM32L1xx */
                 return STM32L1_NVM_OPT_SIZE;
@@ -263,7 +281,10 @@ bool stm32l0_probe(target* t)
 
 	idcode = target_mem_read32(t, STM32L0_DBGMCU_IDCODE_PHYS) & 0xfff;
 	switch (idcode) {
-	case 0x417:                   /* STM32L0x[123] & probably others */
+	case 0x457:                   /* STM32L0xx Cat1 */
+	case 0x425:                   /* STM32L0xx Cat2 */
+	case 0x417:                   /* STM32L0xx Cat3 */
+	case 0x447:                   /* STM32L0xx Cat5 */
 		t->idcode = idcode;
 		t->driver = "STM32L0x";
 		target_add_ram(t, 0x20000000, 0x2000);
diff --git a/src/target/stm32l4.c b/src/target/stm32l4.c
index 8aab716..8148a56 100644
--- a/src/target/stm32l4.c
+++ b/src/target/stm32l4.c
@@ -1,7 +1,7 @@
 /*
  * This file is part of the Black Magic Debug project.
  *
- * Copyright (C) 2015  Uwe Bonnes
+ * Copyright (C) 2015, 2017  Uwe Bonnes
  * Written by Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
  *
  * This program is free software: you can redistribute it and/or modify
@@ -106,7 +106,6 @@ static const char stm32l4_driver_str[] = "STM32L4xx";
 
 #define DBGMCU_IDCODE	0xE0042000
 #define FLASH_SIZE_REG  0x1FFF75E0
-#define FLASH_SIZE_REG  0x1FFF75E0
 
 /* This routine is uses double word access.*/
 static const uint16_t stm32l4_flash_write_stub[] = {
@@ -149,7 +148,7 @@ bool stm32l4_probe(target *t)
 
 	idcode = target_mem_read32(t, DBGMCU_IDCODE);
 	switch(idcode & 0xFFF) {
-	case 0x415: /*  */
+	case 0x415: /* L471/RM0392, L475/RM0395, L476/RM0351 */
 		t->driver = stm32l4_driver_str;
 		target_add_ram(t, 0x10000000, 1 << 15);
 		target_add_ram(t, 0x20000000, 3 << 15);
@@ -158,6 +157,14 @@ bool stm32l4_probe(target *t)
 		if ((size < 0x400) && (options & OR_DUALBANK))
 			bank1_start =  0x08000000 + (size << 9);
 		stm32l4_add_flash(t, 0x08000000, size << 10, PAGE_SIZE, bank1_start);
+		target_add_commands(t, stm32l4_cmd_list, "STM32L4 Dual bank");
+		return true;
+	case 0x435: /* L432 L442 L452 L462/RM0393, L431 L433 L443 rm0394  */
+		t->driver = stm32l4_driver_str;
+		target_add_ram(t, 0x20000000, 2 << 15);
+		size    = (target_mem_read32(t, FLASH_SIZE_REG) & 0xffff);
+		options =  target_mem_read32(t, FLASH_OPTR);
+		stm32l4_add_flash(t, 0x08000000, size << 10, PAGE_SIZE, bank1_start);
 		target_add_commands(t, stm32l4_cmd_list, "STM32L4");
 		return true;
 	}