From e7982d594e59e18e72035c5dfab5a90d18da2a06 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Sun, 27 Jun 2021 14:40:10 -0700 Subject: [PATCH] native: Added HW5 AUX interface definitions. --- src/platforms/native/platform.h | 38 ++++++++++++++++++++++++++++++--- 1 file changed, 35 insertions(+), 3 deletions(-) diff --git a/src/platforms/native/platform.h b/src/platforms/native/platform.h index 24c0db5..2c3c9c9 100644 --- a/src/platforms/native/platform.h +++ b/src/platforms/native/platform.h @@ -64,6 +64,17 @@ int usbuart_debug_write(const char *buf, size_t len); * Hardware 4 and older. (we needed the pin for SPI on 5) * PA15 -- Hardware 5 and newer. * Force DFU mode button: PB12 + * + * AUX Interface: + * SCLK = PB13 + * COPI = PB15 + * CIPO = PB14 + * FLASH_CS = PB5 + * DISPLAY_CS = PB6 + * DISPLAY_DC = PB8 + * BTN1 = PB12 + * BTN2 = PB9 + * VBAT = PA0 (ADC CH0) */ /* Hardware definitions... */ @@ -98,13 +109,13 @@ int usbuart_debug_write(const char *buf, size_t len); #define USB_PU_PORT GPIOA #define USB_PU_PIN GPIO8 -// For HW Rev 4 and older +/* For HW Rev 4 and older */ #define USB_VBUS_PORT GPIOB #define USB_VBUS_PIN GPIO13 -// IRQ stays the same for all hw revisions. +/* IRQ stays the same for all hw revisions. */ #define USB_VBUS_IRQ NVIC_EXTI15_10_IRQ -// For HW Rev 5 and newer +/* For HW Rev 5 and newer */ #define USB_VBUS5_PORT GPIOA #define USB_VBUS5_PIN GPIO15 @@ -117,6 +128,27 @@ int usbuart_debug_write(const char *buf, size_t len); #define LED_IDLE_RUN LED_1 #define LED_ERROR LED_2 +/* AUX Port */ +#define AUX_PORT GPIOB +#define AUX_SCLK_PORT AUX_PORT +#define AUX_COPI_PORT AUX_PORT +#define AUX_CIPO_PORT AUX_PORT +#define AUX_FCS_PORT AUX_PORT +#define AUX_DCS_PORT AUX_PORT +#define AUX_DDC_PORT AUX_PORT +#define AUX_BTN1_PORT AUX_PORT +#define AUX_BTN2_PORT AUX_PORT +#define AUX_VBAT_PORT GPIOA +#define AUX_SCLK GPIO13 +#define AUX_COPI GPIO15 +#define AUX_CIPO GPIO14 +#define AUX_FCS GPIO5 +#define AUX_DCS GPIO6 +#define AUX_DDC GPIO8 +#define AUX_BTN1 GPIO12 +#define AUX_BTN2 GPIO9 +#define AUX_VBAT GPIO0 + # define SWD_CR GPIO_CRL(SWDIO_PORT) # define SWD_CR_MULT (1 << (4 << 2))