From f55ad67b1bed0d0a4f11697bf09f2f170aafa21f Mon Sep 17 00:00:00 2001 From: Fabio Baltieri Date: Sun, 18 Apr 2021 21:09:47 +0100 Subject: [PATCH] adiv5: catch timeout on adiv5_ap_read_id and abort This adds a TRY_CATCH around the adiv5_ap_read_id() in adiv5_component_probe() and resets the DP when that happens. It seems like the STM32WLE5 comes with the AP of the inactive core enabled in a way that does not make it detectable, and the current code times out and leaves the whole device hanging. Catching the timeout and calling adiv5_dp_abort() seems to restore the device to a useable state. Tested on Seed LoRa-E5 (STM32E5JC). --- src/target/adiv5.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/src/target/adiv5.c b/src/target/adiv5.c index 57a6456..0617ee8 100644 --- a/src/target/adiv5.c +++ b/src/target/adiv5.c @@ -413,7 +413,17 @@ static void adiv5_component_probe(ADIv5_AP_t *ap, uint32_t addr, int recursion, addr &= 0xfffff000; /* Mask out base address */ if (addr == 0) /* No rom table on this AP */ return; - uint32_t cidr = adiv5_ap_read_id(ap, addr + CIDR0_OFFSET); + volatile uint32_t cidr; + volatile struct exception e; + TRY_CATCH (e, EXCEPTION_TIMEOUT) { + cidr = adiv5_ap_read_id(ap, addr + CIDR0_OFFSET); + } + if (e.type) { + DEBUG_WARN("CIDR read timeout on AP%d, aborting.\n", num_entry); + adiv5_dp_abort(ap->dp, ADIV5_DP_ABORT_DAPABORT); + return; + } + if ((cidr & ~CID_CLASS_MASK) != CID_PREAMBLE) return; #if defined(ENABLE_DEBUG)