EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 6 6
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L 4xxx:4053 U500
U 1 1 6270B9B6
P 6250 3950
F 0 "U500" H 6250 5031 50  0000 C CNN
F 1 "MAX4619" H 6250 4940 50  0000 C CNN
F 2 "Package_SO:SO-16_3.9x9.9mm_P1.27mm" H 6250 3950 50  0001 C CNN
F 3 "http://www.intersil.com/content/dam/Intersil/documents/cd40/cd4051bms-52bms-53bms.pdf" H 6250 3950 50  0001 C CNN
	1    6250 3950
	1    0    0    -1  
$EndComp
Wire Wire Line
	6250 4900 6250 4850
Wire Wire Line
	6250 4900 6300 4900
Wire Wire Line
	6350 4900 6350 4850
Wire Wire Line
	6300 4900 6300 5000
Connection ~ 6300 4900
Wire Wire Line
	6300 4900 6350 4900
$Comp
L power:GND #PWR0149
U 1 1 6270C54F
P 6300 5000
F 0 "#PWR0149" H 6300 4750 50  0001 C CNN
F 1 "GND" H 6305 4827 50  0000 C CNN
F 2 "" H 6300 5000 50  0001 C CNN
F 3 "" H 6300 5000 50  0001 C CNN
	1    6300 5000
	1    0    0    -1  
$EndComp
Text GLabel 5650 4350 0    50   Input ~ 0
MAX_SW_A
Text GLabel 5650 4450 0    50   Input ~ 0
MAX_SW_B
Wire Wire Line
	5750 4350 5650 4350
Wire Wire Line
	5650 4450 5750 4450
Text GLabel 4450 4250 0    50   Input ~ 0
MAX_EN
Text GLabel 5650 4550 0    50   Input ~ 0
GLITCH_SIG
Wire Wire Line
	5650 4550 5750 4550
Text GLabel 6850 3950 2    50   Input ~ 0
GLITCH_OUT
Text GLabel 5650 3750 0    50   Input ~ 0
Vdclo
$Comp
L power:GND #PWR0150
U 1 1 6271CC5F
P 5350 3650
F 0 "#PWR0150" H 5350 3400 50  0001 C CNN
F 1 "GND" V 5355 3522 50  0000 R CNN
F 2 "" H 5350 3650 50  0001 C CNN
F 3 "" H 5350 3650 50  0001 C CNN
	1    5350 3650
	0    1    1    0   
$EndComp
Wire Wire Line
	5750 3650 5350 3650
Wire Wire Line
	5650 3750 5750 3750
Wire Wire Line
	6250 3050 6500 3050
$Comp
L power:+3V3 #PWR0152
U 1 1 6271E09E
P 6500 3050
F 0 "#PWR0152" H 6500 2900 50  0001 C CNN
F 1 "+3V3" H 6515 3223 50  0000 C CNN
F 2 "" H 6500 3050 50  0001 C CNN
F 3 "" H 6500 3050 50  0001 C CNN
	1    6500 3050
	0    1    1    0   
$EndComp
Wire Wire Line
	4900 3100 4900 3950
Wire Wire Line
	4900 3950 5750 3950
Wire Wire Line
	6750 3650 7100 3650
Wire Wire Line
	7100 3650 7100 2300
Wire Wire Line
	7100 2300 4800 2300
Wire Wire Line
	4800 2300 4800 4050
Wire Wire Line
	4800 4050 5750 4050
Wire Wire Line
	6850 3950 6750 3950
Text Label 5200 3950 0    50   ~ 0
Vglitch_hi
Text Label 5200 4050 0    50   ~ 0
Vglitch_lo
Text Notes 6500 2950 0    50   ~ 0
TODO: use\nVBUS here\ninstead?
$Comp
L Device:R R500
U 1 1 62925A32
P 4700 4250
F 0 "R500" V 4493 4250 50  0000 C CNN
F 1 "4.7k" V 4584 4250 50  0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder" V 4630 4250 50  0001 C CNN
F 3 "~" H 4700 4250 50  0001 C CNN
	1    4700 4250
	0    1    1    0   
$EndComp
Wire Wire Line
	4550 4250 4450 4250
Wire Wire Line
	4850 4250 5000 4250
Text GLabel 5000 4400 3    50   Input ~ 0
EMERG_SHDN
Wire Wire Line
	5000 4400 5000 4250
Connection ~ 5000 4250
Wire Wire Line
	5000 4250 5750 4250
NoConn ~ 6750 3350
NoConn ~ 5750 3350
Wire Wire Line
	4900 3100 5050 3100
Text GLabel 5050 3100 2    50   Input ~ 0
Vdcflt
NoConn ~ 5750 3450
$EndSCHEMATC