diff --git a/drivers/hal_proto.h b/drivers/hal_proto.h index 7ce4322..6d4e0f0 100644 --- a/drivers/hal_proto.h +++ b/drivers/hal_proto.h @@ -37,6 +37,11 @@ typedef enum { HAL_PROTO_TYPE_DCDC_POWER_DOWN = 0x60, HAL_PROTO_TYPE_DCDC_SET_VCC = 0x61, HAL_PROTO_TYPE_DCDC_RESTART = 0x62, + HAL_PROTO_TYPE_CORE_SET_VCC = 0x63, + HAL_PROTO_TYPE_CORE_GET_VCC = 0x64, + HAL_PROTO_TYPE_CORE_SWITCH_FET = 0x65, + HAL_PROTO_TYPE_CMP_VERSIONS = 0x66, + HAL_PROTO_TYPE_CMD_LEGACY = 0x7e, HAL_PROTO_TYPE_CMD_SYNC = 0x80, HAL_PROTO_TYPE_CMD_EXECUTE = 0x81, @@ -52,6 +57,9 @@ typedef enum { HAL_PROTO_TYPE_CMD_COM_RESET = 0x8b, HAL_PROTO_TYPE_CMD_PAUSE_LOOP = 0x8c, HAL_PROTO_TYPE_CMD_RESUME_LOOP = 0x8d, + HAL_PROTO_TYPE_CMD_KILL_ALL = 0x8e, + HAL_PROTO_TYPE_CMD_OVER_CURRENT = 0x8f, + HAL_PROTO_TYPE_ACKNOWLEDGE = 0x91, HAL_PROTO_TYPE_EXCEPTION = 0x92, HAL_PROTO_TYPE_DATA = 0x93, @@ -63,6 +71,121 @@ typedef enum { HAL_PROTO_CHECKSUM = 0x01 } hal_proto_flags_t; +typedef enum { + HAL_PROTO_ERR_NONE = 0x00, + HAL_PROTO_ERR_UNDEFINED = 0xffff, + + HAL_PROTO_ERR_EXECUTE_FUNCLET_NO_RAM_START = 0xFFFE, + HAL_PROTO_ERR_EXECUTE_FUNCLET_NO_RAM_SIZE = 0xFFFD, + HAL_PROTO_ERR_EXECUTE_FUNCLET_NO_OFFSET = 0xFFFC, + HAL_PROTO_ERR_EXECUTE_FUNCLET_NO_ADDRESS = 0xFFFB, + HAL_PROTO_ERR_EXECUTE_FUNCLET_NO_LENGTH = 0xFFFA, + HAL_PROTO_ERR_EXECUTE_FUNCLET_NO_TYPE = 0xFFF9, + HAL_PROTO_ERR_EXECUTE_FUNCLET_NO_LOCKA = 0xFFF8, + HAL_PROTO_ERR_EXECUTE_FUNCLET_EXECUTION_TIMEOUT = 0xFFF7, + HAL_PROTO_ERR_EXECUTE_FUNCLET_EXECUTION_ERROR = 0xFFF6, ++ + HAL_PROTO_ERR_WRITE_MEM_WORD_NO_RAM_ADDRESS = 0xFFF5, + HAL_PROTO_ERR_WRITE_MEM_WORD_NO_RAM_SIZE = 0xFFF4, + HAL_PROTO_ERR_WRITE_MEM_WORD_UNKNOWN = 0xFFF3, ++ + HAL_PROTO_ERR_WRITE_MEM_BYTES_NO_RAM_ADDRESS = 0xFFF2, + HAL_PROTO_ERR_WRITE_MEM_BYTES_NO_RAM_SIZE = 0xFFF1, + HAL_PROTO_ERR_WRITE_MEM_BYTES_UNKNOWN = 0xFFF0, ++ + HAL_PROTO_ERR_WRITE_FLASH_WORD_NO_FLASH_ADDRESS = 0xFFEF, + HAL_PROTO_ERR_WRITE_FLASH_WORD_NO_FLASH_SIZE = 0xFFEE, + HAL_PROTO_ERR_WRITE_FLASH_WORD_UNKNOWN = 0xFFED, ++ + HAL_PROTO_ERR_WRITE_FLASH_QUICK_UNKNOWN = 0xFFEC, ++ + HAL_PROTO_ERR_START_JTAG_NO_PROTOCOL = 0xFFEB, + HAL_PROTO_ERR_START_JTAG_PROTOCOL_UNKNOWN = 0xFFEA, ++ + HAL_PROTO_ERR_SET_CHAIN_CONFIGURATION_STREAM = 0xFFE9, ++ + HAL_PROTO_ERR_RESTORECONTEXT_RELEASE_JTAG_NO_WDT_ADDRESS = 0xFFE8, + HAL_PROTO_ERR_RESTORECONTEXT_RELEASE_JTAG_NO_WDT_VALUE = 0xFFE7, + HAL_PROTO_ERR_RESTORECONTEXT_RELEASE_JTAG_NO_PC = 0xFFE6, + HAL_PROTO_ERR_RESTORECONTEXT_RELEASE_JTAG_NO_SR = 0xFFE5, + HAL_PROTO_ERR_RESTORECONTEXT_RELEASE_JTAG_NO_CONTROL_MASK = 0xFFE4, + HAL_PROTO_ERR_RESTORECONTEXT_RELEASE_JTAG_NO_MDB = 0xFFE3, ++ + HAL_PROTO_ERR_READ_MEM_WORD_NO_ADDRESS = 0xFFF2, + HAL_PROTO_ERR_READ_MEM_WORD_NO_SIZE = 0xFFF1, ++ + HAL_PROTO_ERR_READ_MEM_UNKNOWN = 0xFFE0, ++ + HAL_PROTO_ERR_READ_MEM_BYTES_NO_ADDRESS = 0xFFDF, + HAL_PROTO_ERR_READ_MEM_BYTES_NO_SIZE = 0xFFDE, ++ + HAL_PROTO_ERR_PSA_NO_ADDRESS = 0xFFDD, + HAL_PROTO_ERR_PSA_NO_SIZE = 0xFFDC, ++ + HAL_PROTO_ERR_SYNC_JTAG_ASSERT_POR_JTAG_TIMEOUT = 0xFFDB, + HAL_PROTO_ERR_SYNC_JTAG_ASSERT_POR_NO_WDT_ADDRESS = 0xFFDA, + HAL_PROTO_ERR_SYNC_JTAG_ASSERT_POR_NO_WDT_VALUE = 0xFFD9, ++ + HAL_PROTO_ERR_WRITE_ALL_CPU_REGISTERS_STREAM = 0xFFD8, ++ + HAL_PROTO_ERR_WRITE_MEM_WORD_XV2_NO_RAM_ADDRESS = 0xFFD7, + HAL_PROTO_ERR_WRITE_MEM_WORD_XV2_NO_RAM_SIZE = 0xFFD6, ++ + HAL_PROTO_ERR_SECURE_NO_TGT_HAS_TEST_PIN = 0xFFD5, ++ + HAL_PROTO_ERR_SYNC_JTAG_CONDITIONAL_JTAG_TIMEOUT = 0xFFD4, + HAL_PROTO_ERR_SYNC_JTAG_CONDITIONAL_NO_WDT_ADDRESS = 0xFFD3, + HAL_PROTO_ERR_SYNC_JTAG_CONDITIONAL_NO_WDT_VALUE = 0xFFD2, ++ + HAL_PROTO_ERR_INSTRUCTION_BOUNDARY_ERROR = 0xFFD1, + HAL_PROTO_ERR_JTAG_VERSION_MISMATCH = 0xFFD0, ++ + HAL_PROTO_ERR_JTAG_MAILBOX_IN_TIMOUT = 0xFFCF, + HAL_PROTO_ERR_JTAG_PASSWORD_WRONG = 0xFFCE, ++ + HAL_PROTO_ERR_START_JTAG_NO_ACTIVATION_CODE = 0xFFCD, + HAL_PROTO_ERR_SINGLESTEP_WAITFOREEM_TIMEOUT = 0xFFCC, ++ + HAL_PROTO_ERR_CONFIG_NO_PARAMETER = 0xFFCB, + HAL_PROTO_ERR_CONFIG_NO_VALUE = 0xFFCA, + HAL_PROTO_ERR_CONFIG_PARAM_UNKNOWN_PARAMETER = 0xFFC9, ++ + HAL_PROTO_ERR_NO_NUM_BITS = 0xFFC8, + HAL_PROTO_ERR_ARRAY_SIZE_MISMATCH = 0xFFC7, ++ + HAL_PROTO_ERR_NO_COMMAND = 0xFFC6, + HAL_PROTO_ERR_UNKNOWN_COMMAND = 0xFFC5, + HAL_PROTO_ERR_NO_DATA = 0xFFC4, + HAL_PROTO_ERR_NO_BIT_SIZE = 0xFFC3, + HAL_PROTO_ERR_INVALID_BIT_SIZE = 0xFFC2, ++ + HAL_PROTO_ERR_UNLOCK_NO_PASSWORD_LENGTH = 0xFFC1, + HAL_PROTO_ERR_UNLOCK_INVALID_PASSWORD_LENGTH = 0xFFC0, ++ + HAL_PROTO_ERR_EXECUTE_FUNCLET_FINISH_TIMEOUT = 0xFFBF, ++ + HAL_PROTO_ERR_EXECUTE_FUNCLET_NO_MAXRSEL = 0xFFBE, ++ + HAL_PROTO_ERR_API_CALL_NOT_SUPPORTED = 0xFFBD, ++ + HAL_PROTO_ERR_MAGIC_PATTERN = 0xFFBC, + HAL_PROTO_ERR_MAGIC_PATTERN_BOOT_DATA_CRC_WRONG = 0xFFBB, + HAL_PROTO_ERR_DAP_NACK = 0xFFBA, ++ + HAL_PROTO_MESSAGE_NO_RESPONSE = 0x8000, + HAL_PROTO_EXCEPTION_NOT_IMPLEMENT_ERR = 0x8001, + HAL_PROTO_EXCEPTION_MSGID_ERR = 0x8002, + HAL_PROTO_EXCEPTION_CRC_ERR = 0x8003, + HAL_PROTO_EXCEPTION_RX_TIMEOUT_ERR = 0x8004, + HAL_PROTO_EXCEPTION_TX_TIMEOUT_ERR = 0x8005, + HAL_PROTO_EXCEPTION_RX_OVERFLOW_ERR = 0x8006, + HAL_PROTO_EXCEPTION_TX_NO_BUFFER = 0x8007, + HAL_PROTO_EXCEPTION_COM_RESET = 0x8008, + HAL_PROTO_EXCEPTION_RX_NO_BUFFER = 0x8009, + HAL_PROTO_EXCEPTION_RX_TO_SMALL_BUFFER = 0x800A, + HAL_PROTO_EXCEPTION_RX_LENGTH = 0x800B, +} hal_proto_error_t; + #define HAL_MAX_PAYLOAD 253 struct hal_proto { diff --git a/drivers/v3hil.c b/drivers/v3hil.c index 1fcd1a7..1702aac 100644 --- a/drivers/v3hil.c +++ b/drivers/v3hil.c @@ -41,73 +41,99 @@ typedef enum { HAL_PROTO_FID_SET_CHAIN_CONFIGURATION = 0x0e, HAL_PROTO_FID_GET_NUM_DEVICES = 0x0f, HAL_PROTO_FID_GET_INTERFACE_MODE = 0x10, - HAL_PROTO_FID_SJ_ASSERT_POR_SC = 0x11, - HAL_PROTO_FID_SJ_CONDITIONAL_SC = 0x12, - HAL_PROTO_FID_RC_RELEASE_JTAG = 0x13, - HAL_PROTO_FID_READ_MEM_BYTES = 0x14, - HAL_PROTO_FID_READ_MEM_WORDS = 0x15, - HAL_PROTO_FID_READ_MEM_QUICK = 0x16, - HAL_PROTO_FID_WRITE_MEM_BYTES = 0x17, - HAL_PROTO_FID_WRITE_MEM_WORDS = 0x18, - HAL_PROTO_FID_EEM_DX = 0x19, - HAL_PROTO_FID_EEM_DX_AFE2XX = 0x1a, - HAL_PROTO_FID_SINGLE_STEP = 0x1b, - HAL_PROTO_FID_READ_ALL_CPU_REGS = 0x1c, - HAL_PROTO_FID_WRITE_ALL_CPU_REGS = 0x1d, - HAL_PROTO_FID_PSA = 0x1e, - HAL_PROTO_FID_EXECUTE_FUNCLET = 0x1f, - HAL_PROTO_FID_EXECUTE_FUNCLET_JTAG = 0x20, - HAL_PROTO_FID_GET_DCO_FREQUENCY = 0x21, - HAL_PROTO_FID_GET_DCO_FREQUENCY_JTAG = 0x22, - HAL_PROTO_FID_GET_FLL_FREQUENCY = 0x23, - HAL_PROTO_FID_GET_FLL_FREQUENCY_JTAG = 0x24, - HAL_PROTO_FID_WAIT_FOR_STORAGE = 0x25, - HAL_PROTO_FID_SJ_ASSERT_POR_SC_X = 0x26, - HAL_PROTO_FID_SJ_CONDITIONAL_SC_X = 0x27, - HAL_PROTO_FID_RC_RELEASE_JTAG_X = 0x28, - HAL_PROTO_FID_READ_MEM_BYTES_X = 0x29, - HAL_PROTO_FID_READ_MEM_WORDS_X = 0x2a, - HAL_PROTO_FID_READ_MEM_QUICK_X = 0x2b, - HAL_PROTO_FID_WRITE_MEM_BYTES_X = 0x2c, - HAL_PROTO_FID_WRITE_MEM_WORDS_X = 0x2d, - HAL_PROTO_FID_EEM_DX_X = 0x2e, - HAL_PROTO_FID_SINGLE_STEP_X = 0x2f, - HAL_PROTO_FID_READ_ALL_CPU_REGS_X = 0x30, - HAL_PROTO_FID_WRITE_ALL_CPU_REGS_X = 0x31, - HAL_PROTO_FID_PSA_X = 0x32, - HAL_PROTO_FID_EXECUTE_FUNCLET_X = 0x33, - HAL_PROTO_FID_GET_DCO_FREQUENCY_X = 0x34, - HAL_PROTO_FID_GET_FLL_FREQUENCY_X = 0x35, - HAL_PROTO_FID_WAIT_FOR_STORAGE_X = 0x36, - HAL_PROTO_FID_BLOW_FUSE_XV2 = 0x37, - HAL_PROTO_FID_BLOW_FUSE_FRAM = 0x38, - HAL_PROTO_FID_SJ_ASSERT_POR_SC_XV2 = 0x39, - HAL_PROTO_FID_SJ_CONDITIONAL_SC_XV2 = 0x3a, - HAL_PROTO_FID_RC_RELEASE_JTAG_XV2 = 0x3b, - HAL_PROTO_FID_READ_MEM_WORDS_XV2 = 0x3c, - HAL_PROTO_FID_READ_MEM_QUICK_XV2 = 0x3d, - HAL_PROTO_FID_WRITE_MEM_WORDS_XV2 = 0x3e, - HAL_PROTO_FID_EEM_DX_XV2 = 0x3f, - HAL_PROTO_FID_SINGLE_STEP_XV2 = 0x40, - HAL_PROTO_FID_READ_ALL_CPU_REGS_XV2 = 0x41, - HAL_PROTO_FID_WRITE_ALL_CPU_REGS_XV2 = 0x42, - HAL_PROTO_FID_PSA_XV2 = 0x43, - HAL_PROTO_FID_EXECUTE_FUNCLET_XV2 = 0x44, - HAL_PROTO_FID_UNLOCK_DEVICE_XV2 = 0x45, - HAL_PROTO_FID_MAGIC_PATTERN = 0x46, - HAL_PROTO_FID_UNLOCK_C092 = 0x47, - HAL_PROTO_FID_HIL_COMMAND = 0x48, - HAL_PROTO_FID_POLL_JSTATE_REG = 0x49, - HAL_PROTO_FID_POLL_JSTATE_REG_FR57XX = 0x4a, - HAL_PROTO_FID_IS_JTAG_FUSE_BLOWN = 0x4b, - HAL_PROTO_FID_RESET_XV2 = 0x4c, - HAL_PROTO_FID_WRITE_FRAM_QUICK_XV2 = 0x4d, - HAL_PROTO_FID_SEND_JTAG_MAILBOX_XV2 = 0x4e, - HAL_PROTO_FID_SINGLE_STEP_JSTATE_XV2 = 0x4f, - HAL_PROTO_FID_POLL_JSTATE_REG_ET8 = 0x50, - HAL_PROTO_FID_RESET_STATIC_GLOBAL_VARS = 0x51, - HAL_PROTO_FID_RESET_430I = 0x52, - HAL_PROTO_FID_POLL_JSTATE_REG_430I = 0x53 + HAL_PROTO_FID_GET_DEVICE_ID_PTR = 0x11, + HAL_PROTO_FID_SJ_ASSERT_POR_SC , + HAL_PROTO_FID_SJ_CONDITIONAL_SC , + HAL_PROTO_FID_RC_RELEASE_JTAG , + HAL_PROTO_FID_READ_MEM_BYTES , + HAL_PROTO_FID_READ_MEM_WORDS , + HAL_PROTO_FID_READ_MEM_QUICK , + HAL_PROTO_FID_WRITE_MEM_BYTES , + HAL_PROTO_FID_WRITE_MEM_WORDS , + HAL_PROTO_FID_EEM_DX , + HAL_PROTO_FID_EEM_DX_AFE2XX , + HAL_PROTO_FID_SINGLE_STEP , + HAL_PROTO_FID_READ_ALL_CPU_REGS , + HAL_PROTO_FID_WRITE_ALL_CPU_REGS , + HAL_PROTO_FID_PSA , + HAL_PROTO_FID_EXECUTE_FUNCLET , /* 0x20 */ + HAL_PROTO_FID_EXECUTE_FUNCLET_JTAG , + HAL_PROTO_FID_GET_DCO_FREQUENCY , + HAL_PROTO_FID_GET_DCO_FREQUENCY_JTAG , + HAL_PROTO_FID_GET_FLL_FREQUENCY , + HAL_PROTO_FID_GET_FLL_FREQUENCY_JTAG , + HAL_PROTO_FID_WAIT_FOR_STORAGE , + HAL_PROTO_FID_SJ_ASSERT_POR_SC_X , + HAL_PROTO_FID_SJ_CONDITIONAL_SC_X , + HAL_PROTO_FID_RC_RELEASE_JTAG_X , + HAL_PROTO_FID_READ_MEM_BYTES_X , + HAL_PROTO_FID_READ_MEM_WORDS_X , + HAL_PROTO_FID_READ_MEM_QUICK_X , + HAL_PROTO_FID_WRITE_MEM_BYTES_X , + HAL_PROTO_FID_WRITE_MEM_WORDS_X , + HAL_PROTO_FID_EEM_DX_X , + HAL_PROTO_FID_SINGLE_STEP_X , + HAL_PROTO_FID_READ_ALL_CPU_REGS_X , + HAL_PROTO_FID_WRITE_ALL_CPU_REGS_X , /* 0x30 */ + HAL_PROTO_FID_PSA_X , + HAL_PROTO_FID_EXECUTE_FUNCLET_X , + HAL_PROTO_FID_GET_DCO_FREQUENCY_X , + HAL_PROTO_FID_GET_FLL_FREQUENCY_X , + HAL_PROTO_FID_WAIT_FOR_STORAGE_X , + HAL_PROTO_FID_BLOW_FUSE_XV2 , + HAL_PROTO_FID_BLOW_FUSE_FRAM , + HAL_PROTO_FID_SJ_ASSERT_POR_SC_XV2 , + HAL_PROTO_FID_SJ_CONDITIONAL_SC_XV2 , + HAL_PROTO_FID_RC_RELEASE_JTAG_XV2 , + HAL_PROTO_FID_READ_MEM_WORDS_XV2 , + HAL_PROTO_FID_READ_MEM_QUICK_XV2 , + HAL_PROTO_FID_WRITE_MEM_WORDS_XV2 , + HAL_PROTO_FID_EEM_DX_XV2 , + HAL_PROTO_FID_SINGLE_STEP_XV2 , /* 0x40 */ + HAL_PROTO_FID_READ_ALL_CPU_REGS_XV2 , + HAL_PROTO_FID_WRITE_ALL_CPU_REGS_XV2 , + HAL_PROTO_FID_PSA_XV2 , + HAL_PROTO_FID_EXECUTE_FUNCLET_XV2 , + HAL_PROTO_FID_UNLOCK_DEVICE_XV2 , + HAL_PROTO_FID_MAGIC_PATTERN , + HAL_PROTO_FID_UNLOCK_C092 , + HAL_PROTO_FID_HIL_COMMAND , + HAL_PROTO_FID_POLL_JSTATE_REG , + HAL_PROTO_FID_POLL_JSTATE_REG_FR57XX , + HAL_PROTO_FID_IS_JTAG_FUSE_BLOWN , + HAL_PROTO_FID_RESET_XV2 , + HAL_PROTO_FID_WRITE_FRAM_QUICK_XV2 , + HAL_PROTO_FID_SEND_JTAG_MAILBOX_XV2 , + HAL_PROTO_FID_SINGLE_STEP_JSTATE_XV2 , + HAL_PROTO_FID_POLL_JSTATE_REG_ET8 , + HAL_PROTO_FID_RESET_STATIC_GLOBAL_VARS , /* 0x50 */ + HAL_PROTO_FID_RESET_430I , + HAL_PROTO_FID_POLL_JSTATE_REG_430I , + HAL_PROTO_FID_POLL_JSTATE_REG_20 , + HAL_PROTO_FID_SWITCH_MOSFET , + HAL_PROTO_FID_RESET_L092 , + HAL_PROTO_FID_DUMMY_MACRO , + HAL_PROTO_FID_RESET_5438XV2 , + HAL_PROTO_FID_LEA_SYNC_COND , + HAL_PROTO_FID_GET_JTAG_ID_CODE_ARM , + HAL_PROTO_FID_SCAN_AP_ARM , + HAL_PROTO_FID_MEM_AP_TRANSACTION_ARM , + HAL_PROTO_FID_READ_ALL_CPU_REGS_ARM , + HAL_PROTO_FID_WRITE_ALL_CPU_REGS_ARM , + HAL_PROTO_FID_ENABLE_DEBUG_ARM , + HAL_PROTO_FID_DISABLE_DEBUG_ARM , + HAL_PROTO_FID_RUN_ARM , /* 0x60 */ + HAL_PROTO_FID_HALT_ARM , + HAL_PROTO_FID_RESET_ARM , + HAL_PROTO_FID_SINGLE_STEP_ARM , + HAL_PROTO_FID_WAIT_FOR_DEBUG_HALT_ARM , + HAL_PROTO_FID_MEM_AP_TRANSACTION_ARM_SWD, + HAL_PROTO_FID_GET_ITF_MODE_ARM , + HAL_PROTO_FID_POLL_DSTATE_PCREG_ET , + HAL_PROTO_FID_GET_CPU_ID_ARM , + HAL_PROTO_FID_CHECK_DAP_LOCK_ARM , + HAL_PROTO_FID_UNLOCK_DAP , + HAL_PROTO_FID_USS_SYNC_COND , /* 0x6b */ } hal_proto_fid_t; /* Argument types for HAL_PROTO_FID_CONFIGURE */ @@ -126,7 +152,15 @@ typedef enum { HAL_PROTO_CONFIG_SFLLDEH = 0x0c, HAL_PROTO_CONFIG_NO_BSL = 0x0d, HAL_PROTO_CONFIG_ALT_ROM_ADDR_FOR_CPU_READ = 0x0e, - HAL_PROTO_CONFIG_ASSERT_BSL_VALID_BIT = 0x0f + HAL_PROTO_CONFIG_ASSERT_BSL_VALID_BIT = 0x0f, + HAL_PROTO_CONFIG_POWER_TESTREG_DEFAULT = 0x10, + HAL_PROTO_CONFIG_POWER_TESTREGV3_DEFAULT = 0x11, + HAL_PROTO_CONFIG_WDT_ADDRESS_5XX = 0x12, + HAL_PROTO_CONFIG_SCS_BASE_ADDRESS = 0x13, + HAL_PROTO_CONFIG_FPB_BASE_ADDRESS = 0x14, + HAL_PROTO_CONFIG_INTERRUPT_OPTIONS = 0x15, + HAL_PROTO_CONFIG_ULP_MSP432 = 0x16, + HAL_PROTO_CONFIG_JTAG_LOCK_5XX = 0x17, } hal_proto_config_t; static hal_proto_fid_t map_fid(const struct v3hil *h, hal_proto_fid_t src)