/*#include "romhdr.S"*/ #include "hw.S" /* ch2&3: TxD1,RxD1 */ /* allegedly there's a subroutine at 0xEFFA1 that sends a single byte over the TOOL0 line */ .global _start _start: call !hw_init call !port_init call !port_toggle 1: br $1b hw_init: di ; systeminit ; PIOR = 0 ; ADPC = 1 ; PMC bit = 0 ; PM1 = 6(?) ; CMC = 0 ; MSTOP,XTSTOP bits = 1,1 ; MCM0 bit = 0 ; hi-speed OCO clock as main clock ; CSS bit = 0 ; main system clock = periph clock ; PER0 SAU1EN bit (3) = 1 ; SPS0 = 0x44 ; or *12? ; CK00,CK01 @ 2MHz ; ST0 = 0xf ; stop all channels ; STMK0,STIF0 bits = 1,0 ; disable interrupts ; SRMK0,SRIF0 bits = 1,0 ; disable interrupts ; SREK0,SREF0 bits = 1,0 ; disable interrupts ; SMR00 = 0x22 ; ch0clock = CK00, start trig=sw falling edge, UART mode, xferend irq en ; SCR00 = 0x8297 ; tx only, clock type 1, error irq en, even parity, lsbfirst, 8bit data, 1bit stop ; SDR00 = 0xce00 ; opclk/208 ; NFEN0 = 0x0001 ; RxD noise filter enable ; SIR01 = 0x0007 ; clear error ; SMR01 = 0x0122 ; ch1clock = CK00; start trig=RxD falling edge, UART mode, xferend irq en ; SCR01 = 0x4697 ; rx only, clock type 1, error irq en, even parity, lsbfirst, 8bit data, 1bit stop ; SDR01 = 0xce00 ; opclk/208 ; use opclk/17 (0x0f00) instead for 115.2kbaud? ; SO00,SOE00 bits = 1,1 ; prepare using ch0 ; PM1 PM11 bit = 1 ; RxD pin as input ; P1,PM1 P12,PM12 bits = 1,0 ; TxD as output ; SO00 bit = 1 ; TxD output level ; SOE00 bit = 1 ; enable UART ; SS00,SS01 bits = 1,1 ; enable UART ; TXD0 = data ; xmit ;ei ; nah ret port_init: ; P33 as output using GPIO ; PM3 bit 3 = 0 ; PU3 bit 3 = 0 (no pullup) ; PMC3 bit 3 = 0 (digital IO) ; PIOR0 bit 6 = 0 ; POM3 bit 3 = 0 ; toggle P3 bit 3 clr1 !PM3.3 clr1 !PU3.3 clr1 !PIOR0.6 clr1 !POM3.3 ret port_toggle: set1 !P3.3 nop nop clr1 !P3.3 br $port_toggle uart_init: ;; PMC00=0 PM00=1 ; RxD1 en ; PIO2.3 = 1 ; PMC20=0 PM20=0 P20=1 ; TxD1 en ret uart_send_byte: ; todo ; TODO: wait for sent? ret