Temporary documentation, definitely incorrect as of now

VM specifications

Memory:
- 64k
- endianness: whatever's the architecture this baby runs on (little?)

Registers:
- pc
- lr
- sp

Operations: fixed width architecture where each instruction is 3-bytes long because I'm wasteful, it's easier to en/decode, and also fuck you
- st1, st2 (from ToS)
- push1, push2
- pop1, pop2
- pushi, popi  (push/pop immediate value)
- add, sub, and, or, not, (maybe xor)
- jmp
- beq, bne, blt (ToS ==/!=/< mem[operands])

use assert()s to make sure pc, sp, etc... are valid