stuff
This commit is contained in:
parent
4cd397b564
commit
1b68909633
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@ -3,3 +3,4 @@
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*.img
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*.elf
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*.map
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notes
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22
Makefile
22
Makefile
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@ -1,6 +1,11 @@
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OPENOCD_HOST ?= localhost
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OPENOCD_PORT_GDB ?= 3333
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OPENOCD_PORT_TELNET ?= 4444
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PREFIX ?= arm-none-eabi-
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CC = arm-none-eabi-gcc
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CC = $(PREFIX)gcc
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GDB ?= $(PREFIX)gdb
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CGENFLAGS = -mcpu=arm926ej-s -mthumb-interwork -fno-pie
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WARN = -Wall -Wextra -Werror
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@ -14,7 +19,7 @@ LDFLAGS = -static -nostartfiles -T bsp/fx3.ld -Wl,-z,max-page-size=4096,-Map,$(b
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VPATH = bsp
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OBJS = main.o usb.o gpif.o gctl.o gpio.o uart.o util.o dma.o irq.o cache.o vectors.o
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OBJS = main.o usb.o gpif.o gctl.o gpio.o uart.o util.o dma.o irq.o cache.o vectors.o jazelle.o nl-glue.o
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all : jazelle.img
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@ -27,4 +32,17 @@ clean :
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jazelle.elf : $(OBJS)
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$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^
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openocd-launch:
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openocd -c "bindto $(OPENOCD_HOST)" -f ./arm926ejs_fx3.cfg -c init # TODO: ports
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openocd-load: jazelle.elf
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printf 'reset halt\nload_image jazelle.elf\nexit\n' \
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| nc $(OPENOCD_HOST) $(OPENOCD_PORT_TELNET)
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gdb:
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$(GDB) -ex 'target extended-remote $(OPENOCD_HOST):$(OPENOCD_PORT_GDB)' \
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-ex 'set $$pc=_start' -ex 'b jazelle_exec' -ex c jazelle.elf
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-include $(OBJS:.o=.d)
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.PHONY: all clean openocd-launch openocd-load gdb
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28
README.md
28
README.md
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@ -28,7 +28,7 @@ $ openocd -f ./arm926ejs_fx3.cfg -c "transport select jtag" -c "adapter speed 10
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```
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$ printf 'reset halt\nload_image jazelle.elf\nexit\n' | nc localhost 4444
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gdb -ex 'target extended-remote localhost:3333' -ex 'set $pc=_start' -ex 'b jazelle_exec' -ex c jazelle.elf
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$ arm-none-eabi-gdb -ex 'target extended-remote localhost:3333' -ex 'set $pc=_start' -ex 'b jazelle_exec' -ex c jazelle.elf
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```
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## Credits
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@ -42,17 +42,17 @@ Jazelle info this project is based on:
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## TODO
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* Figure out Jazelle stuff:
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* Which bytecode instructions are supported on which Jazelle versions?
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* How exactly does the stack work? (When a handler function is being called)
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* How exactly does the Jazelle status register work?
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* What control registers are there that influence the execution?
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* Is it possible to force execute a certain instruction using the handler
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* [ ] Which bytecode instructions are supported on which Jazelle versions?
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* [x] How exactly does the stack work? (When a handler function is being called)
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* [ ] How exactly does the Jazelle status register work?
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* [ ] What control registers are there that influence the execution?
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* [ ] Is it possible to force execute a certain instruction using the handler
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instead of the default in-hardware execution?
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* ...
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* How does one call regular ARM/Thumb code from inside Jazelle?
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* ...
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* Verify what Hackspire and libjz have, to check if it is correct
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* Look at what Hackspire and libjz don't have and try to complete it
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* Port this code to the ARM11 using either Raspberry Pi v1 baremetal, or 3DS
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homebrew with kernel privileges (and do tests on these to check for different
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Jazelle versions)
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* [ ] ...
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* [ ] How does one call regular ARM/Thumb code from inside Jazelle?
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* [ ] ...
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* [ ] Verify what Hackspire and libjz have, to check if it is correct
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* [ ] Look at what Hackspire and libjz don't have and try to complete it
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* [ ] Port this code to the ARM11 using either Raspberry Pi v1 baremetal, or
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3DS homebrew with kernel privileges (and do tests on these to check for
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different Jazelle versions)
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@ -38,7 +38,7 @@ void Fx3UartInit(uint32_t baud_rate, Fx3UartParity_t parity, Fx3UartStopBits_t s
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Fx3WriteReg32(FX3_UART_POWER, 0);
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Fx3UtilDelayUs(10);
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Fx3WriteReg32(FX3_UART_POWER, FX3_UART_POWER_RESETN);
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while(!(Fx3ReadReg32(FX3_UART_POWER) & FX3_UART_POWER_ACTIVE))
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for (int i = 0; !(Fx3ReadReg32(FX3_UART_POWER) & FX3_UART_POWER_ACTIVE) && i < 1000*1000; ++i)
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;
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/* Configure and enable UART */
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@ -77,6 +77,6 @@ extern void Fx3UartTxString(const char *str)
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void Fx3UartTxFlush(void)
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{
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while(!(Fx3ReadReg32(FX3_UART_STATUS) & FX3_UART_STATUS_TX_DONE))
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for (int i = 0; !(Fx3ReadReg32(FX3_UART_STATUS) & FX3_UART_STATUS_TX_DONE) && i < 1000*1000; ++i)
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;
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}
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@ -0,0 +1,210 @@
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#include <stddef.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdio.h>
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// known ID table:
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// Chip name | ARM core | Jazelle ID
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// ------------+------------+-----------
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// ??? | ARM7EJ-S | ???
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// Cypress FX3 | ARM926EJ-S | 0x64100004
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// TI Nspire | ARM926EJ-S?| 0x64100004?
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// RPi v1.?? | ARM11??? | ???
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// Ninty ?3DS | ARM11MPCore| 0x74100064?
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// TODO: immediate next steps:
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// * check if we can override jazelle insn execution with custom handlers
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// * check what the control registers actually do
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// * enumerate what all insns do
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__attribute__((__naked__))
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static uint32_t jazelle_get_id(void) {
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asm volatile(
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"mrc p14, 7, r0, c0, c0, 0\n"
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"bx lr\n"
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);
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}
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/*
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* c0: Jazelle Identity register (read-only)
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Bits 0-11: Subarchitecture-defined bits (reads as 4, meaning unknown)
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Bits 12-19: Subarchitecture (reads as 0, Jazelle V1 according to documentation)
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Bits 20-27: Implementor (reads as 0x41, ARM Limited according to documentation)
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Bits 28-31: Architecture (reads as 6, ARMv5TEJ according to documentation)
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c1: Operating System Control register
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Bit 0: Configuration Disabled (CD) (documented)
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Bit 1: Configuration Valid (CV) (documented)
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c2: Main Configuration register
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Bit 0: Jazelle Enable (JE) (documented)
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Bits 26-28: Unknown
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Bit 29: If set, array object contains its elements directly, otherwise it contains a pointer to its elements
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Bit 31: Disable array instructions if set?
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c3: Array object layout register
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Bits 0-7: Unknown
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Bits 8-11: Offset (in words) within array object of first element or of pointer to first element
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Bits 12-15: Offset (in words) within array object of length
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Bit 16: If set, offset to length is subtracted, otherwise added
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Bits 17-19: Array length shift value (number of elements = stored length >> this)
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Bits 20-21: Disable array instructions if set?
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*/
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// https://github.com/SonoSooS/libjz/wiki/Java-instruction-set
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static uint8_t bytecode[] = {
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0x06, // iconst_3
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0x07, // iconst_4
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0x05, // iconst_2
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0x6C, // idiv
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0x04, // iconst_1
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0x60, // iadd
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0x60, // iadd
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0xAC, // ireturn
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};
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__attribute__((__aligned__(1024)))
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static struct {
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void* handlers[512];
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uint8_t stack[256];
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uint8_t locals[256];
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} jazelle_block;
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__attribute__((__naked__))
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static void handler_idiv(void) {
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// r0 = 3
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// r1 = 4
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// r2 = 2
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// editing the above has no effect
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// NOTE: these depend on the stack content, i.e. it's not a moving register
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// window. pushes happen in the following order: r0,r1,r2,r3
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// TODO: when the 'register stack cache' is full, what happens? does
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// it loop or does it act in a FIFO way, moving r0<-r1<-r2<-r3?
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// how can the fillrate be known??? (libjz says r5 & 3 but i
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// dont see anything like that, maybe its an ARM11 thing?)
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// "r4: Copy of local variable 0. Only valid when local variable 0 is a
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// single word (i.e. int, float, or Object; not long or double)"
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// -Hackspire
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//
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// [r6-4] is stack top (2)
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// [r6-8] is 4
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// etc
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// use the above to manipulate the stack, eg. "iadd" is implemented as:
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// - add r1, r2 // or equivalently, read from stack i guess
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// - str r1, [r6, #-8] // store to the place where it will be read
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// - sub r6, #4 // pop off & discard stack top element
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// NOTE: this input usage (with r1 and r2) is NOT robust at all, use memory
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// reads instead!
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asm volatile(
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// FIXME: read out stack contents in a better way
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"add r1, r2\n"
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"str r1, [r6,#-8]\n"
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"sub r6, #4\n"
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// return to jazelle (yes lr has to be incremented otherwise the
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// current instruction keeps getting executed in a loop)
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"add lr, #1\n"
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"bxj r12\n" // FIXME: r12 can be modified by jazelle so it should be restored to something
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);
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}
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static uint32_t jazelle_exit_save;
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__attribute__((__naked__))
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static void handler_ireturn(void) {
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int result;
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asm volatile(
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"ldr %[res], [r6, #-4]!\n"
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:[res]"=r"(result)
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);
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printf("result=%d\r\n", result); // FIXME: save & restore r0-r3 if ret implemented properly
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// get back to original code
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// TODO: later stage: get back to previous bytecode stuff
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asm volatile(
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"ldr r12, %[exsav]\n"
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"bx r12\n"
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:
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:[exsav]"m"(jazelle_exit_save)
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:"r12"
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);
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__builtin_unreachable();
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}
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__attribute__((__naked__))
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static int jazelle_exec_native(const void* bytecode, const void* block) {
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// inline asm parameters seems to be borking in GCC sooooo lets do it this way
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(void)bytecode; (void)block; (void)&jazelle_exit_save;
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asm volatile(
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"push {r5-r7,lr}\n"
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"mov lr, r0\n"
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// init handler table pointer and stack pointer
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"mov r5, r1\n"
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"add r6, r5, #0x800\n"
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"add r7, r5, #0x900\n"
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// "r8: Pointer to constant pool? (haven't checked this yet)" -Hackspire
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// set configuration valid & jazelle enable bits
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"mov r0, #2\n"
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"mcr p14, 7, r0, c1, c0, 0\n"
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"mov r0, #1\n"
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"mcr p14, 7, r0, c2, c0, 0\n"
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// apparently there's no good way to find the exit point from jazelle,
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// so we're going to hack that into the stuff now
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"ldr r12, =jazelle_exit_save\n"
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"adr r0, .Ljazend\n"
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"str r0, [r12]\n"
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// switch to jazelle mode
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"adr r12, .Lno_jazelle\n"
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"bxj r12\n"
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".Ljazend:\n"
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"mov r0, #0\n"
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"b .Lend\n"
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".Lno_jazelle:\n"
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"mov r0, #1\n"
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".Lend:\n"
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"mov r5, #0\n"
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"mcr p14, 7, %r5, c1, c0, 0\n"
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"mcr p14, 7, %r5, c2, c0, 0\n"
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"pop {r5-r7,lr}\n"
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"bx lr\n"
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".pool\n"
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);
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}
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static int jazelle_exec(const uint8_t* bytecode) {
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jazelle_block.handlers[0x6C] = handler_idiv;
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jazelle_block.handlers[0xAC] = handler_ireturn;
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/*
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* +000-3FF: Unhandled bytecodes
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The stack is flushed to memory before calling any of these handlers, so they may modify r0-r3 freely
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+400: Null pointer exception
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+404: Array index out of bounds exception
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+40C: Jazelle mode entered with JE = 0
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+410: Configuration invalid (Jazelle mode entered with CV = 0)
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CV is automatically set to 1 on entering this handler
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+414: Prefetch abort occurred in middle of instruction
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-Hackspire
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*/
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const void* block = &jazelle_block;
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return jazelle_exec_native(bytecode, block);
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}
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void jazelle_main(void) {
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uint32_t id = jazelle_get_id();
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printf("hello world! jazelle ID=0x%lx\r\n", id);
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int r = jazelle_exec(bytecode);
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printf("retcode=%d\r\n", r);
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}
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104
main.c
104
main.c
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@ -13,65 +13,7 @@
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#include <stdio.h>
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#include <string.h>
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static uint8_t bytecode[] = {
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0x05, // iconst_2
|
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0x05, // iconst_2
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0x60, // iadd
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0xAC, // ireturn
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||||
};
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|
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__attribute__((__aligned__(1024)))
|
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static struct {
|
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void* handlers[512];
|
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uint8_t stack[256];
|
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uint8_t locals[256];
|
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} jazelle_block;
|
||||
|
||||
static void handler_ireturn(void) {
|
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int32_t result;
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asm volatile(
|
||||
"ldr %[res], [r6, #-4]!\n"
|
||||
"bkpt #1\n"
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||||
:[res]"=r"(result)
|
||||
);
|
||||
while (true); // a
|
||||
}
|
||||
|
||||
static void jazelle_exec(const uint8_t* bytecode) {
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||||
jazelle_block.handlers[0xAC] = handler_ireturn;
|
||||
const void* block = &jazelle_block;
|
||||
|
||||
asm volatile(
|
||||
"push {lr}\n"
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||||
// set configuration valid & jazelle enable bits
|
||||
"mov r0, #2\n"
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||||
"mcr p14, 7, r0, c1, c0, 0\n"
|
||||
"mov r0, #1\n"
|
||||
"mcr p14, 7, r0, c2, c0, 0\n"
|
||||
|
||||
"mov lr, %[bc]\n"
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||||
|
||||
// init handler table pointer and stack pointer
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||||
"mov r5, %[blk]\n"
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||||
"add r6, r5, #0x800\n"
|
||||
"add r7, r5, #0x900\n"
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||||
|
||||
// switch to jazelle mode
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||||
"adr r12, .Lno_jazelle\n"
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||||
"bxj r12\n"
|
||||
"bkpt #0\n"
|
||||
"b .Lend\n"
|
||||
".Lno_jazelle:\n"
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||||
"mov r0, #0\n"
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||||
"mcr p14, 7, r0, c1, c0, 0\n"
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||||
"mcr p14, 7, r0, c2, c0, 0\n"
|
||||
"bkpt #2\n"
|
||||
".Lend:\n"
|
||||
"pop {lr}\n"
|
||||
:
|
||||
:[bc]"r"(bytecode),[blk]"r"(block)
|
||||
:"r0","r12","r5","r6","r7","memory");
|
||||
}
|
||||
extern void jazelle_main(void);
|
||||
|
||||
int main(void)
|
||||
{
|
||||
|
|
@ -81,12 +23,14 @@ int main(void)
|
|||
Fx3GctlInitClock();
|
||||
*(volatile uint32_t *)(void *)0x400020e8 = 0;
|
||||
Fx3GctlInitIoMatrix(FX3_GCTL_ALTFUNC_GPIF32BIT_UART_I2S);
|
||||
/*Fx3UartInit(115200, FX3_UART_NO_PARITY, FX3_UART_1_STOP_BIT);
|
||||
Fx3UartInit(115200, FX3_UART_NO_PARITY, FX3_UART_1_STOP_BIT);
|
||||
/*while (true) {
|
||||
Fx3UartTxString("\nhello world\n");
|
||||
Fx3UartTxFlush();
|
||||
}*/
|
||||
|
||||
Fx3GpioInitClock();
|
||||
Fx3GpioSetupSimple(45,
|
||||
/*Fx3GpioSetupSimple(45,
|
||||
FX3_GPIO_SIMPLE_ENABLE |
|
||||
FX3_GPIO_SIMPLE_INPUT_EN);
|
||||
Fx3GpioSetupSimple(54,
|
||||
|
|
@ -103,44 +47,8 @@ int main(void)
|
|||
|
||||
Fx3IrqEnableInterrupts();*/
|
||||
|
||||
jazelle_exec(bytecode);
|
||||
jazelle_main();
|
||||
|
||||
while (true) ; // a
|
||||
}
|
||||
|
||||
/* Newlib's assert() calls this function if the assertion fails */
|
||||
void
|
||||
__assert_func (const char *file,
|
||||
int line,
|
||||
const char *func,
|
||||
const char *failedexpr)
|
||||
{
|
||||
if (file != NULL) {
|
||||
char linestrbuf[16], *linestr = &linestrbuf[sizeof(linestrbuf)];
|
||||
Fx3UartTxString(file);
|
||||
Fx3UartTxChar(':');
|
||||
/* Avoid using newlib functions like itoa so as not to trigger
|
||||
a recursive assert... */
|
||||
*--linestr = '\0';
|
||||
while (line >= 10 && linestr != &linestrbuf[1]) {
|
||||
*--linestr = '0' + (line % 10);
|
||||
line /= 10;
|
||||
}
|
||||
*--linestr = '0' + line;
|
||||
Fx3UartTxString(linestr);
|
||||
Fx3UartTxString(": ");
|
||||
}
|
||||
if (func != NULL) {
|
||||
Fx3UartTxString(func);
|
||||
Fx3UartTxString(": ");
|
||||
}
|
||||
Fx3UartTxString("Assertion ");
|
||||
if (failedexpr != NULL) {
|
||||
Fx3UartTxChar('`');
|
||||
Fx3UartTxString(failedexpr);
|
||||
Fx3UartTxString("' ");
|
||||
}
|
||||
Fx3UartTxString("failed.\n");
|
||||
for(;;)
|
||||
;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,72 @@
|
|||
|
||||
/* glue code for Newlib */
|
||||
|
||||
#include <bsp/uart.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <sys/stat.h>
|
||||
|
||||
/* Newlib's assert() calls this function if the assertion fails */
|
||||
void __assert_func (const char *file, int line, const char *func, const char *failedexpr)
|
||||
{
|
||||
if (file != NULL) {
|
||||
char linestrbuf[16], *linestr = &linestrbuf[sizeof(linestrbuf)];
|
||||
Fx3UartTxString(file);
|
||||
Fx3UartTxChar(':');
|
||||
/* Avoid using newlib functions like itoa so as not to trigger
|
||||
a recursive assert... */
|
||||
*--linestr = '\0';
|
||||
while (line >= 10 && linestr != &linestrbuf[1]) {
|
||||
*--linestr = '0' + (line % 10);
|
||||
line /= 10;
|
||||
}
|
||||
*--linestr = '0' + line;
|
||||
Fx3UartTxString(linestr);
|
||||
Fx3UartTxString(": ");
|
||||
}
|
||||
if (func != NULL) {
|
||||
Fx3UartTxString(func);
|
||||
Fx3UartTxString(": ");
|
||||
}
|
||||
Fx3UartTxString("Assertion ");
|
||||
if (failedexpr != NULL) {
|
||||
Fx3UartTxChar('`');
|
||||
Fx3UartTxString(failedexpr);
|
||||
Fx3UartTxString("' ");
|
||||
}
|
||||
Fx3UartTxString("failed.\n");
|
||||
Fx3UartTxFlush();
|
||||
for(;;) ;
|
||||
}
|
||||
|
||||
int _write(int fd, char* data, int size) {
|
||||
if (fd >= 0 && fd < 3) {
|
||||
if (size > 0)
|
||||
Fx3UartTxBytes((const uint8_t*)data, (size_t)size);
|
||||
Fx3UartTxFlush();
|
||||
return size;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _close(int fd) { (void)fd; return 0; }
|
||||
|
||||
int _stat(char *file, struct stat *st) {
|
||||
(void)file;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _read(int fd, char *ptr, int len) { (void)fd; (void)ptr; (void)len; return 0; }
|
||||
|
||||
int _lseek(int fd, int ptr, int dir) { (void)fd; (void)ptr; (void)dir; return 0; }
|
||||
|
||||
int _isatty(int fd) { (void)fd; return 1; }
|
||||
|
||||
int _fstat(int fd, struct stat *st) {
|
||||
(void)fd;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue