more work..more work....

This commit is contained in:
5225225 2020-06-06 19:20:58 +01:00
parent 1af0d77575
commit 30e7604e62
2 changed files with 48 additions and 5 deletions

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@ -1,6 +1,6 @@
use byteorder::{ReadBytesExt, LE};
use std::io::Cursor;
use std::convert::TryInto;
use std::convert::{TryInto, TryFrom};
struct Machine {
RX: u16,
@ -18,6 +18,19 @@ struct Machine {
IP: u16,
}
impl Machine {
fn push_stack(&mut self, val: u16) {
self.SSK[self.RSK as usize] = val;
self.RSK -= 1;
}
fn pop_stack(&mut self) -> u16 {
let v = self.SSK[self.RSK as usize];
self.RSK += 1;
v
}
}
impl Machine {
fn write_reg(&mut self, reg: Register, val: u16) {
match reg {
@ -440,6 +453,8 @@ impl Machine {
let oc = cur_instruction.def.opcode();
let mut should_inc_ip = true;
match oc {
OP::HALT => return false,
OP::NOOP => {},
@ -453,8 +468,21 @@ impl Machine {
OP::CALL => {
if self.RTRGT == 0 {
} else {
unimplemented!("calling not implemented");
self.push_stack(self.RCALL);
self.push_stack(self.RSTAT.bits());
self.push_stack(self.RX);
self.push_stack(self.RY);
self.push_stack(self.RZ);
self.push_stack(u16::try_from(inc_by).unwrap());
self.RSR = self.RSK;
self.RX = self.read(cur_instruction.args[0]);
self.RY = self.read(cur_instruction.args[1]);
self.RZ = self.read(cur_instruction.args[2]);
self.RCALL = self.IP;
self.IP = self.RTRGT;
should_inc_ip = false;
self.RTRGT = 0;
self.RSTAT = Flags::empty();
}
}
OP::POP => {
@ -481,13 +509,28 @@ impl Machine {
}
OP::JEQU => {
if self.RSTAT.contains(Flags::FEQUL) {
unimplemented!("{:?}", self.RTRGT);
self.IP = self.RTRGT;
should_inc_ip = false;
}
}
OP::INC => {
let mut val = self.read(cur_instruction.args[0]);
val += 1;
self.write(cur_instruction.args[0], val);
self.RSTAT.set(Flags::FZERO, val == 0);
}
OP::READ => {
let input = 50;
self.write(cur_instruction.args[0], input);
self.RSTAT.set(Flags::FZERO, input == 0);
}
_ => { eprintln!("unsupported opcode {:?}, continuing", oc); return false; }
}
if should_inc_ip {
self.IP += inc_by as u16;
}
true
}