initial work on decoding
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commit
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/target
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"libc",
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]
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"derivative",
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"num_enum_derive",
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]
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"proc-macro-crate",
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"proc-macro2",
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"syn",
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]
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dependencies = [
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"bitfield",
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||||||
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"bitflags",
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||||||
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"byteorder",
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||||||
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"num_enum",
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||||||
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"zstd",
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]
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||||||
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[[package]]
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name = "syn"
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||||||
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dependencies = [
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||||||
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"proc-macro2",
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||||||
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"quote",
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||||||
|
"unicode-xid",
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||||||
|
]
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||||||
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||||||
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[[package]]
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||||||
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name = "toml"
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version = "0.5.6"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "ffc92d160b1eef40665be3a05630d003936a3bc7da7421277846c2613e92c71a"
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||||||
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dependencies = [
|
||||||
|
"serde",
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||||||
|
]
|
||||||
|
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||||||
|
[[package]]
|
||||||
|
name = "unicode-xid"
|
||||||
|
version = "0.2.0"
|
||||||
|
source = "registry+https://github.com/rust-lang/crates.io-index"
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||||||
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checksum = "826e7639553986605ec5979c7dd957c7895e93eabed50ab2ffa7f6128a75097c"
|
||||||
|
|
||||||
|
[[package]]
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||||||
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name = "zstd"
|
||||||
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version = "0.5.2+zstd.1.4.5"
|
||||||
|
source = "registry+https://github.com/rust-lang/crates.io-index"
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||||||
|
checksum = "644352b10ce7f333d6e0af85bd4f5322dc449416dc1211c6308e95bca8923db4"
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||||||
|
dependencies = [
|
||||||
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"zstd-safe",
|
||||||
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]
|
||||||
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||||||
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[[package]]
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||||||
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name = "zstd-safe"
|
||||||
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version = "2.0.4+zstd.1.4.5"
|
||||||
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source = "registry+https://github.com/rust-lang/crates.io-index"
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||||||
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checksum = "7113c0c9aed2c55181f2d9f5b0a36e7d2c0183b11c058ab40b35987479efe4d7"
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||||||
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dependencies = [
|
||||||
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"libc",
|
||||||
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"zstd-sys",
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||||||
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]
|
||||||
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||||||
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[[package]]
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||||||
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name = "zstd-sys"
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||||||
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version = "1.4.16+zstd.1.4.5"
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||||||
|
source = "registry+https://github.com/rust-lang/crates.io-index"
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||||||
|
checksum = "c442965efc45353be5a9b9969c9b0872fff6828c7e06d118dda2cb2d0bb11d5a"
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||||||
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dependencies = [
|
||||||
|
"cc",
|
||||||
|
"glob",
|
||||||
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"itertools",
|
||||||
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"libc",
|
||||||
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]
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@ -0,0 +1,14 @@
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||||||
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[package]
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||||||
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name = "shockwave"
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||||||
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version = "0.1.0"
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||||||
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authors = ["5225225 <5225225@mailbox.org>"]
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||||||
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edition = "2018"
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||||||
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||||||
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# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
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||||||
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||||||
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[dependencies]
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||||||
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bitflags = "1.2.1"
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||||||
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bitfield = "0.13.2"
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||||||
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zstd = "0.5.2"
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||||||
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byteorder = "1.3.4"
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||||||
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num_enum = "0.5.0"
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use byteorder::{ReadBytesExt, LE};
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use std::io::Cursor;
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use std::convert::TryInto;
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struct Machine {
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RX: u16,
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RY: u16,
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RZ: u16,
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RTRGT: u16,
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RSTAT: Flags,
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RCALL: u16,
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RSK: u16,
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RSR: u16,
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SSK: Vec<u16>,
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SIN: Vec<u16>,
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SMAIN: Vec<u16>,
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SCODE: Vec<u16>,
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IP: u16,
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}
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#[derive(Debug, Eq, PartialEq)]
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enum Register {
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RX,
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RY,
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RZ,
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RTRGT,
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RSTAT,
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RCALL,
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NULL,
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}
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impl Register {
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fn into_register(x: u16) -> Self {
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match x {
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1 => Self::RX,
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2 => Self::RY,
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3 => Self::RZ,
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4 => Self::RTRGT,
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5 => Self::RSTAT,
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6 => Self::RCALL,
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_ => Self::NULL,
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}
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}
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}
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bitflags::bitflags! {
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struct Flags: u16 {
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const FZERO = 0b0000000000000001;
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const FEQUL = 0b0000000000000010;
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const FLT = 0b0000000000000100;
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const FGT = 0b0000000000001000;
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const FCRRY = 0b0000000000010000;
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const FINF = 0b0000000000100000;
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const FSE = 0b0000000001000000;
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const FSF = 0b0000000010000000;
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}
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}
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||||||
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#[derive(Debug, Eq, PartialEq)]
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||||||
|
enum OP {
|
||||||
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HALT = 0x000 ,
|
||||||
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NOOP = 0x001 ,
|
||||||
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INC = 0x002 ,
|
||||||
|
DEC = 0x003 ,
|
||||||
|
ADD = 0x004 ,
|
||||||
|
SUB = 0x005 ,
|
||||||
|
MUL = 0x006 ,
|
||||||
|
DIV = 0x007 ,
|
||||||
|
ADDC = 0x008 ,
|
||||||
|
SUBC = 0x009 ,
|
||||||
|
READ = 0x00A ,
|
||||||
|
WRIT = 0x00B ,
|
||||||
|
CPY = 0x00C ,
|
||||||
|
MCPY = 0x00D ,
|
||||||
|
ICPY = 0x00E ,
|
||||||
|
CMP = 0x00F ,
|
||||||
|
AND = 0x010 ,
|
||||||
|
OR = 0x011 ,
|
||||||
|
CMPL = 0x012 ,
|
||||||
|
LSHF = 0x013 ,
|
||||||
|
RSHF = 0x014 ,
|
||||||
|
PUSH = 0x015 ,
|
||||||
|
POP = 0x016 ,
|
||||||
|
CFLG = 0x017 ,
|
||||||
|
CALL = 0x018 ,
|
||||||
|
RTRN = 0x019 ,
|
||||||
|
RTRV = 0x01A ,
|
||||||
|
RTL = 0x01B ,
|
||||||
|
RTR = 0x01C ,
|
||||||
|
CIP = 0x01D ,
|
||||||
|
BSWP = 0x01E ,
|
||||||
|
JUMP = 0x01F ,
|
||||||
|
JZRO = 0x020 ,
|
||||||
|
JEQU = 0x021 ,
|
||||||
|
JLT = 0x022 ,
|
||||||
|
JGT = 0x023 ,
|
||||||
|
JCRY = 0x024 ,
|
||||||
|
JINF = 0x025 ,
|
||||||
|
JSE = 0x026 ,
|
||||||
|
JSF = 0x027 ,
|
||||||
|
CZRO = 0x030 ,
|
||||||
|
CCRY = 0x034 ,
|
||||||
|
XOR = 0x040 ,
|
||||||
|
SWAP = 0x041 ,
|
||||||
|
RCPT = 0x042 ,
|
||||||
|
RCPF = 0x043 ,
|
||||||
|
}
|
||||||
|
|
||||||
|
impl std::convert::Into<OP> for u16 {
|
||||||
|
fn into(self) -> OP {
|
||||||
|
match self {
|
||||||
|
|
||||||
|
|
||||||
|
0x000 => OP::HALT,
|
||||||
|
0x001 => OP::NOOP,
|
||||||
|
0x002 => OP::INC,
|
||||||
|
0x003 => OP::DEC,
|
||||||
|
0x004 => OP::ADD,
|
||||||
|
0x005 => OP::SUB,
|
||||||
|
0x006 => OP::MUL,
|
||||||
|
0x007 => OP::DIV,
|
||||||
|
0x008 => OP::ADDC,
|
||||||
|
0x009 => OP::SUBC,
|
||||||
|
0x00A => OP::READ,
|
||||||
|
0x00B => OP::WRIT,
|
||||||
|
0x00C => OP::CPY,
|
||||||
|
0x00D => OP::MCPY,
|
||||||
|
0x00E => OP::ICPY,
|
||||||
|
0x00F => OP::CMP,
|
||||||
|
0x010 => OP::AND,
|
||||||
|
0x011 => OP::OR,
|
||||||
|
0x012 => OP::CMPL,
|
||||||
|
0x013 => OP::LSHF,
|
||||||
|
0x014 => OP::RSHF,
|
||||||
|
0x015 => OP::PUSH,
|
||||||
|
0x016 => OP::POP,
|
||||||
|
0x017 => OP::CFLG,
|
||||||
|
0x018 => OP::CALL,
|
||||||
|
0x019 => OP::RTRN,
|
||||||
|
0x01A => OP::RTRV,
|
||||||
|
0x01B => OP::RTL,
|
||||||
|
0x01C => OP::RTR,
|
||||||
|
0x01D => OP::CIP,
|
||||||
|
0x01E => OP::BSWP,
|
||||||
|
0x01F => OP::JUMP,
|
||||||
|
0x020 => OP::JZRO,
|
||||||
|
0x021 => OP::JEQU,
|
||||||
|
0x022 => OP::JLT,
|
||||||
|
0x023 => OP::JGT,
|
||||||
|
0x024 => OP::JCRY,
|
||||||
|
0x025 => OP::JINF,
|
||||||
|
0x026 => OP::JSE,
|
||||||
|
0x027 => OP::JSF,
|
||||||
|
0x030 => OP::CZRO,
|
||||||
|
0x034 => OP::CCRY,
|
||||||
|
0x040 => OP::XOR,
|
||||||
|
0x041 => OP::SWAP,
|
||||||
|
0x042 => OP::RCPT,
|
||||||
|
0x043 => OP::RCPF,
|
||||||
|
_ => panic!(),
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[derive(Debug, PartialEq, Eq)]
|
||||||
|
enum AFLG {
|
||||||
|
Register,
|
||||||
|
SIN,
|
||||||
|
SMAIN,
|
||||||
|
}
|
||||||
|
|
||||||
|
impl From<u16> for AFLG {
|
||||||
|
fn from(x: u16) -> AFLG {
|
||||||
|
match x {
|
||||||
|
0b00 => AFLG::Register,
|
||||||
|
0b01 => AFLG::Register,
|
||||||
|
0b10 => AFLG::SIN,
|
||||||
|
0b11 => AFLG::SMAIN,
|
||||||
|
_ => panic!(),
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
bitfield::bitfield! {
|
||||||
|
struct DefinitionWord(u16);
|
||||||
|
impl Debug;
|
||||||
|
into OP, opcode, set_opcode: 8, 0;
|
||||||
|
sign, set_sign: 9, 9;
|
||||||
|
into AFLG, aflg2, set_aflg2: 11, 10;
|
||||||
|
into AFLG, aflg1, set_aflg1: 13, 12;
|
||||||
|
into AFLG, aflg0, set_aflg0: 15, 14;
|
||||||
|
}
|
||||||
|
|
||||||
|
bitfield::bitfield! {
|
||||||
|
struct ArgumentWord(u16);
|
||||||
|
impl Debug;
|
||||||
|
reg2, set_reg2: 3, 0;
|
||||||
|
reg1, set_reg1: 7, 4;
|
||||||
|
reg0, set_reg0: 11, 8;
|
||||||
|
}
|
||||||
|
|
||||||
|
#[derive(Debug)]
|
||||||
|
struct Instruction {
|
||||||
|
def: DefinitionWord,
|
||||||
|
args: Vec<Arg>,
|
||||||
|
}
|
||||||
|
|
||||||
|
impl Default for Machine {
|
||||||
|
fn default() -> Self {
|
||||||
|
Self {
|
||||||
|
SSK: vec![0_u16; 65536_usize],
|
||||||
|
SIN: vec![0_u16; 65536_usize],
|
||||||
|
SMAIN: vec![0_u16; 65536_usize],
|
||||||
|
SCODE: vec![0_u16; 65536_usize],
|
||||||
|
|
||||||
|
RSTAT: Flags::FSE,
|
||||||
|
|
||||||
|
IP: 1,
|
||||||
|
RCALL: 0,
|
||||||
|
RSK: 0,
|
||||||
|
RSR: 0,
|
||||||
|
RTRGT: 0,
|
||||||
|
RX: 0,
|
||||||
|
RY: 0,
|
||||||
|
RZ: 0,
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[derive(Debug)]
|
||||||
|
enum Chunk {
|
||||||
|
SIN(Vec<u16>),
|
||||||
|
SCODE(Vec<u16>),
|
||||||
|
SMAIN(Vec<u16>),
|
||||||
|
}
|
||||||
|
|
||||||
|
impl Chunk {
|
||||||
|
fn inner(&self) -> &[u16] {
|
||||||
|
match self {
|
||||||
|
Chunk::SIN(x) => x,
|
||||||
|
Chunk::SCODE(x) => x,
|
||||||
|
Chunk::SMAIN(x) => x,
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn parse_chunk(mut input: impl std::io::Read) -> Chunk {
|
||||||
|
let space_index = input.read_u8().unwrap();
|
||||||
|
let length = input.read_u16::<LE>().unwrap();
|
||||||
|
|
||||||
|
let mut data = Vec::new();
|
||||||
|
for _ in 0..length {
|
||||||
|
data.push(input.read_u16::<LE>().unwrap());
|
||||||
|
}
|
||||||
|
|
||||||
|
match space_index {
|
||||||
|
1 => Chunk::SIN(data),
|
||||||
|
2 => Chunk::SCODE(data),
|
||||||
|
3 => Chunk::SMAIN(data),
|
||||||
|
_ => panic!("unknown space index {}", space_index),
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn arg_count(opcode: OP) -> usize {
|
||||||
|
match opcode {
|
||||||
|
OP::HALT => 0,
|
||||||
|
OP::NOOP => 0,
|
||||||
|
OP::INC => 1,
|
||||||
|
OP::DEC => 1,
|
||||||
|
OP::ADD => 2,
|
||||||
|
OP::SUB => 2,
|
||||||
|
OP::MUL => 2,
|
||||||
|
OP::DIV => 2,
|
||||||
|
OP::ADDC => 2,
|
||||||
|
OP::SUBC => 2,
|
||||||
|
OP::READ => 1,
|
||||||
|
OP::WRIT => 1,
|
||||||
|
OP::CPY => 2,
|
||||||
|
OP::MCPY => 3,
|
||||||
|
OP::ICPY => 2,
|
||||||
|
OP::CMP => 2,
|
||||||
|
OP::AND => 2,
|
||||||
|
OP::OR => 2,
|
||||||
|
OP::CMPL => 1,
|
||||||
|
OP::LSHF => 2,
|
||||||
|
OP::RSHF => 2,
|
||||||
|
OP::PUSH => 1,
|
||||||
|
OP::POP => 1,
|
||||||
|
OP::CFLG => 0,
|
||||||
|
OP::CALL => 3,
|
||||||
|
OP::RTRN => 0,
|
||||||
|
OP::RTRV => 0,
|
||||||
|
OP::RTL => 2,
|
||||||
|
OP::RTR => 2,
|
||||||
|
OP::CIP => 1,
|
||||||
|
OP::BSWP => 1,
|
||||||
|
OP::JUMP => 0,
|
||||||
|
OP::JZRO => 0,
|
||||||
|
OP::JEQU => 0,
|
||||||
|
OP::JLT => 0,
|
||||||
|
OP::JGT => 0,
|
||||||
|
OP::JCRY => 0,
|
||||||
|
OP::JINF => 0,
|
||||||
|
OP::JSE => 0,
|
||||||
|
OP::JSF => 0,
|
||||||
|
OP::CZRO => 0,
|
||||||
|
OP::CCRY => 0,
|
||||||
|
OP::XOR => 2,
|
||||||
|
OP::SWAP => 2,
|
||||||
|
OP::RCPT => 2,
|
||||||
|
OP::RCPF => 2,
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn parse_instruction(mut bytes: &[u16]) -> (Instruction, usize) {
|
||||||
|
let mut consumed = 0;
|
||||||
|
|
||||||
|
let def = DefinitionWord(bytes[0]);
|
||||||
|
bytes = &bytes[1..];
|
||||||
|
consumed += 1;
|
||||||
|
|
||||||
|
let ac = arg_count(def.opcode());
|
||||||
|
|
||||||
|
let mut args = Vec::new();
|
||||||
|
|
||||||
|
let mut registers_found = 0;
|
||||||
|
|
||||||
|
let mut register_count = 0;
|
||||||
|
|
||||||
|
if ac > 0 && def.aflg0() == AFLG::Register {
|
||||||
|
register_count += 1;
|
||||||
|
}
|
||||||
|
if ac > 1 && def.aflg1() == AFLG::Register {
|
||||||
|
register_count += 1;
|
||||||
|
}
|
||||||
|
if ac > 2 && def.aflg2() == AFLG::Register {
|
||||||
|
register_count += 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
let mut registers = Vec::new();
|
||||||
|
if register_count > 0 {
|
||||||
|
let mut aw = bytes[0];
|
||||||
|
bytes = &bytes[1..];
|
||||||
|
consumed += 1;
|
||||||
|
|
||||||
|
for i in 0..register_count {
|
||||||
|
registers.insert(0_usize, Register::into_register(aw & 0b1111));
|
||||||
|
aw >>= 4;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
for idx in 0..ac {
|
||||||
|
let aflg = match idx {
|
||||||
|
0 => def.aflg0(),
|
||||||
|
1 => def.aflg1(),
|
||||||
|
2 => def.aflg2(),
|
||||||
|
_ => unreachable!(),
|
||||||
|
};
|
||||||
|
|
||||||
|
match aflg {
|
||||||
|
AFLG::Register => {
|
||||||
|
args.push(Arg::Register(registers.remove(0)))
|
||||||
|
},
|
||||||
|
AFLG::SIN => {
|
||||||
|
args.push(Arg::SIN(bytes[0]));
|
||||||
|
bytes = &bytes[1..];
|
||||||
|
consumed += 1;
|
||||||
|
}
|
||||||
|
AFLG::SMAIN => {
|
||||||
|
args.push(Arg::SMAIN(bytes[0]));
|
||||||
|
bytes = &bytes[1..];
|
||||||
|
consumed += 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
(Instruction { def, args }, consumed)
|
||||||
|
}
|
||||||
|
|
||||||
|
#[derive(Debug)]
|
||||||
|
enum Arg {
|
||||||
|
Register(Register),
|
||||||
|
SIN(u16),
|
||||||
|
SMAIN(u16),
|
||||||
|
}
|
||||||
|
|
||||||
|
impl Machine {
|
||||||
|
fn step(&mut self) -> bool {
|
||||||
|
let (cur_instruction, inc_by) = parse_instruction(&self.SCODE[(self.IP as usize)..]);
|
||||||
|
|
||||||
|
let oc = cur_instruction.def.opcode();
|
||||||
|
|
||||||
|
match oc {
|
||||||
|
OP::HALT => return false,
|
||||||
|
OP::NOOP => {},
|
||||||
|
_ => eprintln!("unsupported opcode {:?}, continuing", oc),
|
||||||
|
}
|
||||||
|
|
||||||
|
self.IP += inc_by as u16;
|
||||||
|
|
||||||
|
true
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn dump_instructions(mut x: &[u16]) {
|
||||||
|
loop {
|
||||||
|
let (i, inc) = parse_instruction(x);
|
||||||
|
x = &x[inc..];
|
||||||
|
println!("{:?}", i);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn main() {
|
||||||
|
let bin = include_bytes!("../challenge.mctf");
|
||||||
|
let (header, body) = bin.split_at(4);
|
||||||
|
assert_eq!(header, b"mCTZ");
|
||||||
|
let decompressed = zstd::decode_all(body).unwrap();
|
||||||
|
let mut csr = Cursor::new(decompressed);
|
||||||
|
|
||||||
|
let code = parse_chunk(&mut csr);
|
||||||
|
let sin = parse_chunk(&mut csr);
|
||||||
|
|
||||||
|
let mut codeinner = code.inner();
|
||||||
|
|
||||||
|
let mut m = Machine::default();
|
||||||
|
m.SIN = sin.inner().to_vec();
|
||||||
|
m.SCODE = code.inner().to_vec();
|
||||||
|
|
||||||
|
dump_instructions(&m.SCODE);
|
||||||
|
}
|
Loading…
Reference in New Issue