kicad/demos/pic_programmer/pic_programmer.kicad_pcb

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(kicad_pcb (version 4) (host pcbnew "(2014-08-26 BZR 5101)-product")
(general
(links 130)
(no_connects 0)
(area 73.469499 40.449499 233.870501 139.890501)
(thickness 1.6)
(drawings 24)
(tracks 354)
(zones 0)
(modules 63)
(nets 35)
)
(page A4)
(title_block
(title "SERIAL PIC PROGRAMMER")
)
(layers
(0 Composant signal)
(31 Cuivre signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
)
(setup
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(user_trace_width 0.4)
(user_trace_width 0.5)
(trace_clearance 0.25)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.254)
(segment_width 0.381)
(edge_width 0.381)
(via_size 1.6)
(via_drill 0.6)
(via_min_size 0.889)
(via_min_drill 0.508)
(uvia_size 0.508)
(uvia_drill 0.127)
(uvias_allowed no)
(uvia_min_size 0.508)
(uvia_min_drill 0.127)
(pcb_text_width 0.3048)
(pcb_text_size 1.524 2.032)
(mod_edge_width 0.381)
(mod_text_size 1.524 1.524)
(mod_text_width 0.3048)
(pad_size 1.5748 2.794)
(pad_drill 0.8128)
(pad_to_mask_clearance 0.1)
(aux_axis_origin 62.23 153.67)
(visible_elements 7FFFFFFF)
(pcbplotparams
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(usegerberextensions true)
(excludeedgelayer true)
(linewidth 0.150000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 /CTS)
(net 2 /DTR)
(net 3 /PC-CLOCK-OUT)
(net 4 /TXD)
(net 5 GND)
(net 6 "Net-(C2-Pad1)")
(net 7 "Net-(C4-Pad1)")
(net 8 "Net-(C5-Pad1)")
(net 9 "Net-(C9-Pad2)")
(net 10 "Net-(D1-Pad1)")
(net 11 "Net-(D10-Pad1)")
(net 12 "Net-(D11-Pad1)")
(net 13 "Net-(D11-Pad2)")
(net 14 "Net-(D12-Pad1)")
(net 15 "Net-(D2-Pad1)")
(net 16 "Net-(D4-Pad1)")
(net 17 "Net-(D6-Pad1)")
(net 18 "Net-(D8-Pad1)")
(net 19 "Net-(D9-Pad1)")
(net 20 "Net-(Q1-Pad2)")
(net 21 "Net-(Q2-Pad3)")
(net 22 "Net-(Q3-Pad2)")
(net 23 "Net-(R12-Pad1)")
(net 24 "Net-(R13-Pad1)")
(net 25 "Net-(R15-Pad1)")
(net 26 "Net-(R16-Pad1)")
(net 27 "Net-(R8-Pad1)")
(net 28 "Net-(RV1-Pad2)")
(net 29 VCC)
(net 30 VPP)
(net 31 /pic_sockets/VCC_PIC)
(net 32 /pic_sockets/VPP-MCLR)
(net 33 /pic_sockets/CLOCK-RB6)
(net 34 /pic_sockets/DATA-RB7)
(net_class Default "Ceci est la Netclass par défaut"
(clearance 0.25)
(trace_width 0.5)
(via_dia 1.6)
(via_drill 0.6)
(uvia_dia 0.508)
(uvia_drill 0.127)
(add_net /CTS)
(add_net /DTR)
(add_net /PC-CLOCK-OUT)
(add_net /TXD)
(add_net /pic_sockets/CLOCK-RB6)
(add_net /pic_sockets/DATA-RB7)
(add_net /pic_sockets/VCC_PIC)
(add_net /pic_sockets/VPP-MCLR)
(add_net "Net-(C2-Pad1)")
(add_net "Net-(C4-Pad1)")
(add_net "Net-(C5-Pad1)")
(add_net "Net-(C9-Pad2)")
(add_net "Net-(D1-Pad1)")
(add_net "Net-(D10-Pad1)")
(add_net "Net-(D11-Pad1)")
(add_net "Net-(D11-Pad2)")
(add_net "Net-(D12-Pad1)")
(add_net "Net-(D2-Pad1)")
(add_net "Net-(D4-Pad1)")
(add_net "Net-(D6-Pad1)")
(add_net "Net-(D8-Pad1)")
(add_net "Net-(D9-Pad1)")
(add_net "Net-(Q1-Pad2)")
(add_net "Net-(Q2-Pad3)")
(add_net "Net-(Q3-Pad2)")
(add_net "Net-(R12-Pad1)")
(add_net "Net-(R13-Pad1)")
(add_net "Net-(R15-Pad1)")
(add_net "Net-(R16-Pad1)")
(add_net "Net-(R8-Pad1)")
(add_net "Net-(RV1-Pad2)")
(add_net VPP)
)
(net_class POWER ""
(clearance 0.28)
(trace_width 0.8)
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(via_drill 0.6)
(uvia_dia 0.508)
(uvia_drill 0.127)
(add_net GND)
(add_net VCC)
)
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(descr "Condensateur polarise")
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(model discret/c_pol.wrl
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(module discret:C1-1 (layer Composant) (tedit 54031E5E) (tstamp 54032BB4)
(at 116.84 52.07)
(descr "Condensateur e = 1 ou 2 pas")
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(model discret/capa_2pas_5x5mm.wrl
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(rotate (xyz 0 0 0))
)
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(module discret:C1-1 (layer Composant) (tedit 54031E5E) (tstamp 54032BBF)
(at 132.08 49.53)
(descr "Condensateur e = 1 ou 2 pas")
(tags C)
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(rotate (xyz 0 0 0))
)
)
(module discret:C1-1 (layer Composant) (tedit 54031E5E) (tstamp 54032BCA)
(at 196.85 114.935 270)
(descr "Condensateur e = 1 ou 2 pas")
(tags C)
(path /4804A5E2/442AA12B)
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(at 198.755 73.66 270)
(descr "Condensateur e = 1 ou 2 pas")
(tags C)
(path /4804A5E2/442AA145)
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(rotate (xyz 0 0 0))
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(module discret:C1-1 (layer Composant) (tedit 54031E5E) (tstamp 54032BE0)
(at 145.542 49.784)
(descr "Condensateur e = 1 ou 2 pas")
(tags C)
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(rotate (xyz 0 0 0))
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)
(module discret:D5 (layer Composant) (tedit 54031E5E) (tstamp 54032BEB)
(at 87.63 64.77 270)
(descr "Diode 5 pas")
(tags "DIODE DEV")
(path /442A500B)
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(model discret/diode.wrl
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)
)
(module discret:D3 (layer Composant) (tedit 538C4421) (tstamp 54032BFA)
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(descr "Diode 3 pas")
(tags "DIODE DEV")
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(at (xyz 0 0 0))
(scale (xyz 0.3 0.3 0.3))
(rotate (xyz 0 0 0))
)
)
(module discret:D3 (layer Composant) (tedit 538C4421) (tstamp 54032C09)
(at 104.14 121.92)
(descr "Diode 3 pas")
(tags "DIODE DEV")
(path /442A4D25)
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(pad 1 thru_hole circle (at -3.81 0) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 5 GND))
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(at (xyz 0 0 0))
(scale (xyz 0.3 0.3 0.3))
(rotate (xyz 0 0 0))
)
)
(module discret:D3 (layer Composant) (tedit 538C4421) (tstamp 54032C18)
(at 104.14 111.76)
(descr "Diode 3 pas")
(tags "DIODE DEV")
(path /442A4D5C)
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(at (xyz 0 0 0))
(scale (xyz 0.3 0.3 0.3))
(rotate (xyz 0 0 0))
)
)
(module discret:D3 (layer Composant) (tedit 538C4421) (tstamp 54032C27)
(at 104.14 109.22)
(descr "Diode 3 pas")
(tags "DIODE DEV")
(path /442A4D5D)
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(net 5 GND))
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(at (xyz 0 0 0))
(scale (xyz 0.3 0.3 0.3))
(rotate (xyz 0 0 0))
)
)
(module discret:D3 (layer Composant) (tedit 538C4421) (tstamp 54032C36)
(at 104.14 124.46)
(descr "Diode 3 pas")
(tags "DIODE DEV")
(path /442A4D64)
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(net 17 "Net-(D6-Pad1)"))
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(at (xyz 0 0 0))
(scale (xyz 0.3 0.3 0.3))
(rotate (xyz 0 0 0))
)
)
(module discret:D3 (layer Composant) (tedit 538C4421) (tstamp 54032C45)
(at 104.14 115.57)
(descr "Diode 3 pas")
(tags "DIODE DEV")
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(pad 1 thru_hole circle (at -3.81 0) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 5 GND))
(model discret/diode.wrl
(at (xyz 0 0 0))
(scale (xyz 0.3 0.3 0.3))
(rotate (xyz 0 0 0))
)
)
(module discret:LEDV (layer Composant) (tedit 54031E5E) (tstamp 54032C54)
(at 154.94 77.47)
(descr "Led verticale diam 6mm")
(tags "LED DEV")
(path /442A4F5D)
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(pad 2 thru_hole circle (at 1.27 0) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 5 GND))
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(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module discret:LEDV (layer Composant) (tedit 54031E5E) (tstamp 54032C5D)
(at 154.94 87.63)
(descr "Led verticale diam 6mm")
(tags "LED DEV")
(path /442A5084)
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(effects (font (thickness 0.3048)))
)
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(fp_line (start 1.905 0.635) (end 2.54 0.635) (layer F.SilkS) (width 0.3048))
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(pad 2 thru_hole circle (at 1.27 0) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 5 GND))
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(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module discret:D5 (layer Composant) (tedit 54031E5E) (tstamp 54032C66)
(at 130.81 57.15)
(descr "Diode 5 pas")
(tags "DIODE DEV")
(path /442A6026)
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(pad 2 thru_hole rect (at 6.35 0) (size 1.778 1.778) (drill 1.143) (layers *.Cu *.Mask F.SilkS)
(net 30 VPP))
(model discret/diode.wrl
(at (xyz 0 0 0))
(scale (xyz 0.5 0.5 0.5))
(rotate (xyz 0 0 0))
)
)
(module discret:D3 (layer Composant) (tedit 538C4421) (tstamp 54032C75)
(at 142.875 80.645 180)
(descr "Diode 3 pas")
(tags "DIODE DEV")
(path /4639BA28)
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(net 12 "Net-(D11-Pad1)"))
(model discret/diode.wrl
(at (xyz 0 0 0))
(scale (xyz 0.3 0.3 0.3))
(rotate (xyz 0 0 0))
)
)
(module discret:LEDV (layer Composant) (tedit 54031E5E) (tstamp 54032C84)
(at 154.94 97.155)
(descr "Led verticale diam 6mm")
(tags "LED DEV")
(path /4639B9EA)
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)
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(pad 2 thru_hole circle (at 1.27 0) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 5 GND))
(model discret/led5_vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module connect:DB9FC (layer Composant) (tedit 54031E5E) (tstamp 54032C8D)
(at 81.28 115.57 90)
(descr "Connecteur DB9 femelle couche")
(tags "CONN DB9")
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(net 2 /DTR))
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(pad 8 thru_hole oval (at -3.81 -3.81 270) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 31 /pic_sockets/VCC_PIC))
(model dil/dil_8.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module dip_sockets:DIP-14__300_ELL (layer Composant) (tedit 54031E5E) (tstamp 54032E74)
(at 123.19 115.57)
(descr "14 pins DIL package, elliptical pads")
(tags DIL)
(path /442A4D6B)
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)
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(fp_line (start 10.16 2.54) (end -10.16 2.54) (layer F.SilkS) (width 0.381))
(fp_line (start -10.16 2.54) (end -10.16 -2.54) (layer F.SilkS) (width 0.381))
(fp_line (start -10.16 -1.27) (end -8.89 -1.27) (layer F.SilkS) (width 0.381))
(fp_line (start -8.89 -1.27) (end -8.89 1.27) (layer F.SilkS) (width 0.381))
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(pad 1 thru_hole rect (at -7.62 3.81) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 5 GND))
(pad 2 thru_hole oval (at -5.08 3.81) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 15 "Net-(D2-Pad1)"))
(pad 3 thru_hole oval (at -2.54 3.81) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 27 "Net-(R8-Pad1)"))
(pad 4 thru_hole oval (at 0 3.81) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 5 GND))
(pad 5 thru_hole oval (at 2.54 3.81) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 16 "Net-(D4-Pad1)"))
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(net 23 "Net-(R12-Pad1)"))
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(net 5 GND))
(pad 8 thru_hole oval (at 7.62 -3.81) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 24 "Net-(R13-Pad1)"))
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(net 17 "Net-(D6-Pad1)"))
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(net 5 GND))
(pad 11 thru_hole oval (at 0 -3.81) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 1 /CTS))
(pad 12 thru_hole oval (at -2.54 -3.81) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
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(pad 13 thru_hole oval (at -5.08 -3.81) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 5 GND))
(pad 14 thru_hole oval (at -7.62 -3.81) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 29 VCC))
(model dil/dil_14.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module discret:LM78XX (layer Composant) (tedit 54031E5E) (tstamp 54032E8C)
(at 99.06 71.12 90)
(descr "Regulateur TO220 serie LM78xx")
(tags "TR TO220")
(path /442A504A)
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(net 5 GND))
(pad VO thru_hole circle (at 0 2.54 90) (size 1.778 1.778) (drill 1.143) (layers *.Cu *.Mask F.SilkS)
(net 29 VCC))
(model discret/to220_horiz.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module dip_sockets:DIP-8__300_ELL (layer Composant) (tedit 54031E5E) (tstamp 54032E9D)
(at 114.3 60.96 270)
(descr "8 pins DIL package, elliptical pads")
(tags DIL)
(path /442A5E20)
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(net 5 GND))
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(net 11 "Net-(D10-Pad1)"))
(model dil/dil_8.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
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(at 211.455 118.11 270)
(descr "18 pins DIL package, elliptical pads")
(path /4804A5E2/442A81A7)
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(pad 12 thru_hole oval (at 5.08 -3.81 270) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
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(pad 13 thru_hole oval (at 2.54 -3.81 270) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
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(pad 14 thru_hole oval (at 0 -3.81 270) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
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(pad 18 thru_hole oval (at -10.16 -3.81 270) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
(model dil/dil_18.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module dip_sockets:DIP-8__300_ELL (layer Composant) (tedit 54031E5E) (tstamp 54032ECB)
(at 182.88 124.46 270)
(descr "8 pins DIL package, elliptical pads")
(tags DIL)
(path /4804A5E2/442A81A5)
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(pad 6 thru_hole oval (at 1.27 -3.81 270) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
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(pad 7 thru_hole oval (at -1.27 -3.81 270) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
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(pad 8 thru_hole oval (at -3.81 -3.81 270) (size 1.5748 2.286) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
(net 5 GND))
(model dil/dil_8.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module footprints:1pin-4 (layer Composant) (tedit 5401E012) (tstamp 54033012)
(at 77.47 135.89)
(descr "module 1 pin (ou trou mecanique de percage)")
(tags DEV)
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)
(module footprints:1pin-4 (layer Composant) (tedit 5401E012) (tstamp 54033017)
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(descr "module 1 pin (ou trou mecanique de percage)")
(tags DEV)
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