2020-08-25 17:42:52 +00:00
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/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2004-2020 KiCad Developers.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include <common.h>
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2020-11-12 20:19:22 +00:00
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#include <track.h>
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2020-09-11 15:04:11 +00:00
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#include <drc/drc_item.h>
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#include <drc/drc_rule.h>
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#include <drc/drc_test_provider.h>
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2020-08-25 17:42:52 +00:00
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/*
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2020-11-02 16:20:00 +00:00
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Via/pad annular ring width test. Checks if there's sufficient copper ring around
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PTH/NPTH holes (vias/pads)
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2020-08-25 17:42:52 +00:00
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Errors generated:
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- DRCE_ANNULUS
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2020-09-08 13:44:44 +00:00
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Todo:
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2020-08-25 17:42:52 +00:00
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- check pad holes too.
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- pad stack support (different IAR/OAR values depending on layer)
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*/
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class DRC_TEST_PROVIDER_ANNULUS : public DRC_TEST_PROVIDER
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{
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public:
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DRC_TEST_PROVIDER_ANNULUS()
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{
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}
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virtual ~DRC_TEST_PROVIDER_ANNULUS()
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{
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}
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virtual bool Run() override;
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virtual const wxString GetName() const override
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{
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return "annulus";
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};
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virtual const wxString GetDescription() const override
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{
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return "Tests pad/via annular rings";
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}
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2021-01-01 22:29:15 +00:00
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virtual std::set<DRC_CONSTRAINT_T> GetConstraintTypes() const override;
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2020-09-14 17:54:14 +00:00
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int GetNumPhases() const override;
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2020-08-25 17:42:52 +00:00
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};
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2020-09-11 21:50:53 +00:00
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bool DRC_TEST_PROVIDER_ANNULUS::Run()
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2020-08-25 17:42:52 +00:00
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{
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2020-09-16 15:03:55 +00:00
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const int delta = 250; // This is the number of tests between 2 calls to the progress bar
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2020-11-02 16:20:00 +00:00
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if( !m_drcEngine->HasRulesForConstraintType( ANNULAR_WIDTH_CONSTRAINT ) )
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2020-08-25 17:42:52 +00:00
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{
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2020-09-14 17:54:14 +00:00
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reportAux( "No annulus constraints found. Skipping check." );
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2020-08-25 17:42:52 +00:00
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return false;
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}
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2020-09-18 19:57:54 +00:00
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if( !reportPhase( _( "Checking via annular rings..." ) ) )
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return false;
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2020-08-25 17:42:52 +00:00
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2020-09-11 21:50:53 +00:00
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auto checkAnnulus =
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[&]( BOARD_ITEM* item ) -> bool
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{
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2020-09-23 10:46:41 +00:00
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if( m_drcEngine->IsErrorLimitExceeded( DRCE_ANNULAR_WIDTH ) )
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2020-09-12 19:28:22 +00:00
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return false;
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2020-09-22 14:50:15 +00:00
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int v_min = 0;
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int v_max = 0;
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2020-09-11 21:50:53 +00:00
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VIA* via = dyn_cast<VIA*>( item );
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2020-08-25 17:42:52 +00:00
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2020-09-11 21:50:53 +00:00
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// fixme: check minimum IAR/OAR ring for THT pads too
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if( !via )
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return true;
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2020-08-25 17:42:52 +00:00
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2021-02-08 14:53:49 +00:00
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// PADSTACKS TODO: once we have padstacks we'll need to run this per-layer....
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auto constraint = m_drcEngine->EvalRules( ANNULAR_WIDTH_CONSTRAINT, via, nullptr,
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UNDEFINED_LAYER );
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2020-09-11 21:50:53 +00:00
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int annulus = ( via->GetWidth() - via->GetDrillValue() ) / 2;
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bool fail_min = false;
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bool fail_max = false;
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2020-08-25 17:42:52 +00:00
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2020-09-11 21:50:53 +00:00
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if( constraint.Value().HasMin() )
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{
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v_min = constraint.Value().Min();
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fail_min = annulus < v_min;
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}
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2020-08-25 17:42:52 +00:00
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2020-09-11 21:50:53 +00:00
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if( constraint.Value().HasMax() )
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{
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v_max = constraint.Value().Max();
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fail_max = annulus > v_max;
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}
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2020-08-25 17:42:52 +00:00
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2020-09-11 21:50:53 +00:00
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if( fail_min || fail_max )
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{
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2020-09-23 10:46:41 +00:00
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std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_ANNULAR_WIDTH );
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2020-08-25 17:42:52 +00:00
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2020-09-22 14:50:15 +00:00
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if( fail_min )
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2020-11-02 16:20:00 +00:00
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m_msg.Printf( _( "(%s min annular width %s; actual %s)" ),
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2020-09-22 14:50:15 +00:00
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constraint.GetName(),
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2020-10-02 20:51:24 +00:00
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MessageTextFromValue( userUnits(), v_min ),
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MessageTextFromValue( userUnits(), annulus ) );
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2020-09-22 14:50:15 +00:00
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if( fail_max )
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2020-11-02 16:20:00 +00:00
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m_msg.Printf( _( "(%s max annular width %s; actual %s)" ),
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2020-09-22 14:50:15 +00:00
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constraint.GetName(),
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2020-10-02 20:51:24 +00:00
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MessageTextFromValue( userUnits(), v_max ),
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MessageTextFromValue( userUnits(), annulus ) );
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2020-08-25 17:42:52 +00:00
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2020-11-02 16:20:00 +00:00
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drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + m_msg );
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2020-09-11 21:50:53 +00:00
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drcItem->SetItems( item );
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drcItem->SetViolatingRule( constraint.GetParentRule() );
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2020-08-25 17:42:52 +00:00
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2020-11-24 22:16:41 +00:00
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reportViolation( drcItem, via->GetPosition() );
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2020-09-11 21:50:53 +00:00
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}
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2020-08-25 17:42:52 +00:00
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2020-09-11 21:50:53 +00:00
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return true;
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};
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2020-08-25 17:42:52 +00:00
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2020-09-16 15:03:55 +00:00
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BOARD* board = m_drcEngine->GetBoard();
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int ii = 0;
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for( TRACK* item : board->Tracks() )
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{
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2020-09-18 19:57:54 +00:00
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if( !reportProgress( ii++, board->Tracks().size(), delta ) )
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break;
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2020-09-16 15:03:55 +00:00
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if( !checkAnnulus( item ) )
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break;
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}
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2020-08-25 17:42:52 +00:00
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reportRuleStatistics();
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return true;
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}
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2020-09-14 17:54:14 +00:00
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int DRC_TEST_PROVIDER_ANNULUS::GetNumPhases() const
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{
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return 1;
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}
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2021-01-01 22:29:15 +00:00
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std::set<DRC_CONSTRAINT_T> DRC_TEST_PROVIDER_ANNULUS::GetConstraintTypes() const
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2020-08-25 17:42:52 +00:00
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{
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2020-11-02 16:20:00 +00:00
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return { ANNULAR_WIDTH_CONSTRAINT };
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2020-08-25 17:42:52 +00:00
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}
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namespace detail
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{
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2020-09-11 21:50:53 +00:00
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static DRC_REGISTER_TEST_PROVIDER<DRC_TEST_PROVIDER_ANNULUS> dummy;
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2020-09-08 13:44:44 +00:00
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}
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