2015-11-02 09:24:32 +00:00
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EESchema Schematic File Version 2
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2013-05-26 04:36:44 +00:00
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LIBS:power
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LIBS:device
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LIBS:transistors
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LIBS:conn
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LIBS:linear
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LIBS:regul
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LIBS:74xx
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LIBS:cmos4000
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LIBS:adc-dac
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LIBS:memory
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LIBS:xilinx
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LIBS:special
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LIBS:microcontrollers
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LIBS:dsp
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LIBS:microchip
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LIBS:analog_switches
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LIBS:motorola
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LIBS:texas
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LIBS:intel
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LIBS:audio
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LIBS:interface
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LIBS:digital-audio
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LIBS:philips
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LIBS:display
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LIBS:cypress
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LIBS:siliconi
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LIBS:opto
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LIBS:atmel
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LIBS:contrib
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LIBS:valves
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2015-11-02 09:24:32 +00:00
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LIBS:test_pads_inside_pads-cache
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EELAYER 25 0
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2013-05-26 04:36:44 +00:00
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EELAYER END
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2015-11-02 09:24:32 +00:00
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$Descr A4 11693 8268
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2013-05-26 04:36:44 +00:00
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encoding utf-8
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Sheet 1 1
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Title ""
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Date "19 dec 2011"
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Rev ""
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Comp ""
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Comment1 ""
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Comment2 ""
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Comment3 ""
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Comment4 ""
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$EndDescr
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Wire Wire Line
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4150 1750 3750 1750
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Wire Wire Line
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4150 1450 3750 1450
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Text Label 3850 1450 0 60 ~ 0
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NET1
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$Comp
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L CONN_1 P4
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U 1 1 4EE5056D
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P 4300 1450
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F 0 "P4" H 4380 1450 40 0000 L CNN
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F 1 "CONN_1" H 4300 1505 30 0001 C CNN
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2015-11-02 09:24:32 +00:00
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F 2 "Connect:1pin" H 4300 1400 60 0000 C CNN
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F 3 "" H 4300 1450 60 0001 C CNN
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2013-05-26 04:36:44 +00:00
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1 4300 1450
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1 0 0 -1
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$EndComp
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$Comp
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L CONN_1 P3
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U 1 1 4EE5056C
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P 3600 1450
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F 0 "P3" H 3680 1450 40 0000 L CNN
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F 1 "CONN_1" H 3600 1505 30 0001 C CNN
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2015-11-02 09:24:32 +00:00
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F 2 "Connect:1pin" H 3600 1500 60 0000 C CNN
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F 3 "" H 3600 1450 60 0001 C CNN
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2013-05-26 04:36:44 +00:00
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1 3600 1450
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-1 0 0 1
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$EndComp
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$Comp
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L CONN_1 P1
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U 1 1 4EDF7CC5
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P 3600 1750
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F 0 "P1" H 3680 1750 40 0000 L CNN
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F 1 "CONN_1" H 3600 1805 30 0001 C CNN
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2015-11-02 09:24:32 +00:00
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F 2 "Connect:1pin" H 3600 1800 60 0000 C CNN
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F 3 "" H 3600 1750 60 0001 C CNN
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2013-05-26 04:36:44 +00:00
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1 3600 1750
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-1 0 0 1
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$EndComp
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$Comp
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L CONN_1 P2
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U 1 1 4EDF7CC0
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P 4300 1750
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F 0 "P2" H 4380 1750 40 0000 L CNN
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F 1 "CONN_1" H 4300 1805 30 0001 C CNN
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2015-11-02 09:24:32 +00:00
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F 2 "Connect:1pin" H 4300 1700 60 0000 C CNN
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F 3 "" H 4300 1750 60 0001 C CNN
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2013-05-26 04:36:44 +00:00
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1 4300 1750
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1 0 0 -1
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$EndComp
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Text Label 3850 1750 0 60 ~ 0
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NET2
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$EndSCHEMATC
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