2010-08-31 16:00:37 +00:00
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<<<<<<< TREE
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update=31/08/2010 17:56:15
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=======
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2010-07-26 17:06:36 +00:00
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update=22/07/2010 13:46:39
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2010-08-31 16:00:37 +00:00
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>>>>>>> MERGE-SOURCE
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2010-05-16 14:05:04 +00:00
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version=1
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last_client=pcbnew
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[common]
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NetDir=
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2010-06-30 11:15:34 +00:00
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[general]
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version=1
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RootSch=interf_u.sch
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BoardNm=interf_u.brd
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[cvpcb]
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version=1
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NetITyp=0
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NetIExt=.net
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PkgIExt=.pkg
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NetType=0
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[cvpcb/libraries]
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EquName1=devcms
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2010-05-16 14:05:04 +00:00
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[eeschema]
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version=1
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LibDir=
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NetFmt=1
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HPGLSpd=20
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HPGLDm=15
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HPGLNum=1
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offX_A4=0
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offY_A4=0
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offX_A3=0
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offY_A3=0
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offX_A2=0
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offY_A2=0
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offX_A1=0
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offY_A1=0
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offX_A0=0
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offY_A0=0
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offX_A=0
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offY_A=0
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offX_B=0
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offY_B=0
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offX_C=0
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offY_C=0
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offX_D=0
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offY_D=0
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offX_E=0
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offY_E=0
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RptD_X=0
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RptD_Y=100
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RptLab=1
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SimCmd=
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UseNetN=0
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2010-06-30 11:15:34 +00:00
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LabSize=60
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PrintMonochrome=1
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ShowSheetReferenceAndTitleBlock=1
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2010-05-16 14:05:04 +00:00
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[eeschema/libraries]
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LibName1=power
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LibName2=device
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LibName3=conn
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LibName4=linear
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LibName5=regul
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LibName6=74xx
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LibName7=cmos4000
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LibName8=adc-dac
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LibName9=memory
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LibName10=xilinx
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LibName11=special
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2010-06-30 11:15:34 +00:00
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LibName12=image
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2010-05-16 14:05:04 +00:00
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[pcbnew]
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version=1
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PadDrlX=430
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PadDimH=550
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PadDimV=550
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BoardThickness=630
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SgPcb45=1
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TxtPcbV=800
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TxtPcbH=600
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TxtModV=600
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TxtModH=600
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TxtModW=120
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VEgarde=100
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DrawLar=150
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EdgeLar=50
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TxtLar=170
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MSegLar=150
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LastNetListRead=interf_u.net
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[pcbnew/libraries]
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LibDir=
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LibName1=connect
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LibName2=discret
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LibName3=pin_array
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LibName4=sockets
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LibName5=divers
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LibName6=libcms
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LibName7=display
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