2020-11-09 08:09:58 +00:00
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{
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"board": {
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2020-11-09 08:09:58 +00:00
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{
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"version": 2
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2020-11-09 08:09:58 +00:00
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},
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2022-10-15 07:07:59 +00:00
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2020-11-09 08:09:58 +00:00
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2022-10-15 07:07:59 +00:00
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2020-11-09 08:09:58 +00:00
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2021-01-15 19:21:23 +00:00
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2020-11-09 08:09:58 +00:00
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2022-10-15 07:07:59 +00:00
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"footprint": "error",
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2021-11-21 17:40:36 +00:00
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2020-11-09 08:09:58 +00:00
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2022-10-15 07:07:59 +00:00
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2020-11-09 08:09:58 +00:00
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2022-10-15 07:07:59 +00:00
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2020-11-09 08:09:58 +00:00
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2021-01-15 19:21:23 +00:00
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"microvia_drill_out_of_range": "error",
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2020-11-09 08:09:58 +00:00
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"missing_courtyard": "ignore",
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"padstack": "error",
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2022-10-15 07:07:59 +00:00
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"silk_edge_clearance": "ignore",
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2020-11-09 08:09:58 +00:00
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2022-10-15 07:07:59 +00:00
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2021-11-21 17:40:36 +00:00
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2020-11-09 08:09:58 +00:00
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"too_many_vias": "error",
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2022-10-15 07:07:59 +00:00
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2020-11-09 08:09:58 +00:00
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2020-11-09 08:09:58 +00:00
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2022-10-15 07:07:59 +00:00
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2020-11-09 08:09:58 +00:00
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2022-10-15 07:07:59 +00:00
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2020-11-09 08:09:58 +00:00
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2021-08-16 08:48:44 +00:00
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2022-10-15 07:07:59 +00:00
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2021-08-16 08:48:44 +00:00
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2020-11-09 08:09:58 +00:00
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2022-10-15 07:07:59 +00:00
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2020-11-09 08:09:58 +00:00
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2021-01-15 19:21:23 +00:00
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0.0,
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2020-11-09 08:09:58 +00:00
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0.3,
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0.4
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{
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2020-11-09 08:09:58 +00:00
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2022-10-15 07:07:59 +00:00
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2020-11-09 08:09:58 +00:00
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2020-11-09 08:09:58 +00:00
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|
|
0,
|
|
|
|
2
|
|
|
|
],
|
|
|
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[
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|
|
|
2,
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2,
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2,
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2,
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2,
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2,
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2,
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2,
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2,
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|
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2,
|
2021-02-06 10:33:13 +00:00
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|
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2,
|
2020-11-09 08:09:58 +00:00
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|
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2
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|
|
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]
|
|
|
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],
|
|
|
|
"rule_severities": {
|
|
|
|
"bus_definition_conflict": "error",
|
2021-08-16 08:48:44 +00:00
|
|
|
"bus_entry_needed": "error",
|
2020-11-09 08:09:58 +00:00
|
|
|
"bus_label_syntax": "error",
|
|
|
|
"bus_to_bus_conflict": "error",
|
|
|
|
"bus_to_net_conflict": "error",
|
|
|
|
"different_unit_footprint": "error",
|
|
|
|
"different_unit_net": "error",
|
2021-02-06 10:33:13 +00:00
|
|
|
"duplicate_reference": "error",
|
2020-11-09 08:09:58 +00:00
|
|
|
"duplicate_sheet_names": "error",
|
2021-02-06 10:33:13 +00:00
|
|
|
"extra_units": "error",
|
2020-11-09 08:09:58 +00:00
|
|
|
"global_label_dangling": "warning",
|
|
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|
"hier_label_mismatch": "error",
|
|
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"label_dangling": "error",
|
|
|
|
"lib_symbol_issues": "warning",
|
2021-11-21 17:40:36 +00:00
|
|
|
"multiple_net_names": "ignore",
|
2020-11-09 08:09:58 +00:00
|
|
|
"net_not_bus_member": "warning",
|
|
|
|
"no_connect_connected": "warning",
|
|
|
|
"no_connect_dangling": "warning",
|
|
|
|
"pin_not_connected": "error",
|
|
|
|
"pin_not_driven": "error",
|
|
|
|
"pin_to_pin": "warning",
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|
|
|
"power_pin_not_driven": "error",
|
|
|
|
"similar_labels": "warning",
|
2021-02-06 10:33:13 +00:00
|
|
|
"unannotated": "error",
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|
|
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"unit_value_mismatch": "error",
|
2020-11-09 08:09:58 +00:00
|
|
|
"unresolved_variable": "error",
|
|
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|
"wire_dangling": "error"
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|
}
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|
},
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|
|
"libraries": {
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"pinned_footprint_libs": [],
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"pinned_symbol_libs": []
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},
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"meta": {
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"filename": "kit-dev-coldfire-xilinx_5213.kicad_pro",
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"version": 1
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},
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|
|
"net_settings": {
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|
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"classes": [
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{
|
2022-10-15 07:07:59 +00:00
|
|
|
"bus_width": 12,
|
2020-11-09 08:09:58 +00:00
|
|
|
"clearance": 0.15,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"diff_pair_width": 0.2,
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"line_style": 0,
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|
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|
"microvia_diameter": 0.3,
|
|
|
|
"microvia_drill": 0.1,
|
|
|
|
"name": "Default",
|
|
|
|
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
|
|
|
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
|
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|
"track_width": 0.2,
|
|
|
|
"via_diameter": 0.6,
|
|
|
|
"via_drill": 0.4,
|
2022-10-15 07:07:59 +00:00
|
|
|
"wire_width": 6
|
2020-11-09 08:09:58 +00:00
|
|
|
},
|
|
|
|
{
|
2022-10-15 07:07:59 +00:00
|
|
|
"bus_width": 12,
|
2020-11-09 08:09:58 +00:00
|
|
|
"clearance": 0.15,
|
|
|
|
"diff_pair_gap": 0.25,
|
|
|
|
"diff_pair_via_gap": 0.25,
|
|
|
|
"diff_pair_width": 0.2,
|
|
|
|
"line_style": 0,
|
|
|
|
"microvia_diameter": 0.3,
|
|
|
|
"microvia_drill": 0.1,
|
|
|
|
"name": "POWER",
|
|
|
|
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
|
|
|
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
|
|
|
"track_width": 0.4,
|
|
|
|
"via_diameter": 0.8,
|
|
|
|
"via_drill": 0.4,
|
2022-10-15 07:07:59 +00:00
|
|
|
"wire_width": 6
|
2020-11-09 08:09:58 +00:00
|
|
|
}
|
|
|
|
],
|
|
|
|
"meta": {
|
2022-10-15 07:07:59 +00:00
|
|
|
"version": 3
|
2020-11-09 08:09:58 +00:00
|
|
|
},
|
2022-10-15 07:07:59 +00:00
|
|
|
"net_colors": null,
|
|
|
|
"netclass_assignments": null,
|
|
|
|
"netclass_patterns": [
|
|
|
|
{
|
|
|
|
"netclass": "POWER",
|
|
|
|
"pattern": "+3.3V"
|
|
|
|
},
|
|
|
|
{
|
|
|
|
"netclass": "POWER",
|
|
|
|
"pattern": "GND"
|
|
|
|
},
|
|
|
|
{
|
|
|
|
"netclass": "POWER",
|
|
|
|
"pattern": "GNDA"
|
|
|
|
}
|
|
|
|
]
|
2020-11-09 08:09:58 +00:00
|
|
|
},
|
|
|
|
"pcbnew": {
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|
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|
"last_paths": {
|
|
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|
"gencad": "",
|
|
|
|
"idf": "",
|
|
|
|
"netlist": "",
|
|
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"specctra_dsn": "",
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|
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|
"step": "",
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|
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|
"vmrl": "",
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|
|
|
"vrml": ""
|
|
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|
},
|
|
|
|
"page_layout_descr_file": ""
|
|
|
|
},
|
|
|
|
"schematic": {
|
2021-08-16 08:48:44 +00:00
|
|
|
"annotate_start_num": 0,
|
2020-11-09 08:09:58 +00:00
|
|
|
"drawing": {
|
2022-10-15 07:07:59 +00:00
|
|
|
"dashed_lines_dash_length_ratio": 12.0,
|
|
|
|
"dashed_lines_gap_length_ratio": 3.0,
|
2020-11-09 08:09:58 +00:00
|
|
|
"default_bus_thickness": 12.0,
|
|
|
|
"default_junction_size": 40.0,
|
|
|
|
"default_line_thickness": 6.0,
|
|
|
|
"default_text_size": 50.0,
|
|
|
|
"default_wire_thickness": 6.0,
|
|
|
|
"field_names": [],
|
2021-08-16 08:48:44 +00:00
|
|
|
"intersheets_ref_own_page": false,
|
2020-11-09 08:09:58 +00:00
|
|
|
"intersheets_ref_prefix": "",
|
|
|
|
"intersheets_ref_short": false,
|
|
|
|
"intersheets_ref_show": false,
|
|
|
|
"intersheets_ref_suffix": "",
|
|
|
|
"junction_size_choice": 3,
|
2021-08-16 08:48:44 +00:00
|
|
|
"label_size_ratio": 0.3,
|
2020-11-09 08:09:58 +00:00
|
|
|
"pin_symbol_size": 25.0,
|
|
|
|
"text_offset_ratio": 0.3
|
|
|
|
},
|
|
|
|
"legacy_lib_dir": "",
|
|
|
|
"legacy_lib_list": [],
|
|
|
|
"meta": {
|
2021-08-16 08:48:44 +00:00
|
|
|
"version": 1
|
2020-11-09 08:09:58 +00:00
|
|
|
},
|
|
|
|
"net_format_name": "Pcbnew",
|
2021-08-16 08:48:44 +00:00
|
|
|
"ngspice": {
|
|
|
|
"fix_include_paths": true,
|
|
|
|
"fix_passive_vals": false,
|
|
|
|
"meta": {
|
|
|
|
"version": 0
|
|
|
|
},
|
|
|
|
"model_mode": 0,
|
|
|
|
"workbook_filename": ""
|
|
|
|
},
|
2020-11-09 08:09:58 +00:00
|
|
|
"page_layout_descr_file": "",
|
|
|
|
"plot_directory": "",
|
|
|
|
"spice_adjust_passive_values": false,
|
|
|
|
"spice_external_command": "spice \"%I\"",
|
2022-10-15 07:07:59 +00:00
|
|
|
"spice_save_all_currents": false,
|
|
|
|
"spice_save_all_voltages": false,
|
2020-11-09 08:09:58 +00:00
|
|
|
"subpart_first_id": 65,
|
|
|
|
"subpart_id_separator": 0
|
|
|
|
},
|
|
|
|
"sheets": [
|
|
|
|
[
|
2021-08-16 08:48:44 +00:00
|
|
|
"f5d7a48d-4587-4550-a504-c505ca11d375",
|
2020-11-09 08:09:58 +00:00
|
|
|
""
|
|
|
|
],
|
|
|
|
[
|
|
|
|
"00000000-0000-0000-0000-000047d80204",
|
|
|
|
"xilinx"
|
|
|
|
],
|
|
|
|
[
|
|
|
|
"00000000-0000-0000-0000-000047d80202",
|
|
|
|
"inout_user"
|
|
|
|
]
|
|
|
|
],
|
|
|
|
"text_variables": {}
|
|
|
|
}
|