2018-08-24 10:54:45 +00:00
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/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2012 Jean-Pierre Charras, jean-pierre.charras@ujf-grenoble.fr
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* Copyright (C) 2012 SoftPLC Corporation, Dick Hollenbeck <dick@softplc.com>
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2021-06-04 16:21:48 +00:00
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* Copyright (C) 2011 Wayne Stambaugh <stambaughw@gmail.com>
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2018-08-24 10:54:45 +00:00
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*
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2021-06-04 16:21:48 +00:00
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* Copyright (C) 1992-2021 KiCad Developers, see AUTHORS.txt for contributors.
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2018-08-24 10:54:45 +00:00
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#ifndef __AR_MATRIX_H
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#define __AR_MATRIX_H
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#include <eda_rect.h>
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2021-07-29 09:47:43 +00:00
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#include <layer_ids.h>
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2018-08-24 10:54:45 +00:00
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2020-10-04 23:34:59 +00:00
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class PCB_SHAPE;
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2020-11-12 22:30:02 +00:00
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class PAD;
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2020-11-13 15:15:52 +00:00
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class FOOTPRINT;
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2018-08-24 10:54:45 +00:00
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#define AR_MAX_ROUTING_LAYERS_COUNT 2
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#define AR_SIDE_TOP 0
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#define AR_SIDE_BOTTOM 1
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/**
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2021-06-04 16:21:48 +00:00
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* Handle the matrix routing that describes the actual board.
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2018-08-24 10:54:45 +00:00
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*/
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class AR_MATRIX
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{
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public:
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typedef unsigned char MATRIX_CELL;
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typedef int DIST_CELL;
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enum CELL_OP
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{
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WRITE_CELL = 0,
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WRITE_OR_CELL = 1,
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WRITE_XOR_CELL = 2,
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WRITE_AND_CELL = 3,
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WRITE_ADD_CELL = 4
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};
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AR_MATRIX();
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~AR_MATRIX();
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void WriteCell( int aRow, int aCol, int aSide, MATRIX_CELL aCell )
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{
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( *this.*m_opWriteCell )( aRow, aCol, aSide, aCell );
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}
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/**
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* @return the board coordinate corresponding to the routing matrix origin ( board
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* coordinate offset ).
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2018-08-24 10:54:45 +00:00
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*/
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wxPoint GetBrdCoordOrigin()
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{
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return m_BrdBox.GetOrigin();
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}
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/**
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2021-06-04 16:21:48 +00:00
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* Calculate the number of rows and columns of dimensions of \a aPcb for routing and
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2018-08-24 10:54:45 +00:00
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* automatic calculation of area.
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2021-06-04 16:21:48 +00:00
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*
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* @param aPcb is the physical board.
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* @param aUseBoardEdgesOnly set to true to use board edges only or false to use the full
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* board bounding box (default).
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2018-08-24 10:54:45 +00:00
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*/
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bool ComputeMatrixSize( const EDA_RECT& aBoundingBox );
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/**
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* Initialize the data structures.
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*
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* @return the amount of memory used or -1 if default.
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*/
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int InitRoutingMatrix();
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void UnInitRoutingMatrix();
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// Initialize WriteCell to make the aLogicOp
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void SetCellOperation( CELL_OP aLogicOp );
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// functions to read/write one cell ( point on grid routing matrix:
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MATRIX_CELL GetCell( int aRow, int aCol, int aSide );
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void SetCell( int aRow, int aCol, int aSide, MATRIX_CELL aCell );
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void OrCell( int aRow, int aCol, int aSide, MATRIX_CELL aCell );
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void XorCell( int aRow, int aCol, int aSide, MATRIX_CELL aCell );
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void AndCell( int aRow, int aCol, int aSide, MATRIX_CELL aCell );
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void AddCell( int aRow, int aCol, int aSide, MATRIX_CELL aCell );
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DIST_CELL GetDist( int aRow, int aCol, int aSide );
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void SetDist( int aRow, int aCol, int aSide, DIST_CELL );
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2020-10-04 23:34:59 +00:00
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void TraceSegmentPcb( PCB_SHAPE* pt_segm, int color, int marge, AR_MATRIX::CELL_OP op_logic );
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2020-11-12 22:30:02 +00:00
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void CreateKeepOutRectangle( int ux0, int uy0, int ux1, int uy1, int marge, int aKeepOut,
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LSET aLayerMask );
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void PlacePad( PAD* aPad, int color, int marge, AR_MATRIX::CELL_OP op_logic );
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2018-08-24 10:54:45 +00:00
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void TraceFilledRectangle( int ux0, int uy0, int ux1, int uy1, double angle, LSET aLayerMask,
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2020-11-12 22:30:02 +00:00
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int color, AR_MATRIX::CELL_OP op_logic );
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2018-08-24 10:54:45 +00:00
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void TraceFilledRectangle( int ux0, int uy0, int ux1, int uy1, LSET aLayerMask, int color,
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2020-11-12 22:30:02 +00:00
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AR_MATRIX::CELL_OP op_logic );
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2018-08-24 10:54:45 +00:00
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private:
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void drawSegmentQcq( int ux0, int uy0, int ux1, int uy1, int lg, LAYER_NUM layer, int color,
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CELL_OP op_logic );
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void traceCircle( int ux0, int uy0, int ux1, int uy1, int lg, LAYER_NUM layer, int color,
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2020-11-12 22:30:02 +00:00
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AR_MATRIX::CELL_OP op_logic );
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void traceFilledCircle( int cx, int cy, int radius, LSET aLayerMask, int color,
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AR_MATRIX::CELL_OP op_logic );
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2018-08-24 10:54:45 +00:00
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void traceArc( int ux0, int uy0, int ux1, int uy1, double ArcAngle, int lg, LAYER_NUM layer,
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2020-11-12 22:30:02 +00:00
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int color, AR_MATRIX::CELL_OP op_logic );
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2021-06-04 16:21:48 +00:00
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public:
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MATRIX_CELL* m_BoardSide[AR_MAX_ROUTING_LAYERS_COUNT]; // the image map of 2 board sides
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DIST_CELL* m_DistSide[AR_MAX_ROUTING_LAYERS_COUNT]; // the image map of 2 board sides:
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// distance to cells
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int m_RoutingLayersCount; // Number of layers for autorouting (0 or 1)
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int m_GridRouting; // Size of grid for autoplace/autoroute
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EDA_RECT m_BrdBox; // Actual board bounding box
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int m_Nrows, m_Ncols; // Matrix size
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int m_MemSize; // Memory requirement, just for statistics
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int m_RouteCount; // Number of routes
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PCB_LAYER_ID m_routeLayerTop;
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PCB_LAYER_ID m_routeLayerBottom;
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private:
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// a pointer to the current selected cell operation
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void ( AR_MATRIX::*m_opWriteCell )( int aRow, int aCol, int aSide, MATRIX_CELL aCell );
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2018-08-24 10:54:45 +00:00
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};
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#endif
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