2020-07-27 13:33:06 +00:00
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/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2004-2020 KiCad Developers.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include <common.h>
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2020-10-04 23:34:59 +00:00
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#include <pcb_shape.h>
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2020-07-27 13:33:06 +00:00
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#include <geometry/seg.h>
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#include <geometry/shape_segment.h>
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2020-09-11 16:24:27 +00:00
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#include <drc/drc_engine.h>
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2020-09-11 15:04:11 +00:00
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#include <drc/drc_item.h>
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#include <drc/drc_rule.h>
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2020-09-11 16:24:27 +00:00
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#include <drc/drc_test_provider_clearance_base.h>
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2020-07-27 13:33:06 +00:00
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/*
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2020-10-06 12:20:29 +00:00
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Board edge clearance test. Checks all items for their mechanical clearances against the board
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edge.
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2020-07-27 13:33:06 +00:00
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Errors generated:
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- DRCE_COPPER_EDGE_CLEARANCE
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2020-08-11 22:15:50 +00:00
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TODO:
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- separate holes to edge check
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2020-10-06 12:20:29 +00:00
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- tester only looks for edge crossings. it doesn't check if items are inside/outside the board
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area.
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2020-09-23 21:49:18 +00:00
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- pad test missing!
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2020-07-27 13:33:06 +00:00
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*/
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class DRC_TEST_PROVIDER_EDGE_CLEARANCE : public DRC_TEST_PROVIDER_CLEARANCE_BASE
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{
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public:
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DRC_TEST_PROVIDER_EDGE_CLEARANCE () :
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2020-09-11 16:24:27 +00:00
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DRC_TEST_PROVIDER_CLEARANCE_BASE()
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{
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}
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2020-07-27 13:33:06 +00:00
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2020-08-11 22:17:43 +00:00
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virtual ~DRC_TEST_PROVIDER_EDGE_CLEARANCE()
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2020-07-27 13:33:06 +00:00
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{
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}
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virtual bool Run() override;
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2020-08-11 22:17:43 +00:00
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virtual const wxString GetName() const override
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2020-07-27 13:33:06 +00:00
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{
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2020-08-11 22:17:43 +00:00
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return "edge_clearance";
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2020-09-11 16:24:27 +00:00
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}
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virtual const wxString GetDescription() const override
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{
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2020-08-11 22:15:50 +00:00
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return "Tests items vs board edge clearance";
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2020-07-27 13:33:06 +00:00
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}
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2020-09-13 10:37:20 +00:00
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virtual std::set<DRC_CONSTRAINT_TYPE_T> GetConstraintTypes() const override;
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2020-09-14 17:54:14 +00:00
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int GetNumPhases() const override;
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2020-07-27 13:33:06 +00:00
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};
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2020-09-11 16:24:27 +00:00
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bool DRC_TEST_PROVIDER_EDGE_CLEARANCE::Run()
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2020-07-27 13:33:06 +00:00
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{
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m_board = m_drcEngine->GetBoard();
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2020-08-11 22:15:50 +00:00
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DRC_CONSTRAINT worstClearanceConstraint;
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2020-09-11 15:04:11 +00:00
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2020-09-11 16:24:27 +00:00
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if( m_drcEngine->QueryWorstConstraint( DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE,
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worstClearanceConstraint, DRCCQ_LARGEST_MINIMUM ) )
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{
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m_largestClearance = worstClearanceConstraint.GetValue().Min();
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}
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2020-07-27 13:33:06 +00:00
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2020-09-14 17:54:14 +00:00
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reportAux( "Worst clearance : %d nm", m_largestClearance );
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2020-09-11 16:24:27 +00:00
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2020-09-18 19:57:54 +00:00
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if( !reportPhase( _( "Checking board edge clearances..." ) ) )
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return false;
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2020-08-03 22:12:11 +00:00
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2020-10-04 23:34:59 +00:00
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std::vector<PCB_SHAPE*> boardOutline;
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2020-08-03 22:12:11 +00:00
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std::vector<BOARD_ITEM*> boardItems;
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2020-07-27 13:33:06 +00:00
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2020-09-12 19:28:22 +00:00
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auto queryBoardOutlineItems =
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[&]( BOARD_ITEM *item ) -> bool
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{
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2020-10-04 23:34:59 +00:00
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boardOutline.push_back( dyn_cast<PCB_SHAPE*>( item ) );
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2020-09-12 19:28:22 +00:00
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return true;
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};
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2020-07-27 13:33:06 +00:00
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2020-09-12 19:28:22 +00:00
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auto queryBoardGeometryItems =
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[&]( BOARD_ITEM *item ) -> bool
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{
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boardItems.push_back( item );
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return true;
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};
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2020-07-27 13:33:06 +00:00
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2020-10-04 14:19:33 +00:00
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forEachGeometryItem( { PCB_SHAPE_T }, LSET( Edge_Cuts ), queryBoardOutlineItems );
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2020-09-14 17:54:14 +00:00
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forEachGeometryItem( {}, LSET::AllCuMask(), queryBoardGeometryItems );
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2020-07-27 13:33:06 +00:00
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2020-08-25 17:42:52 +00:00
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wxString val;
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2020-10-06 12:20:29 +00:00
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wxGetEnv( "WXTRACE", &val );
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2020-07-27 13:33:06 +00:00
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2020-09-14 17:54:14 +00:00
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drc_dbg( 2, "outline: %d items, board: %d items\n",
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(int) boardOutline.size(), (int) boardItems.size() );
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2020-08-25 17:42:52 +00:00
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2020-10-04 23:34:59 +00:00
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for( PCB_SHAPE* outlineItem : boardOutline )
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2020-07-27 13:33:06 +00:00
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{
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2020-10-06 12:20:29 +00:00
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if( m_drcEngine->IsErrorLimitExceeded( DRCE_COPPER_EDGE_CLEARANCE ) )
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2020-09-12 19:28:22 +00:00
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break;
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2020-09-11 16:24:27 +00:00
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const std::shared_ptr<SHAPE>& refShape = outlineItem->GetEffectiveShape();
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2020-07-27 13:33:06 +00:00
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2020-09-11 16:24:27 +00:00
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for( BOARD_ITEM* boardItem : boardItems )
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2020-07-27 13:33:06 +00:00
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{
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2020-10-06 12:20:29 +00:00
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if( m_drcEngine->IsErrorLimitExceeded( DRCE_COPPER_EDGE_CLEARANCE ) )
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2020-09-12 19:28:22 +00:00
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break;
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2020-09-11 15:04:11 +00:00
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drc_dbg( 10, "RefT %d %p %s %d\n", outlineItem->Type(), outlineItem,
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outlineItem->GetClass(), outlineItem->GetLayer() );
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drc_dbg( 10, "BoardT %d %p %s %d\n", boardItem->Type(), boardItem,
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boardItem->GetClass(), boardItem->GetLayer() );
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2020-08-25 17:42:52 +00:00
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2020-10-06 12:20:29 +00:00
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if ( isInvisibleText( boardItem ) )
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continue;
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2020-09-11 16:24:27 +00:00
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const std::shared_ptr<SHAPE>& shape = boardItem->GetEffectiveShape();
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2020-07-27 13:33:06 +00:00
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2020-09-11 16:24:27 +00:00
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auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE,
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outlineItem, boardItem );
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2020-09-28 22:27:33 +00:00
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int minClearance = constraint.GetValue().Min();
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int actual;
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VECTOR2I pos;
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2020-08-11 22:15:50 +00:00
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2020-09-07 12:31:19 +00:00
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accountCheck( constraint );
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2020-09-28 22:27:33 +00:00
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if( refShape->Collide( shape.get(), minClearance, &actual, &pos ) )
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2020-08-11 22:15:50 +00:00
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{
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std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_COPPER_EDGE_CLEARANCE );
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2020-09-11 16:24:27 +00:00
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m_msg.Printf( drcItem->GetErrorText() + _( " (%s clearance %s; actual %s)" ),
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constraint.GetName(),
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2020-10-02 20:51:24 +00:00
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MessageTextFromValue( userUnits(), minClearance ),
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MessageTextFromValue( userUnits(), actual ) );
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2020-08-11 22:15:50 +00:00
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2020-09-11 16:24:27 +00:00
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drcItem->SetErrorMessage( m_msg );
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2020-08-11 22:15:50 +00:00
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drcItem->SetItems( outlineItem, boardItem );
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2020-08-11 22:17:43 +00:00
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drcItem->SetViolatingRule( constraint.GetParentRule() );
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2020-08-11 22:15:50 +00:00
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2020-09-28 22:27:33 +00:00
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reportViolation( drcItem, (wxPoint) pos );
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2020-08-11 22:15:50 +00:00
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}
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2020-07-27 13:33:06 +00:00
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}
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}
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2020-10-06 12:20:29 +00:00
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if( !reportPhase( _( "Checking silkscreen to board edge clearances..." ) ) )
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return false;
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boardItems.clear();
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forEachGeometryItem( {}, LSET( 2, F_SilkS, B_SilkS ), queryBoardGeometryItems );
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for( PCB_SHAPE* outlineItem : boardOutline )
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{
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if( m_drcEngine->IsErrorLimitExceeded( DRCE_SILK_MASK_CLEARANCE ) )
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break;
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const std::shared_ptr<SHAPE>& refShape = outlineItem->GetEffectiveShape();
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for( BOARD_ITEM* boardItem : boardItems )
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{
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if( m_drcEngine->IsErrorLimitExceeded( DRCE_SILK_MASK_CLEARANCE ) )
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break;
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drc_dbg( 10, "RefT %d %p %s %d\n", outlineItem->Type(), outlineItem,
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outlineItem->GetClass(), outlineItem->GetLayer() );
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drc_dbg( 10, "BoardT %d %p %s %d\n", boardItem->Type(), boardItem,
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boardItem->GetClass(), boardItem->GetLayer() );
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const std::shared_ptr<SHAPE>& shape = boardItem->GetEffectiveShape();
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auto constraint = m_drcEngine->EvalRulesForItems( DRC_CONSTRAINT_TYPE_SILK_TO_MASK,
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outlineItem, boardItem );
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int minClearance = constraint.GetValue().Min();
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int actual;
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VECTOR2I pos;
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accountCheck( constraint );
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if( refShape->Collide( shape.get(), minClearance, &actual, &pos ) )
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{
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std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_SILK_MASK_CLEARANCE );
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if( minClearance > 0 )
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{
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m_msg.Printf( drcItem->GetErrorText() + _( " (%s clearance %s; actual %s)" ),
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constraint.GetName(),
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MessageTextFromValue( userUnits(), minClearance ),
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MessageTextFromValue( userUnits(), actual ) );
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drcItem->SetErrorMessage( m_msg );
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}
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drcItem->SetItems( outlineItem, boardItem );
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drcItem->SetViolatingRule( constraint.GetParentRule() );
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reportViolation( drcItem, (wxPoint) pos );
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}
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}
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}
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2020-08-25 17:42:52 +00:00
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reportRuleStatistics();
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2020-07-27 13:33:06 +00:00
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return true;
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}
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2020-09-14 17:54:14 +00:00
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int DRC_TEST_PROVIDER_EDGE_CLEARANCE::GetNumPhases() const
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{
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return 1;
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}
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2020-09-13 10:37:20 +00:00
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std::set<DRC_CONSTRAINT_TYPE_T> DRC_TEST_PROVIDER_EDGE_CLEARANCE::GetConstraintTypes() const
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2020-07-27 13:33:06 +00:00
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{
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2020-08-11 22:17:43 +00:00
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return { DRC_CONSTRAINT_TYPE_T::DRC_CONSTRAINT_TYPE_EDGE_CLEARANCE };
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2020-07-27 13:33:06 +00:00
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}
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namespace detail
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{
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2020-09-11 16:24:27 +00:00
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static DRC_REGISTER_TEST_PROVIDER<DRC_TEST_PROVIDER_EDGE_CLEARANCE> dummy;
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2020-10-02 20:51:24 +00:00
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}
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