2009-10-28 11:48:47 +00:00
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/***************************************************************************/
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/* class_board_design_settings.cpp - EDA_BoardDesignSettings class functions */
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/***************************************************************************/
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#include "fctsys.h"
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#include "common.h"
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#include "pcbnew.h"
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#include "class_board_design_settings.h"
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/*****************************************************/
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EDA_BoardDesignSettings::EDA_BoardDesignSettings()
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/*****************************************************/
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// Default values for designing boards
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{
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int ii;
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static const int default_layer_color[32] =
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{
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GREEN, LIGHTGRAY, LIGHTGRAY, LIGHTGRAY,
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LIGHTGRAY, LIGHTGRAY, LIGHTGRAY, LIGHTGRAY,
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LIGHTGRAY, LIGHTGRAY, LIGHTGRAY, LIGHTGRAY,
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LIGHTGRAY, LIGHTGRAY, LIGHTGRAY, RED,
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LIGHTGRAY, LIGHTGRAY,
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LIGHTGRAY, LIGHTGRAY,
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MAGENTA, CYAN,
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LIGHTGRAY, LIGHTGRAY,
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LIGHTGRAY,
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LIGHTGRAY,
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LIGHTGRAY, LIGHTGRAY,
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LIGHTGRAY,
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LIGHTGRAY,
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LIGHTGRAY,
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LIGHTGRAY
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};
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2009-11-04 19:08:08 +00:00
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m_EnabledLayers = ALL_LAYERS; // All layers enabled at first.
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2009-12-07 06:16:11 +00:00
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// SetCopperLayerCount() will adjust this.
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m_VisibleLayers = 0xffffffff; // All layers visible at first.
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m_VisibleElements = 0x00000fff; // All elements visible at first. TODO: Use a macro for the initial value.
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2009-11-04 19:08:08 +00:00
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SetCopperLayerCount( 2 ); // Default design is a double sided board
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2009-12-07 06:16:11 +00:00
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2009-11-04 19:08:08 +00:00
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m_CurrentViaType = VIA_THROUGH; // via type (VIA_BLIND_BURIED, VIA_THROUGH VIA_MICROVIA)
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m_UseConnectedTrackWidth = false; // if true, when creating a new track starting on an existing track, use this track width
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m_MicroViasAllowed = false; // true to allow micro vias
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m_DrawSegmentWidth = 100; // current graphic line width (not EDGE layer)
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m_EdgeSegmentWidth = 100; // current graphic line width (EDGE layer only)
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m_PcbTextWidth = 100; // current Pcb (not module) Text width
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m_PcbTextSize = wxSize( 500, 500 ); // current Pcb (not module) Text size
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m_TrackMinWidth = 80; // track min value for width ((min copper size value
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m_ViasMinSize = 350; // vias (not micro vias) min diameter
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m_ViasMinDrill = 200; // vias (not micro vias) min drill diameter
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m_MicroViasMinSize = 200; // micro vias (not vias) min diameter
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m_MicroViasMinDrill = 50; // micro vias (not vias) min drill diameter
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2009-12-07 06:16:11 +00:00
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2009-11-04 19:08:08 +00:00
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// Global mask margins:
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m_SolderMaskMargin = 150; // Solder mask margin
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m_SolderPasteMargin = 0; // Solder paste margin absolute value
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m_SolderPasteMarginRatio = 0.0; // Solder pask margin ratio value of pad size
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// The final margin is the sum of these 2 values
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// Usually < 0 because the mask is smaller than pad
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2009-10-28 11:48:47 +00:00
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/* Color options for screen display of the Printed Board: */
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for( ii = 0; ii < 32; ii++ )
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m_LayerColor[ii] = default_layer_color[ii];
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// Layer colors (tracks and graphic items)
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2009-11-04 19:08:08 +00:00
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m_ViaColor[VIA_NOT_DEFINED] = DARKGRAY;
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m_ViaColor[VIA_MICROVIA] = CYAN;
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m_ViaColor[VIA_BLIND_BURIED] = BROWN;
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m_ViaColor[VIA_THROUGH] = WHITE;
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2009-10-28 11:48:47 +00:00
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m_RatsnestColor = WHITE; // Ratsnest color
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}
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// see pcbstruct.h
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int EDA_BoardDesignSettings::GetVisibleLayers() const
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{
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return m_VisibleLayers;
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}
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2009-11-04 19:08:08 +00:00
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2009-10-28 11:48:47 +00:00
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void EDA_BoardDesignSettings::SetVisibleLayers( int aMask )
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{
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2009-11-09 15:55:18 +00:00
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// Altough Pcbnew uses only 29, Gerbview uses all 32 layers
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m_VisibleLayers = aMask & m_EnabledLayers & FULL_LAYERS;
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2009-10-28 11:48:47 +00:00
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}
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2009-11-04 19:08:08 +00:00
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2009-10-28 11:48:47 +00:00
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void EDA_BoardDesignSettings::SetLayerVisibility( int aLayerIndex, bool aNewState )
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{
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// Altough Pcbnew uses only 29, Gerbview uses all 32 layers
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if( aLayerIndex < 0 || aLayerIndex >= 32 )
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return;
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2009-11-04 19:08:08 +00:00
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if( aNewState && IsLayerEnabled( aLayerIndex ) )
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2009-10-28 11:48:47 +00:00
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m_VisibleLayers |= 1 << aLayerIndex;
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else
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m_VisibleLayers &= ~( 1 << aLayerIndex );
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}
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2009-11-04 19:08:08 +00:00
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2009-10-28 11:48:47 +00:00
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void EDA_BoardDesignSettings::SetElementVisibility( int aElementCategory, bool aNewState )
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{
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if( aElementCategory < 0 || aElementCategory > PAD_CMP_VISIBLE )
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return;
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if( aNewState )
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m_VisibleElements |= 1 << aElementCategory;
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else
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m_VisibleElements &= ~( 1 << aElementCategory );
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}
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2009-11-04 19:08:08 +00:00
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2009-10-28 11:48:47 +00:00
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void EDA_BoardDesignSettings::SetCopperLayerCount( int aNewLayerCount )
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{
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m_CopperLayerCount = aNewLayerCount;
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2009-11-04 19:08:08 +00:00
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2009-10-28 11:48:47 +00:00
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// ensure consistency with the m_EnabledLayers member
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m_EnabledLayers &= ~ALL_CU_LAYERS;
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2009-12-21 12:05:36 +00:00
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m_EnabledLayers |= LAYER_BACK;
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2009-12-07 03:46:13 +00:00
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2009-11-04 19:08:08 +00:00
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if( m_CopperLayerCount > 1 )
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2009-12-21 12:05:36 +00:00
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m_EnabledLayers |= LAYER_FRONT;
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2009-12-07 03:46:13 +00:00
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2009-11-04 19:08:08 +00:00
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for( int ii = 1; ii < aNewLayerCount - 1; ii++ )
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2009-10-28 11:48:47 +00:00
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m_EnabledLayers |= 1 << ii;
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}
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2009-12-07 03:46:13 +00:00
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2009-12-21 12:05:36 +00:00
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/**
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* Function SetEnabledLayers
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* changes the bit-mask of enabled layers
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* @param aMask = The new bit-mask of enabled layers
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*/
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void EDA_BoardDesignSettings::SetEnabledLayers( int aMask )
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{
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m_EnabledLayers = aMask;
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// Ensure consistency with m_CopperLayerCount
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long enabledLayers = aMask & ~ALL_CU_LAYERS;
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// Back and front layers are always existing (but not necessary enabled)
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// so we must count them
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enabledLayers |= LAYER_BACK|LAYER_FRONT;
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long mask = 1;
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m_CopperLayerCount = 0;
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for( int ii = 0; ii < NB_COPPER_LAYERS; ii++, mask <<= 1 )
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{
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if( (aMask & mask) )
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m_CopperLayerCount ++;
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}
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// A disabled layer cannot be visible
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m_VisibleLayers &= aMask;
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}
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