2020-08-25 17:42:52 +00:00
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/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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2022-03-09 00:47:37 +00:00
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* Copyright (C) 2004-2022 KiCad Developers.
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2020-08-25 17:42:52 +00:00
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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2022-03-11 22:02:43 +00:00
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#include <atomic>
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2020-08-25 17:42:52 +00:00
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#include <common.h>
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2022-03-11 20:13:47 +00:00
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#include <board_design_settings.h>
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#include <drc/drc_rtree.h>
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2020-09-11 15:04:11 +00:00
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#include <drc/drc_engine.h>
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#include <drc/drc_item.h>
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#include <drc/drc_rule.h>
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#include <drc/drc_test_provider.h>
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2021-06-06 19:03:10 +00:00
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#include <pad.h>
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2022-06-15 00:41:10 +00:00
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#include <progress_reporter.h>
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#include <thread_pool.h>
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2021-06-03 18:05:43 +00:00
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#include <zone.h>
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2020-08-25 17:42:52 +00:00
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2022-03-11 20:13:47 +00:00
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2020-08-25 17:42:52 +00:00
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/*
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"Disallow" test. Goes through all items, matching types/conditions drop errors.
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Errors generated:
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- DRCE_ALLOWED_ITEMS
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2021-05-24 18:53:19 +00:00
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- DRCE_TEXT_ON_EDGECUTS
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2020-08-25 17:42:52 +00:00
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*/
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class DRC_TEST_PROVIDER_DISALLOW : public DRC_TEST_PROVIDER
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{
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public:
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DRC_TEST_PROVIDER_DISALLOW()
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{
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}
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virtual ~DRC_TEST_PROVIDER_DISALLOW()
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{
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}
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virtual bool Run() override;
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virtual const wxString GetName() const override
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{
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2022-03-11 21:16:52 +00:00
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return wxT( "disallow" );
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2020-08-25 17:42:52 +00:00
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};
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virtual const wxString GetDescription() const override
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{
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2022-03-11 21:16:52 +00:00
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return wxT( "Tests for disallowed items (e.g. keepouts)" );
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2020-08-25 17:42:52 +00:00
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}
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};
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2020-09-11 21:50:53 +00:00
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bool DRC_TEST_PROVIDER_DISALLOW::Run()
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2020-08-25 17:42:52 +00:00
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{
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2020-09-18 19:57:54 +00:00
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if( !reportPhase( _( "Checking keepouts & disallow constraints..." ) ) )
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2021-02-27 13:43:41 +00:00
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return false; // DRC cancelled
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2020-08-25 17:42:52 +00:00
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2022-03-11 20:13:47 +00:00
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BOARD* board = m_drcEngine->GetBoard();
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int epsilon = board->GetDesignSettings().GetDRCEpsilon();
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// First build out the board's cache of copper-keepout to copper-zone caches. This is where
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// the bulk of the time is spent, and we can do this in parallel.
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//
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std::vector<ZONE*> antiCopperKeepouts;
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std::vector<ZONE*> copperZones;
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std::vector<std::pair<ZONE*, ZONE*>> toCache;
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int totalCount = 0;
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forEachGeometryItem( {}, LSET::AllLayersMask(),
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[&]( BOARD_ITEM* item ) -> bool
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{
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ZONE* zone = dynamic_cast<ZONE*>( item );
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if( zone && zone->GetIsRuleArea() && zone->GetDoNotAllowCopperPour() )
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antiCopperKeepouts.push_back( zone );
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else if( zone && zone->IsOnCopperLayer() )
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copperZones.push_back( zone );
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totalCount++;
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return true;
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} );
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for( ZONE* ruleArea : antiCopperKeepouts )
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{
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for( ZONE* copperZone : copperZones )
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{
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toCache.push_back( { ruleArea, copperZone } );
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totalCount++;
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}
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}
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2022-06-15 00:41:10 +00:00
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PROGRESS_REPORTER* reporter = m_drcEngine->GetProgressReporter();
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2022-03-11 20:13:47 +00:00
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2022-06-15 00:41:10 +00:00
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auto query_areas = [&]( std::pair<ZONE*, ZONE*> aCache ) -> size_t
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{
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if( m_drcEngine->IsCancelled() )
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return 0;
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2022-03-11 20:13:47 +00:00
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2022-06-15 00:41:10 +00:00
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ZONE* ruleArea = aCache.first;
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ZONE* copperZone = aCache.second;
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EDA_RECT areaBBox = ruleArea->GetCachedBoundingBox();
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EDA_RECT copperBBox = copperZone->GetCachedBoundingBox();
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bool isInside = false;
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2022-03-11 20:13:47 +00:00
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2022-06-15 00:41:10 +00:00
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if( copperZone->IsFilled() && areaBBox.Intersects( copperBBox ) )
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{
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// Collisions include touching, so we need to deflate outline by
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// enough to exclude it. This is particularly important for detecting
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// copper fills as they will be exactly touching along the entire
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// exclusion border.
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SHAPE_POLY_SET areaPoly = ruleArea->Outline()->CloneDropTriangulation();
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areaPoly.Deflate( epsilon, 0, SHAPE_POLY_SET::ALLOW_ACUTE_CORNERS );
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2022-03-11 20:13:47 +00:00
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2022-06-15 00:41:10 +00:00
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DRC_RTREE* zoneRTree = board->m_CopperZoneRTreeCache[ copperZone ].get();
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if( zoneRTree )
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{
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for( PCB_LAYER_ID layer : ruleArea->GetLayerSet().Seq() )
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{
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if( zoneRTree->QueryColliding( areaBBox, &areaPoly, layer ) )
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2022-03-11 20:13:47 +00:00
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{
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2022-06-15 00:41:10 +00:00
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isInside = true;
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return 0;
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2022-03-11 20:13:47 +00:00
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}
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2022-06-15 00:41:10 +00:00
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if( m_drcEngine->IsCancelled() )
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return 0;
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2022-03-11 20:13:47 +00:00
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}
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2022-06-15 00:41:10 +00:00
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}
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}
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2022-03-11 20:13:47 +00:00
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2022-06-15 00:41:10 +00:00
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if( m_drcEngine->IsCancelled() )
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return 0;
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2022-03-11 20:13:47 +00:00
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2022-06-15 00:41:10 +00:00
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std::tuple<BOARD_ITEM*, BOARD_ITEM*, PCB_LAYER_ID> key( ruleArea,
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copperZone,
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UNDEFINED_LAYER );
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2022-06-14 23:10:01 +00:00
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2022-06-15 00:41:10 +00:00
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{
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std::unique_lock<std::mutex> cacheLock( board->m_CachesMutex );
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board->m_InsideAreaCache[ key ] = isInside;
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}
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2022-06-14 23:10:01 +00:00
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2022-06-15 00:41:10 +00:00
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m_drcEngine->AdvanceProgress();
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2022-03-11 20:13:47 +00:00
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2022-06-15 00:41:10 +00:00
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return 1;
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};
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2022-03-11 20:13:47 +00:00
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2022-06-15 00:41:10 +00:00
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thread_pool& tp = GetKiCadThreadPool();
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std::vector<std::future<size_t>> returns;
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2022-03-11 20:13:47 +00:00
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2022-06-15 00:41:10 +00:00
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returns.reserve( toCache.size() );
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for( auto& cache : toCache )
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returns.emplace_back( tp.submit( query_areas, cache ) );
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for( auto& retval : returns )
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2022-03-11 20:13:47 +00:00
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{
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2022-06-15 00:41:10 +00:00
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std::future_status status;
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do
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{
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if( reporter )
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reporter->KeepRefreshing();
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status = retval.wait_for( std::chrono::milliseconds( 100 ) );
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} while( status != std::future_status::ready );
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2022-03-11 20:13:47 +00:00
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}
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if( m_drcEngine->IsCancelled() )
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return false;
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2022-06-15 00:41:10 +00:00
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// Now go through all the board objects calling the DRC_ENGINE to run the actual disallow
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2022-03-11 20:13:47 +00:00
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// tests. These should be reasonably quick using the caches generated above.
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//
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int delta = 100;
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2022-06-15 00:41:10 +00:00
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int ii = static_cast<int>( toCache.size() );
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2021-06-02 13:00:11 +00:00
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2022-03-09 00:47:37 +00:00
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auto checkTextOnEdgeCuts =
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[&]( BOARD_ITEM* item )
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{
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if( item->Type() == PCB_TEXT_T || item->Type() == PCB_TEXTBOX_T
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|| BaseType( item->Type() ) == PCB_DIMENSION_T )
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{
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if( item->GetLayer() == Edge_Cuts )
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{
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std::shared_ptr<DRC_ITEM> drc = DRC_ITEM::Create( DRCE_TEXT_ON_EDGECUTS );
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drc->SetItems( item );
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reportViolation( drc, item->GetPosition(), Edge_Cuts );
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}
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}
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};
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auto checkDisallow =
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2020-10-21 23:59:40 +00:00
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[&]( BOARD_ITEM* item )
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{
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2022-03-21 18:18:39 +00:00
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DRC_CONSTRAINT constraint = m_drcEngine->EvalRules( DISALLOW_CONSTRAINT, item,
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nullptr, UNDEFINED_LAYER );
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2020-12-04 19:29:04 +00:00
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2021-09-05 15:06:12 +00:00
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if( constraint.m_DisallowFlags && constraint.GetSeverity() != RPT_SEVERITY_IGNORE )
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2020-10-21 23:59:40 +00:00
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{
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std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_ALLOWED_ITEMS );
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2022-06-15 23:42:34 +00:00
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wxString msg;
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2020-10-21 23:59:40 +00:00
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2022-06-15 23:42:34 +00:00
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msg.Printf( drcItem->GetErrorText() + wxS( " (%s)" ), constraint.GetName() );
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2020-10-21 23:59:40 +00:00
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2022-06-15 23:42:34 +00:00
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drcItem->SetErrorMessage( msg );
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2020-10-21 23:59:40 +00:00
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drcItem->SetItems( item );
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drcItem->SetViolatingRule( constraint.GetParentRule() );
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2022-03-21 18:18:39 +00:00
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PCB_LAYER_ID layer = UNDEFINED_LAYER;
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if( item->GetLayerSet().count() )
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layer = item->GetLayerSet().Seq().front();
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reportViolation( drcItem, item->GetPosition(), layer );
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2020-10-21 23:59:40 +00:00
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}
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};
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2022-03-09 00:47:37 +00:00
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forEachGeometryItem( {}, LSET::AllLayersMask(),
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[&]( BOARD_ITEM* item ) -> bool
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{
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if( !m_drcEngine->IsErrorLimitExceeded( DRCE_TEXT_ON_EDGECUTS ) )
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checkTextOnEdgeCuts( item );
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if( !m_drcEngine->IsErrorLimitExceeded( DRCE_ALLOWED_ITEMS ) )
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2021-03-07 17:54:49 +00:00
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{
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2022-03-09 00:47:37 +00:00
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ZONE* zone = dynamic_cast<ZONE*>( item );
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PAD* pad = dynamic_cast<PAD*>( item );
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2021-03-07 17:54:49 +00:00
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2022-03-09 00:47:37 +00:00
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if( zone && zone->GetIsRuleArea() )
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2021-03-07 17:54:49 +00:00
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return true;
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2021-06-02 13:00:11 +00:00
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2022-03-09 00:47:37 +00:00
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item->ClearFlags( HOLE_PROXY ); // Just in case
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2020-10-21 23:59:40 +00:00
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2022-03-09 00:47:37 +00:00
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checkDisallow( item );
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2021-02-17 10:19:59 +00:00
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2022-03-09 00:47:37 +00:00
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bool hasHole;
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2021-02-17 10:19:59 +00:00
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2022-03-09 00:47:37 +00:00
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switch( item->Type() )
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{
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2022-03-25 20:49:29 +00:00
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case PCB_VIA_T: hasHole = true; break;
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case PCB_PAD_T: hasHole = pad && pad->GetDrillSizeX() > 0; break;
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default: hasHole = false; break;
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2022-03-09 00:47:37 +00:00
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}
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if( hasHole )
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{
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item->SetFlags( HOLE_PROXY );
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{
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checkDisallow( item );
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}
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2022-03-25 19:51:05 +00:00
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2022-03-09 00:47:37 +00:00
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item->ClearFlags( HOLE_PROXY );
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}
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2020-10-21 23:59:40 +00:00
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}
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2022-03-11 20:13:47 +00:00
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if( !reportProgress( ii++, totalCount, delta ) )
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return false;
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2020-10-21 23:59:40 +00:00
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return true;
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2022-03-09 00:47:37 +00:00
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} );
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2020-08-25 17:42:52 +00:00
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reportRuleStatistics();
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2022-03-11 20:13:47 +00:00
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return !m_drcEngine->IsCancelled();
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2020-08-25 17:42:52 +00:00
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}
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namespace detail
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{
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2020-09-11 21:50:53 +00:00
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static DRC_REGISTER_TEST_PROVIDER<DRC_TEST_PROVIDER_DISALLOW> dummy;
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2020-09-07 12:31:19 +00:00
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}
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