haskal
/
kicad
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
kicad/demos/pic_programmer/pic_programmer.pro

40 lines
675 B
Prolog
Raw Normal View History

Update demos. Fix pspice netlist issues when using ( and ) in net names ( parenthesis are replaced by underscore) .
2014-01-07 19:42:34 +00:00
update=05/01/2014 10:29:06
last_client=kicad
1) Add "rules" to base of tree for copying into BZR_HOME/rules. File "rules" has instructional text as comments near top. 2) Convert all text files in repo to LF line ending form. Any checkout done with "rules" in play will convert the working tree to native line ending, while keeping repo as LF line ending.
2013-05-26 04:36:44 +00:00
[common]
NetDir=
Update demos. Fix pspice netlist issues when using ( and ) in net names ( parenthesis are replaced by underscore) .
2014-01-07 19:42:34 +00:00
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
1) Add "rules" to base of tree for copying into BZR_HOME/rules. File "rules" has instructional text as comments near top. 2) Convert all text files in repo to LF line ending form. Any checkout done with "rules" in play will convert the working tree to native line ending, while keeping repo as LF line ending.
2013-05-26 04:36:44 +00:00
[pcbnew]
version=1
Update demos. Fix pspice netlist issues when using ( and ) in net names ( parenthesis are replaced by underscore) .
2014-01-07 19:42:34 +00:00
PageLayoutDescrFile=
LastNetListRead=
UseCmpFile=1
PadDrill=0.8128
PadDrillOvalY=0.8128
PadSizeH=1.5748
PadSizeV=2.794
PcbTextSizeV=1.5
PcbTextSizeH=1.5
PcbTextThickness=0.3048
ModuleTextSizeV=1
ModuleTextSizeH=1
ModuleTextSizeThickness=0.2
SolderMaskClearance=0.09999999999999999
SolderMaskMinWidth=0
DrawSegmentWidth=0.4
BoardOutlineThickness=0.2
ModuleOutlineThickness=0.2
1) Add "rules" to base of tree for copying into BZR_HOME/rules. File "rules" has instructional text as comments near top. 2) Convert all text files in repo to LF line ending form. Any checkout done with "rules" in play will convert the working tree to native line ending, while keeping repo as LF line ending.
2013-05-26 04:36:44 +00:00
[pcbnew/libraries]
Update demos. Fix pspice netlist issues when using ( and ) in net names ( parenthesis are replaced by underscore) .
2014-01-07 19:42:34 +00:00
LibDir=
1) Add "rules" to base of tree for copying into BZR_HOME/rules. File "rules" has instructional text as comments near top. 2) Convert all text files in repo to LF line ending form. Any checkout done with "rules" in play will convert the working tree to native line ending, while keeping repo as LF line ending.
2013-05-26 04:36:44 +00:00
LibName1=dip_sockets
LibName2=sockets
LibName3=connect
LibName4=discret
LibName5=pin_array
LibName6=divers
Update demos. Fix pspice netlist issues when using ( and ) in net names ( parenthesis are replaced by underscore) .
2014-01-07 19:42:34 +00:00
[general]
1) Add "rules" to base of tree for copying into BZR_HOME/rules. File "rules" has instructional text as comments near top. 2) Convert all text files in repo to LF line ending form. Any checkout done with "rules" in play will convert the working tree to native line ending, while keeping repo as LF line ending.
2013-05-26 04:36:44 +00:00
version=1