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When routing, check for board-level clearances 

If the board-level clearance exceeds the max pad/track clearance, we end
up missing collisions in the router.

Fixes https://gitlab.com/kicad/code/kicad/-/issues/15162
This commit is contained in:
Seth Hillbrand 2023-07-24 15:18:18 -07:00
parent dadcc70a3d
commit 000998ccae
1 changed files with 4 additions and 1 deletions
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5
pcbnew/board_design_settings.cpp
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@ -1050,9 +1050,12 @@ bool BOARD_DESIGN_SETTINGS::Ignore( int aDRCErrorCode )
int BOARD_DESIGN_SETTINGS::GetBiggestClearanceValue() const
{
int biggest = 0;
int biggest = std::max( m_MinClearance, m_HoleClearance );
DRC_CONSTRAINT constraint;
biggest = std::max( biggest, m_HoleToHoleMin );
biggest = std::max( biggest, m_CopperEdgeClearance );
if( m_DRCEngine )
{
m_DRCEngine->QueryWorstConstraint( CLEARANCE_CONSTRAINT, constraint );