Fix unintialized values (from coverity scan)

common/painter.cpp

@@ -35,6 +35,7 @@ RENDER_SETTINGS::RENDER_SETTINGS()
     m_highlightFactor    = 0.5f;
     m_selectFactor       = 0.5f;
     m_layerOpacity       = 0.8f;
+    m_highlightItems     = false;
     m_highlightEnabled   = false;
     m_hiContrastEnabled  = false;
     m_hiContrastFactor   = 0.2f; //TODO: Make this user-configurable

eeschema/connection_graph.h

@@ -205,7 +205,10 @@ public:
 class CONNECTION_GRAPH
 {
 public:
-    CONNECTION_GRAPH( SCH_EDIT_FRAME* aFrame) :
+    CONNECTION_GRAPH( SCH_EDIT_FRAME* aFrame )
+            : m_last_net_code( 1 ),
+              m_last_bus_code( 1 ),
+              m_last_subgraph_code( 1 ),
               m_frame( aFrame )
     {}
 

eeschema/dialogs/dialog_migrate_buses.cpp

@@ -53,9 +53,8 @@
  */
 
 
-DIALOG_MIGRATE_BUSES::DIALOG_MIGRATE_BUSES( SCH_EDIT_FRAME* aParent ) :
+DIALOG_MIGRATE_BUSES::DIALOG_MIGRATE_BUSES( SCH_EDIT_FRAME* aParent )
-    DIALOG_MIGRATE_BUSES_BASE( aParent ),
+        : DIALOG_MIGRATE_BUSES_BASE( aParent ), m_frame( aParent ), m_selected_index( 0 )
-    m_frame( aParent )
 {
     m_migration_list->Bind( wxEVT_LIST_ITEM_SELECTED,
                             &DIALOG_MIGRATE_BUSES::onItemSelected, this );

eeschema/sch_component.cpp

@@ -176,6 +176,7 @@ SCH_COMPONENT::SCH_COMPONENT( const SCH_COMPONENT& aComponent ) :
     m_unit        = aComponent.m_unit;
     m_convert     = aComponent.m_convert;
     m_lib_id      = aComponent.m_lib_id;
+    m_isInNetlist = aComponent.m_isInNetlist;
 
     if( aComponent.m_part )
         m_part.reset( new LIB_PART( *aComponent.m_part.get() ) );

eeschema/sim/sim_plot_panel.cpp

@@ -363,8 +363,13 @@ void CURSOR::UpdateReference()
 
 SIM_PLOT_PANEL::SIM_PLOT_PANEL( SIM_TYPE aType, wxWindow* parent, wxWindowID id, const wxPoint& pos,
         const wxSize& size, long style, const wxString& name )
-    : mpWindow( parent, id, pos, size, style ), m_colorIdx( 0 ),
+        : mpWindow( parent, id, pos, size, style ),
-        m_axis_x( nullptr ), m_axis_y1( nullptr ), m_axis_y2( nullptr ), m_type( aType )
+          m_colorIdx( 0 ),
+          m_axis_x( nullptr ),
+          m_axis_y1( nullptr ),
+          m_axis_y2( nullptr ),
+          m_dotted_cp( false ),
+          m_type( aType )
 {
     LimitView( true );
     SetMargins( 50, 80, 50, 80 );

pcbnew/autorouter/ar_matrix.cpp

@@ -39,9 +39,12 @@
 
 AR_MATRIX::AR_MATRIX()
 {
-    m_BoardSide[0] = m_BoardSide[1] = nullptr;
+    m_BoardSide[0]       = nullptr;
-    m_DistSide[0] = m_DistSide[1] = nullptr;
+    m_BoardSide[1]       = nullptr;
-    m_DirSide[0] = m_DirSide[1] = nullptr;
+    m_DistSide[0]        = nullptr;
+    m_DistSide[1]        = nullptr;
+    m_DirSide[0]         = nullptr;
+    m_DirSide[1]         = nullptr;
     m_opWriteCell        = nullptr;
     m_InitMatrixDone     = false;
     m_Nrows              = 0;
@@ -50,6 +53,8 @@ AR_MATRIX::AR_MATRIX()
     m_RoutingLayersCount = 1;
     m_GridRouting        = 0;
     m_RouteCount         = 0;
+    m_routeLayerBottom   = B_Cu;
+    m_routeLayerTop      = F_Cu;
 }
 
 

pcbnew/board_design_settings.cpp

@@ -517,6 +517,10 @@ BOARD_DESIGN_SETTINGS::BOARD_DESIGN_SETTINGS() :
     m_trackWidthIndex = 0;
     m_diffPairIndex = 0;
 
+    // Courtyard defaults
+    m_RequireCourtyards             = false;
+    m_ProhibitOverlappingCourtyards = true;
+
     // Default ref text on fp creation. If empty, use footprint name as default
     m_RefDefaultText = wxT( "REF**" );
     m_RefDefaultVisibility = true;

pcbnew/board_stackup_manager/class_board_stackup.cpp

@@ -321,6 +321,7 @@ BOARD_STACKUP::BOARD_STACKUP()
 BOARD_STACKUP::BOARD_STACKUP( BOARD_STACKUP& aOther )
 {
     m_HasDielectricConstrains  = aOther.m_HasDielectricConstrains;
+    m_HasThicknessConstrains   = aOther.m_HasThicknessConstrains;
     m_EdgeConnectorConstraints = aOther.m_EdgeConnectorConstraints;
     m_CastellatedPads          = aOther.m_CastellatedPads;
     m_EdgePlating              = aOther.m_EdgePlating;
@@ -339,6 +340,7 @@ BOARD_STACKUP::BOARD_STACKUP( BOARD_STACKUP& aOther )
 BOARD_STACKUP& BOARD_STACKUP::operator=( const BOARD_STACKUP& aOther )
 {
     m_HasDielectricConstrains  = aOther.m_HasDielectricConstrains;
+    m_HasThicknessConstrains   = aOther.m_HasThicknessConstrains;
     m_EdgeConnectorConstraints = aOther.m_EdgeConnectorConstraints;
     m_CastellatedPads          = aOther.m_CastellatedPads;
     m_EdgePlating              = aOther.m_EdgePlating;

pcbnew/exporters/export_footprints_placefile.cpp

@@ -77,6 +77,7 @@ PLACE_FILE_EXPORTER::PLACE_FILE_EXPORTER( BOARD* aBoard, bool aUnitsMM,
     m_board         = aBoard;
     m_unitsMM       = aUnitsMM;
     m_forceSmdItems = aForceSmdItems;
+    m_fpCount       = 0;
 
     if( aTopSide && aBottomSide )
         m_side = PCB_BOTH_SIDES;

pcbnew/exporters/export_hyperlynx.cpp

@@ -148,7 +148,10 @@ private:
 class HYPERLYNX_EXPORTER : public BOARD_EXPORTER_BASE
 {
 public:
-    HYPERLYNX_EXPORTER(){};
+    HYPERLYNX_EXPORTER() : m_polyId( 1 )
+    {
+    }
+
     ~HYPERLYNX_EXPORTER(){};
 
     virtual bool Run() override;
@@ -239,18 +242,21 @@ HYPERLYNX_PAD_STACK::HYPERLYNX_PAD_STACK( BOARD* aBoard, const D_PAD* aPad )
     m_drill  = aPad->GetDrillSize().x;
     m_shape  = aPad->GetShape();
     m_type   = PAD_ATTRIB_STANDARD;
+    m_id     = 0;
 }
 
 
 HYPERLYNX_PAD_STACK::HYPERLYNX_PAD_STACK( BOARD* aBoard, const VIA* aVia )
 {
     m_board  = aBoard;
-    m_sx = m_sy = aVia->GetWidth();
+    m_sx     = aVia->GetWidth();
+    m_sy     = aVia->GetWidth();
     m_angle  = 0;
     m_layers = LSET::AllCuMask();
     m_drill  = aVia->GetDrillValue();
     m_shape  = PAD_SHAPE_CIRCLE;
     m_type   = PAD_ATTRIB_STANDARD;
+    m_id     = 0;
 }
 
 

pcbnew/exporters/gerber_placefile_writer.cpp

@@ -53,6 +53,7 @@ PLACEFILE_GERBER_WRITER::PLACEFILE_GERBER_WRITER( BOARD* aPcb )
     m_forceSmdItems       = false;
     m_plotPad1Marker      = true; // Place a marker to pin 1 (or A1) position
     m_plotOtherPadsMarker = true; // Place a marker to other pins position
+    m_layer               = PCB_LAYER_ID::UNDEFINED_LAYER; // No layer set
 }
 
 

pcbnew/router/pns_dp_meander_placer.cpp

@@ -39,6 +39,9 @@ DP_MEANDER_PLACER::DP_MEANDER_PLACER( ROUTER* aRouter ) :
     m_world       = NULL;
     m_currentNode = NULL;
 
+    m_padToDieP = 0;
+    m_padToDieN = 0;
+
     // Init temporary variables (do not leave uninitialized members)
     m_initialSegment = NULL;
     m_lastLength     = 0;