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fix LSET() constructors, formatting

This commit is contained in:
Dick Hollenbeck 2014-06-29 15:33:29 -05:00
parent add4d5eb6f
commit 06bf0821b9
11 changed files with 208 additions and 155 deletions
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6
common/lset.cpp
View File

@ -30,14 +30,16 @@
#include <class_board.h>
LSET::LSET( const LAYER_ID* aArray, unsigned aCount )
LSET::LSET( const LAYER_ID* aArray, unsigned aCount ) :
BASE_SET()
{
for( unsigned i=0; i<aCount; ++i )
set( aArray[i] );
}
LSET::LSET( unsigned aIdCount, LAYER_ID aFirst, ... )
LSET::LSET( unsigned aIdCount, LAYER_ID aFirst, ... ) :
BASE_SET()
{
// The constructor, without the mandatory aFirst argument, could have been confused
// by the compiler with the LSET( LAYER_ID ). With aFirst, that ambiguity is not

8
include/layers_id_colors_and_visibility.h
View File

@ -241,7 +241,8 @@ public:
*
* for an empty set.
*/
LSET( LAYER_ID aLayer ) // LAYER_ID deliberately exludes int and relatives
LSET( LAYER_ID aLayer ) : // LAYER_ID deliberately exludes int and relatives
BASE_SET()
{
set( aLayer );
}
@ -379,6 +380,11 @@ public:
private:
/// Take this off the market, it may not be used because of LSET( LAYER_ID ).
LSET( unsigned long __val )
{
// not usable, it's private.
}
};

52
pcbnew/connect.cpp
View File

@ -303,6 +303,7 @@ int CONNECTIONS::SearchConnectedTracks( const TRACK * aTrack )
// Search for connections to starting point:
#define USE_EXTENDED_SEARCH
#ifdef USE_EXTENDED_SEARCH
int dist_max = aTrack->GetWidth() / 2;
static std::vector<CONNECTED_POINT*> tracks_candidates;
@ -312,26 +313,28 @@ int CONNECTIONS::SearchConnectedTracks( const TRACK * aTrack )
{
#ifndef USE_EXTENDED_SEARCH
int idx = searchEntryPointInCandidatesList( position );
if ( idx >= 0 )
if( idx >= 0 )
{
// search after:
for ( unsigned ii = idx; ii < m_candidates.size(); ii ++ )
for( unsigned ii = idx; ii < m_candidates.size(); ii ++ )
{
if( m_candidates[ii].GetTrack() == aTrack )
continue;
if( m_candidates[ii].GetPoint() != position )
break;
if( m_candidates[ii].GetTrack()->GetLayerSet() & layerMask )
if( ( m_candidates[ii].GetTrack()->GetLayerSet() & layerMask ).any() )
m_connected.push_back( m_candidates[ii].GetTrack() );
}
// search before:
for ( int ii = idx-1; ii >= 0; ii -- )
for( int ii = idx-1; ii >= 0; ii -- )
{
if( m_candidates[ii].GetTrack() == aTrack )
continue;
if( m_candidates[ii].GetPoint() != position )
break;
if( m_candidates[ii].GetTrack()->GetLayerSet() & layerMask )
if( ( m_candidates[ii].GetTrack()->GetLayerSet() & layerMask ).any() )
m_connected.push_back( m_candidates[ii].GetTrack() );
}
}
@ -370,7 +373,8 @@ int CONNECTIONS::SearchConnectedTracks( const TRACK * aTrack )
return count;
}
int CONNECTIONS::searchEntryPointInCandidatesList( const wxPoint & aPoint)
int CONNECTIONS::searchEntryPointInCandidatesList( const wxPoint& aPoint )
{
// Search the aPoint coordinates in m_Candidates
// m_Candidates is sorted by X then Y values, and a fast binary search is used
@ -379,15 +383,18 @@ int CONNECTIONS::searchEntryPointInCandidatesList( const wxPoint & aPoint)
int delta = m_candidates.size();
int idx = 0; // Starting index is the beginning of list
while( delta )
{
// Calculate half size of remaining interval to test.
// Ensure the computed value is not truncated (too small)
if( (delta & 1) && ( delta > 1 ) )
if( ( delta & 1 ) && ( delta > 1 ) )
delta++;
delta /= 2;
CONNECTED_POINT & candidate = m_candidates[idx];
CONNECTED_POINT& candidate = m_candidates[idx];
if( candidate.GetPoint() == aPoint ) // candidate found
{
return idx;
@ -607,6 +614,7 @@ void CONNECTIONS::Propagate_SubNets()
for( unsigned ii = 0; ii < curr_track->m_TracksConnected.size(); ii++ )
{
BOARD_CONNECTED_ITEM* track = curr_track->m_TracksConnected[ii];
if( curr_track->GetSubNet() ) // The current track is already a cluster member
{
// The other track is already a cluster member, so we can merge the 2 clusters
@ -616,8 +624,8 @@ void CONNECTIONS::Propagate_SubNets()
}
else
{
/* The other track is not yet attached to a cluster , so we can add this
* other track to the cluster */
// The other track is not yet attached to a cluster , so we can add this
// other track to the cluster
track->SetSubNet( curr_track->GetSubNet() );
}
}
@ -631,8 +639,8 @@ void CONNECTIONS::Propagate_SubNets()
}
else
{
/* it is connected to an other segment not in a cluster, so we must
* create a new cluster (only with the 2 track segments) */
// it is connected to an other segment not in a cluster, so we must
// create a new cluster (only with the 2 track segments)
sub_netcode++;
curr_track->SetSubNet( sub_netcode );
track->SetSubNet( curr_track->GetSubNet() );
@ -648,10 +656,12 @@ void CONNECTIONS::Propagate_SubNets()
// sub_netcodes to intersecting pads
for( unsigned ii = 0; ii < m_sortedPads.size(); ii++ )
{
D_PAD * curr_pad = m_sortedPads[ii];
D_PAD* curr_pad = m_sortedPads[ii];
for( unsigned jj = 0; jj < curr_pad->m_PadsConnected.size(); jj++ )
{
D_PAD * pad = curr_pad->m_PadsConnected[jj];
D_PAD* pad = curr_pad->m_PadsConnected[jj];
if( curr_pad->GetSubNet() ) // the current pad is already attached to a cluster
{
if( pad->GetSubNet() > 0 )
@ -660,8 +670,10 @@ void CONNECTIONS::Propagate_SubNets()
// Store the initial subnets, which will be modified by Merge_PadsSubNets
int subnet1 = pad->GetSubNet();
int subnet2 = curr_pad->GetSubNet();
// merge subnets of pads only, even those not connected by tracks
Merge_PadsSubNets( subnet1, subnet2 );
// merge subnets of tracks (and pads, which are already merged)
Merge_SubNets( subnet1, subnet2 );
}
@ -716,12 +728,15 @@ void PCB_BASE_FRAME::TestConnections()
// note some nets can have no tracks, and pads intersecting
// so Build_CurrNet_SubNets_Connections must be called for each net
CONNECTIONS connections( m_Pcb );
int last_net_tested = 0;
int current_net_code = 0;
for( TRACK* track = m_Pcb->m_Track; track; )
{
// At this point, track is the first track of a given net
current_net_code = track->GetNetCode();
// Get last track of the current net
TRACK* lastTrack = track->GetEndNetCode( current_net_code );
@ -780,6 +795,7 @@ void PCB_BASE_FRAME::TestNetConnection( wxDC* aDC, int aNetCode )
if( m_Pcb->m_Track )
{
CONNECTIONS connections( m_Pcb );
TRACK* firstTrack;
TRACK* lastTrack = NULL;
firstTrack = m_Pcb->m_Track.GetFirst()->GetStartNetCode( aNetCode );
@ -887,8 +903,10 @@ void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
for( curr_track = m_Pcb->m_Track; curr_track; curr_track = curr_track->Next() )
{
int netcode = curr_track->GetNetCode();
if( netcode == 0 )
{ // try to find a connected item having a netcode
{
// try to find a connected item having a netcode
for( unsigned kk = 0; kk < curr_track->m_TracksConnected.size(); kk++ )
{
int altnetcode = curr_track->m_TracksConnected[kk]->GetNetCode();
@ -901,8 +919,10 @@ void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
}
}
}
if( netcode ) // this track has a netcode
{ // propagate this netcode to connected tracks having no netcode
{
// propagate this netcode to connected tracks having no netcode
for( unsigned kk = 0; kk < curr_track->m_TracksConnected.size(); kk++ )
{
int altnetcode = curr_track->m_TracksConnected[kk]->GetNetCode();

2
pcbnew/dialogs/dialog_global_deletion.cpp
View File

@ -114,7 +114,7 @@ void DIALOG_GLOBAL_DELETION::AcceptPcbDelete( )
LSET layers_filter = LSET().set();
if( m_rbLayersOption->GetSelection() != 0 ) // Use current layer only
layers_filter = LSET( m_currentLayer );
layers_filter = LSET( ToLAYER_ID( m_currentLayer ) );
if( m_DelZones->GetValue() )
{

1
pcbnew/drc.cpp
View File

@ -536,6 +536,7 @@ void DRC::testUnconnected()
D_PAD* padEnd = rat.m_PadEnd;
msg = padStart->GetSelectMenuText() + wxT( " net " ) + padStart->GetNetname();
DRC_ITEM* uncItem = new DRC_ITEM( DRCE_UNCONNECTED_PADS,
msg,
padEnd->GetSelectMenuText(),

49
pcbnew/editrack-part2.cpp
View File

@ -120,34 +120,34 @@ bool PCB_EDIT_FRAME::Other_Layer_Route( TRACK* aTrack, wxDC* DC )
// Adjust the actual via layer pair
switch( via->GetViaType() )
{
case VIA_BLIND_BURIED:
case VIA_BLIND_BURIED:
via->SetLayerPair( first_layer, last_layer );
break;
case VIA_MICROVIA: // from external to the near neighbor inner layer
{
LAYER_ID last_inner_layer = ToLAYER_ID( ( GetBoard()->GetCopperLayerCount() - 2 ) );
if( first_layer == B_Cu )
last_layer = last_inner_layer;
else if( first_layer == F_Cu )
last_layer = In1_Cu;
else if( first_layer == last_inner_layer )
last_layer = B_Cu;
else if( first_layer == In1_Cu )
last_layer = F_Cu;
// else error: will be removed later
via->SetLayerPair( first_layer, last_layer );
break;
case VIA_MICROVIA: // from external to the near neighbor inner layer
{
LAYER_ID last_inner_layer = ToLAYER_ID( ( GetBoard()->GetCopperLayerCount() - 2 ) );
if( first_layer == B_Cu )
last_layer = last_inner_layer;
else if( first_layer == F_Cu )
last_layer = In1_Cu;
else if( first_layer == last_inner_layer )
last_layer = B_Cu;
else if( first_layer == In1_Cu )
last_layer = F_Cu;
// else error: will be removed later
via->SetLayerPair( first_layer, last_layer );
{
NETINFO_ITEM* net = via->GetNet();
via->SetWidth( net->GetMicroViaSize() );
}
NETINFO_ITEM* net = via->GetNet();
via->SetWidth( net->GetMicroViaSize() );
}
break;
}
break;
default:
break;
default:
break;
}
if( g_Drc_On && BAD_DRC == m_drc->Drc( via, GetBoard()->m_Track ) )
@ -311,4 +311,3 @@ void PCB_EDIT_FRAME::Show_1_Ratsnest( EDA_ITEM* item, wxDC* DC )
GetBoard()->m_FullRatsnest[ii].m_Status &= ~CH_VISIBLE;
}
}

3
pcbnew/minimun_spanning_tree.cpp
View File

@ -121,7 +121,7 @@ void MIN_SPAN_TREE::updateDistances( int target )
void MIN_SPAN_TREE::BuildTree()
{
/* Add the first node to the tree */
// Add the first node to the tree
inTree[0] = 1;
updateDistances( 0 );
@ -129,6 +129,7 @@ void MIN_SPAN_TREE::BuildTree()
{
// Find the node with the smallest distance to the tree
int min = -1;
for( int ii = 0; ii < m_Size; ++ii )
{
if( !inTree[ii] )

196
pcbnew/pcb_parser.cpp
View File

@ -85,12 +85,25 @@ void PCB_PARSER::init()
for( int i=1; i<=14; ++i )
{
char tmp[60];
std::string key = StrPrintf( "Inner%d", i );
sprintf( tmp, "Inner%d", i );
m_layerMasks[ tmp ] = LSET( In15_Cu - i );
m_layerMasks[ key ] = LSET( LAYER_ID( In15_Cu - i ) );
}
#if defined(DEBUG) && 0
printf( "m_layerMasks:\n" );
for( LSET_MAP::const_iterator it = m_layerMasks.begin(); it != m_layerMasks.end(); ++it )
{
printf( " [%s] == 0x%s\n", it->first.c_str(), it->second.FmtHex().c_str() );
}
printf( "m_layerIndices:\n" );
for( LAYER_ID_MAP::const_iterator it = m_layerIndices.begin(); it != m_layerIndices.end(); ++it )
{
printf( " [%s] == %d\n", it->first.c_str(), it->second );
}
#endif
}
@ -776,7 +789,7 @@ void PCB_PARSER::parseLayers() throw( IO_ERROR, PARSE_ERROR )
UTF8 name = it->m_name;
m_layerIndices[ name ] = LAYER_ID( it->m_number );
m_layerMasks[ name ] = LSET( it->m_number );
m_layerMasks[ name ] = LSET( LAYER_ID( it->m_number ) );
}
copperLayerCount = cu.size();
@ -1783,55 +1796,55 @@ MODULE* PCB_PARSER::parseMODULE( wxArrayString* aInitialComments ) throw( IO_ERR
break;
case T_fp_text:
{
TEXTE_MODULE* text = parseTEXTE_MODULE();
text->SetParent( module.get() );
double orientation = text->GetOrientation();
orientation -= module->GetOrientation();
text->SetOrientation( orientation );
text->SetDrawCoord();
switch( text->GetType() )
{
case TEXTE_MODULE::TEXT_is_REFERENCE:
module->Reference() = *text;
delete text;
break;
TEXTE_MODULE* text = parseTEXTE_MODULE();
text->SetParent( module.get() );
double orientation = text->GetOrientation();
orientation -= module->GetOrientation();
text->SetOrientation( orientation );
text->SetDrawCoord();
case TEXTE_MODULE::TEXT_is_VALUE:
module->Value() = *text;
delete text;
break;
switch( text->GetType() )
{
case TEXTE_MODULE::TEXT_is_REFERENCE:
module->Reference() = *text;
delete text;
break;
default:
module->GraphicalItems().PushBack( text );
case TEXTE_MODULE::TEXT_is_VALUE:
module->Value() = *text;
delete text;
break;
default:
module->GraphicalItems().PushBack( text );
}
}
break;
}
case T_fp_arc:
case T_fp_circle:
case T_fp_curve:
case T_fp_line:
case T_fp_poly:
{
EDGE_MODULE* em = parseEDGE_MODULE();
em->SetParent( module.get() );
em->SetDrawCoord();
module->GraphicalItems().PushBack( em );
{
EDGE_MODULE* em = parseEDGE_MODULE();
em->SetParent( module.get() );
em->SetDrawCoord();
module->GraphicalItems().PushBack( em );
}
break;
}
case T_pad:
{
D_PAD* pad = parseD_PAD( module.get() );
wxPoint pt = pad->GetPos0();
RotatePoint( &pt, module->GetOrientation() );
pad->SetPosition( pt + module->GetPosition() );
module->AddPad( pad );
{
D_PAD* pad = parseD_PAD( module.get() );
wxPoint pt = pad->GetPos0();
RotatePoint( &pt, module->GetOrientation() );
pad->SetPosition( pt + module->GetPosition() );
module->AddPad( pad );
}
break;
}
case T_model:
module->Add3DModel( parse3DModel() );
@ -2110,8 +2123,9 @@ D_PAD* PCB_PARSER::parseD_PAD( MODULE* aParent ) throw( IO_ERROR, PARSE_ERROR )
wxCHECK_MSG( CurTok() == T_pad, NULL,
wxT( "Cannot parse " ) + GetTokenString( CurTok() ) + wxT( " as D_PAD." ) );
wxSize sz;
wxSize sz;
wxPoint pt;
std::auto_ptr< D_PAD > pad( new D_PAD( aParent ) );
NeedSYMBOLorNUMBER();
@ -2208,72 +2222,72 @@ D_PAD* PCB_PARSER::parseD_PAD( MODULE* aParent ) throw( IO_ERROR, PARSE_ERROR )
break;
case T_rect_delta:
{
wxSize delta;
delta.SetWidth( parseBoardUnits( "rectangle delta width" ) );
delta.SetHeight( parseBoardUnits( "rectangle delta height" ) );
pad->SetDelta( delta );
NeedRIGHT();
{
wxSize delta;
delta.SetWidth( parseBoardUnits( "rectangle delta width" ) );
delta.SetHeight( parseBoardUnits( "rectangle delta height" ) );
pad->SetDelta( delta );
NeedRIGHT();
}
break;
}
case T_drill:
{
bool haveWidth = false;
wxSize drillSize = pad->GetDrillSize();
for( token = NextTok(); token != T_RIGHT; token = NextTok() )
{
if( token == T_LEFT )
token = NextTok();
bool haveWidth = false;
wxSize drillSize = pad->GetDrillSize();
switch( token )
for( token = NextTok(); token != T_RIGHT; token = NextTok() )
{
case T_oval:
pad->SetDrillShape( PAD_DRILL_OBLONG );
break;
if( token == T_LEFT )
token = NextTok();
case T_NUMBER:
{
if( !haveWidth )
switch( token )
{
drillSize.SetWidth( parseBoardUnits() );
case T_oval:
pad->SetDrillShape( PAD_DRILL_OBLONG );
break;
// If height is not defined the width and height are the same.
drillSize.SetHeight( drillSize.GetWidth() );
haveWidth = true;
}
else
{
drillSize.SetHeight( parseBoardUnits() );
}
case T_NUMBER:
{
if( !haveWidth )
{
drillSize.SetWidth( parseBoardUnits() );
break;
// If height is not defined the width and height are the same.
drillSize.SetHeight( drillSize.GetWidth() );
haveWidth = true;
}
else
{
drillSize.SetHeight( parseBoardUnits() );
}
}
break;
case T_offset:
pt.x = parseBoardUnits( "drill offset x" );
pt.y = parseBoardUnits( "drill offset y" );
pad->SetOffset( pt );
NeedRIGHT();
break;
default:
Expecting( "oval, size, or offset" );
}
}
case T_offset:
pt.x = parseBoardUnits( "drill offset x" );
pt.y = parseBoardUnits( "drill offset y" );
pad->SetOffset( pt );
NeedRIGHT();
break;
// This fixes a bug caused by setting the default D_PAD drill size to a value
// other than 0 used to fix a bunch of debug assertions even though it is defined
// as a through hole pad. Wouldn't a though hole pad with no drill be a surface
// mount pad (or a conn pad which is a smd pad with no solder paste)?
if( ( pad->GetAttribute() != PAD_SMD ) && ( pad->GetAttribute() != PAD_CONN ) )
pad->SetDrillSize( drillSize );
else
pad->SetDrillSize( wxSize( 0, 0 ) );
default:
Expecting( "oval, size, or offset" );
}
}
// This fixes a bug caused by setting the default D_PAD drill size to a value
// other than 0 used to fix a bunch of debug assertions even though it is defined
// as a through hole pad. Wouldn't a though hole pad with no drill be a surface
// mount pad (or a conn pad which is a smd pad with no solder paste)?
if( ( pad->GetAttribute() != PAD_SMD ) && ( pad->GetAttribute() != PAD_CONN ) )
pad->SetDrillSize( drillSize );
else
pad->SetDrillSize( wxSize( 0, 0 ) );
break;
}
case T_layers:
{

2
pcbnew/pcbnew_config.cpp
View File

@ -370,7 +370,7 @@ PARAM_CFG_ARRAY& PCB_EDIT_FRAME::GetConfigurationSettings()
for( int i = 0; i<LAYER_ID_COUNT; ++i )
{
wxString vn = wxString::Format(
wxT( "ColorPCBLayer:%s" ),
wxT( "ColorPCBLayer_%s" ),
LSET::Name( LAYER_ID( i ) ) );
m_configSettings.push_back( new PARAM_CFG_SETCOLOR( true, vn, LOC_COLOR( i ), cds.m_LayersColors[i] ) );

2
pcbnew/plot_board_layers.cpp
View File

@ -154,7 +154,7 @@ void PlotOneBoardLayer( BOARD *aBoard, PLOTTER* aPlotter, LAYER_NUM aLayer,
// Specify that the contents of the "Edges Pcb" layer are to be plotted
// in addition to the contents of the currently specified layer.
LSET layer_mask( aLayer );
LSET layer_mask( ToLAYER_ID( aLayer ) );
if( !aPlotOpt.GetExcludeEdgeLayer() )
layer_mask.set( Edge_Cuts );

42
pcbnew/ratsnest.cpp
View File

@ -20,8 +20,8 @@
#include <minimun_spanning_tree.h>
/**
* @brief class MIN_SPAN_TREE_PADS (derived from MIN_SPAN_TREE) specialize
* the basic class to calculate a minimum spanning tree from a list of pads,
* @brief class MIN_SPAN_TREE_PADS (derived from MIN_SPAN_TREE) specializes
* the base class to calculate a minimum spanning tree from a list of pads,
* and to add this tree as ratsnest to the main ratsnest list.
*/
class MIN_SPAN_TREE_PADS: public MIN_SPAN_TREE
@ -52,9 +52,9 @@ public:
* Function AddTreeToRatsnest
* Adds the current minimum spanning tree as ratsnest items
* to the main ratsnest list
* @param aRatsnestList = the main ratsnest list
* @param aRatsnestList = a ratsnest list to add to
*/
void AddTreeToRatsnest( std::vector<RATSNEST_ITEM> &aRatsnestList );
void AddTreeToRatsnest( std::vector<RATSNEST_ITEM>* aRatsnestList );
/**
* Function GetWeight
@ -68,13 +68,15 @@ public:
};
void MIN_SPAN_TREE_PADS::AddTreeToRatsnest( std::vector<RATSNEST_ITEM> &aRatsnestList )
void MIN_SPAN_TREE_PADS::AddTreeToRatsnest( std::vector<RATSNEST_ITEM>* aRatsnestList )
{
std::vector<D_PAD*>& padsBuffer = *m_PadsList;
if( padsBuffer.empty() )
return;
int netcode = padsBuffer[0]->GetNetCode();
// Note: to get edges in minimum spanning tree,
// the index value 0 is not used: it is just
// the entry point of the minimum spanning tree.
@ -83,12 +85,14 @@ void MIN_SPAN_TREE_PADS::AddTreeToRatsnest( std::vector<RATSNEST_ITEM> &aRatsnes
{
// Create the new ratsnest
RATSNEST_ITEM net;
net.SetNet( netcode );
net.m_Status = CH_ACTIF | CH_VISIBLE;
net.m_Lenght = GetDist(ii);
net.m_PadStart = padsBuffer[ii];
net.m_PadEnd = padsBuffer[ GetWhoTo(ii) ];
aRatsnestList.push_back( net );
aRatsnestList->push_back( net );
}
}
@ -110,13 +114,13 @@ int MIN_SPAN_TREE_PADS::GetWeight( int aItem1, int aItem2 )
if( pad1 == pad2 )
return 0;
int weight = abs( pad2->GetPosition().x - pad1->GetPosition().x ) +
abs( pad2->GetPosition().y - pad1->GetPosition().y );
return weight + 1;
}
/* Note about the ratsnest computation:
* Building the general ratsnest:
* For each net, the ratsnest is the set of lines connecting pads,
@ -230,6 +234,7 @@ void PCB_BASE_FRAME::Build_Board_Ratsnest()
// (net_code = 0 -> no connect)
noconn = 0;
MIN_SPAN_TREE_PADS min_spanning_tree;
for( ; current_net_code < m_Pcb->GetNetCount(); current_net_code++ )
{
NETINFO_ITEM* net = m_Pcb->FindNet( current_net_code );
@ -245,7 +250,7 @@ void PCB_BASE_FRAME::Build_Board_Ratsnest()
min_spanning_tree.MSP_Init( &net->m_PadInNetList );
min_spanning_tree.BuildTree();
min_spanning_tree.AddTreeToRatsnest( m_Pcb->m_FullRatsnest );
min_spanning_tree.AddTreeToRatsnest( &m_Pcb->m_FullRatsnest );
net->m_RatsnestEndIdx = m_Pcb->GetRatsnestsCount();
}
@ -255,7 +260,7 @@ void PCB_BASE_FRAME::Build_Board_Ratsnest()
// Update the ratsnest display option (visible/invisible) flag
for( unsigned ii = 0; ii < m_Pcb->GetRatsnestsCount(); ii++ )
{
if( !GetBoard()->IsElementVisible(RATSNEST_VISIBLE) ) // Clear VISIBLE flag
if( !GetBoard()->IsElementVisible( RATSNEST_VISIBLE ) ) // Clear VISIBLE flag
m_Pcb->m_FullRatsnest[ii].m_Status &= ~CH_VISIBLE;
}
}
@ -532,14 +537,13 @@ void PCB_BASE_FRAME::build_ratsnest_module( MODULE* aModule )
*/
if( (m_Pcb->m_Status_Pcb & RATSNEST_ITEM_LOCAL_OK) == 0 )
{
/* Compute the "internal" ratsnest, i.e the links between the current
* footprint pads
*/
// Compute the "internal" ratsnest, i.e the links between the current
// footprint pads
localPadList.clear();
m_Pcb->m_LocalRatsnest.clear();
// collect active pads of the module:
for( pad_ref = aModule->Pads(); pad_ref != NULL; pad_ref = pad_ref->Next() )
for( pad_ref = aModule->Pads(); pad_ref; pad_ref = pad_ref->Next() )
{
if( pad_ref->GetNetCode() == NETINFO_LIST::UNCONNECTED )
continue;
@ -600,8 +604,9 @@ void PCB_BASE_FRAME::build_ratsnest_module( MODULE* aModule )
*/
current_net_code = localPadList[0]->GetNetCode();
MIN_SPAN_TREE_PADS min_spanning_tree;
MIN_SPAN_TREE_PADS min_spanning_tree;
std::vector<D_PAD*> padsBuffer; // contains pads of only one net
for( unsigned ii = 0; ii < pads_module_count; ii++ )
{
// Search the end of pad list relative to the current net
@ -616,16 +621,20 @@ void PCB_BASE_FRAME::build_ratsnest_module( MODULE* aModule )
break;
}
for(unsigned kk = ii; kk < jj; kk++ )
for( unsigned kk = ii; kk < jj; kk++ )
padsBuffer.push_back( localPadList[kk] );
min_spanning_tree.MSP_Init( &padsBuffer );
min_spanning_tree.BuildTree();
min_spanning_tree.AddTreeToRatsnest( m_Pcb->m_LocalRatsnest );
min_spanning_tree.AddTreeToRatsnest( &m_Pcb->m_LocalRatsnest );
padsBuffer.clear();
ii = jj;
if( ii < localPadList.size() )
current_net_code = localPadList[ii]->GetNetCode();
}
internalRatsCount = m_Pcb->m_LocalRatsnest.size();
// set the flag LOCAL_RATSNEST_ITEM of the ratsnest status:
@ -647,6 +656,7 @@ void PCB_BASE_FRAME::build_ratsnest_module( MODULE* aModule )
* so, for each net, only one rats nest item is created
*/
RATSNEST_ITEM local_rats;
local_rats.m_Lenght = INT_MAX;
local_rats.m_Status = 0;
bool addRats = false;