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CADSTAR Importer: Fix Code Style 

- Rename member variable names to use the 'm_' prefix
- Rename a few object types that clashed with KiCad object names, such
  as BOARD and SCHEMATIC, to avoid the use of '::' to access the KiCad
  objects.
- Remove some unused code.
This commit is contained in:
Roberto Fernandez Bautista 2021-02-13 20:00:17 +00:00 committed by Wayne Stambaugh
parent be8327bd54
commit 09ebfcd650
10 changed files with 329 additions and 327 deletions
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8
common/plugins/cadstar/cadstar_archive_parser.cpp
View File

@ -32,7 +32,7 @@ const double CADSTAR_ARCHIVE_PARSER::TXT_HEIGHT_RATIO = ( 24.0 - 5.0 ) / 24.0;
// Cadstar fields and their KiCad equivalent
const std::map<CADSTAR_ARCHIVE_PARSER::TEXT_FIELD_NAME, wxString>
CADSTAR_ARCHIVE_PARSER::CadstarToKicadFieldsMap =
CADSTAR_ARCHIVE_PARSER::CADSTAR_TO_KICAD_FIELDS =
{ { TEXT_FIELD_NAME::DESIGN_TITLE, wxT( "DESIGN_TITLE" ) },
{ TEXT_FIELD_NAME::SHORT_JOBNAME, wxT( "SHORT_JOBNAME" ) },
{ TEXT_FIELD_NAME::LONG_JOBNAME, wxT( "LONG_JOBNAME" ) },
@ -870,7 +870,7 @@ wxString CADSTAR_ARCHIVE_PARSER::ParseTextFields( wxString aTextString, PARSER_C
case TEXT_FIELD_NAME::NUM_OF_SHEETS:
case TEXT_FIELD_NAME::SHEET_NUMBER:
case TEXT_FIELD_NAME::SHEET_NAME:
returnStr += wxT( "${" ) + CadstarToKicadFieldsMap.at( foundField ) + wxT( "}" );
returnStr += wxT( "${" ) + CADSTAR_TO_KICAD_FIELDS.at( foundField ) + wxT( "}" );
break;
case TEXT_FIELD_NAME::DISTANCE:
@ -1295,7 +1295,7 @@ void CADSTAR_ARCHIVE_PARSER::TEXT_LOCATION::Parse( XNODE* aNode, PARSER_CONTEXT*
}
void CADSTAR_ARCHIVE_PARSER::NETCLASS::Parse( XNODE* aNode, PARSER_CONTEXT* aContext )
void CADSTAR_ARCHIVE_PARSER::CADSTAR_NETCLASS::Parse( XNODE* aNode, PARSER_CONTEXT* aContext )
{
wxASSERT( aNode->GetName() == wxT( "NETCLASS" ) );
@ -1368,7 +1368,7 @@ bool CADSTAR_ARCHIVE_PARSER::CODEDEFS::ParseSubNode( XNODE* aChildNode, PARSER_C
}
else if( nodeName == wxT( "NETCLASS" ) )
{
NETCLASS netclass;
CADSTAR_NETCLASS netclass;
netclass.Parse( aChildNode, aContext );
NetClasses.insert( std::make_pair( netclass.ID, netclass ) );
}

16
common/plugins/cadstar/cadstar_archive_parser.h
View File

@ -151,9 +151,10 @@ public:
};
/**
* Map between CADSTAR fields and KiCad text variables. This is used as a lookup
* Map between CADSTAR fields and KiCad text variables. This is used as a lookup table when
* parsing CADSTAR text fields. Most variables have a similar name in KiCad as in CADSTAR.
*/
static const std::map<TEXT_FIELD_NAME, wxString> CadstarToKicadFieldsMap;
static const std::map<TEXT_FIELD_NAME, wxString> CADSTAR_TO_KICAD_FIELDS;
struct PARSER_CONTEXT
@ -184,9 +185,6 @@ public:
std::set<TEXT_FIELD_NAME> InconsistentTextFields;
};
PARSER_CONTEXT mContext;
/**
* @brief Replaces CADSTAR fields for the equivalent in KiCad and stores the field values
* in aParserContext
@ -755,7 +753,7 @@ public:
};
struct NETCLASS : PARSER
struct CADSTAR_NETCLASS : PARSER
{
NETCLASS_ID ID;
wxString Name;
@ -781,7 +779,7 @@ public:
std::map<TEXTCODE_ID, TEXTCODE> TextCodes;
std::map<ROUTECODE_ID, ROUTECODE> RouteCodes;
std::map<ATTRIBUTE_ID, ATTRNAME> AttributeNames;
std::map<NETCLASS_ID, NETCLASS> NetClasses;
std::map<NETCLASS_ID, CADSTAR_NETCLASS> NetClasses;
std::map<SPACING_CLASS_ID, SPCCLASSNAME> SpacingClassNames;
bool ParseSubNode( XNODE* aChildNode, PARSER_CONTEXT* aContext );
@ -1380,6 +1378,10 @@ public:
: wxT( "" ) );
}
protected:
PARSER_CONTEXT m_context;
}; // class CADSTAR_ARCHIVE_PARSER
#endif // CADSTAR_ARCHIVE_PARSER_H_

144
eeschema/sch_plugins/cadstar/cadstar_sch_archive_loader.cpp
View File

@ -46,7 +46,7 @@
#include <wildcards_and_files_ext.h>
void CADSTAR_SCH_ARCHIVE_LOADER::Load( ::SCHEMATIC* aSchematic, ::SCH_SHEET* aRootSheet,
void CADSTAR_SCH_ARCHIVE_LOADER::Load( SCHEMATIC* aSchematic, SCH_SHEET* aRootSheet,
SCH_PLUGIN::SCH_PLUGIN_RELEASER* aSchPlugin, const wxFileName& aLibraryFileName )
{
Parse();
@ -75,12 +75,12 @@ void CADSTAR_SCH_ARCHIVE_LOADER::Load( ::SCHEMATIC* aSchematic, ::SCH_SHEET* aRo
}
// Assume the centre at 0,0 since we are going to be translating the design afterwards anyway
mDesignCenter = { 0, 0 };
m_designCenter = { 0, 0 };
mSchematic = aSchematic;
mRootSheet = aRootSheet;
mPlugin = aSchPlugin;
mLibraryFileName = aLibraryFileName;
m_schematic = aSchematic;
m_rootSheet = aRootSheet;
m_plugin = aSchPlugin;
m_libraryFileName = aLibraryFileName;
loadSheets();
loadHierarchicalSheetPins();
@ -117,7 +117,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::Load( ::SCHEMATIC* aSchematic, ::SCH_SHEET* aRo
// For all sheets, centre all elements and re calculate the page size:
for( std::pair<LAYER_ID, SCH_SHEET*> sheetPair : mSheetMap )
for( std::pair<LAYER_ID, SCH_SHEET*> sheetPair : m_sheetMap )
{
SCH_SHEET* sheet = sheetPair.second;
@ -199,9 +199,9 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadSheets()
{
const std::vector<LAYER_ID>& orphanSheets = findOrphanSheets();
SCH_SHEET_PATH rootPath;
rootPath.push_back( mRootSheet );
mRootSheet->AddInstance( rootPath.Path() );
mRootSheet->SetPageNumber( rootPath, wxT( "1" ) );
rootPath.push_back( m_rootSheet );
m_rootSheet->AddInstance( rootPath.Path() );
m_rootSheet->SetPageNumber( rootPath, wxT( "1" ) );
if( orphanSheets.size() > 1 )
{
@ -237,9 +237,9 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadSheets()
filename += wxT( "." ) + KiCadSchematicFileExtension;
wxFileName fn( filename );
mRootSheet->GetScreen()->SetFileName( fn.GetFullPath() );
m_rootSheet->GetScreen()->SetFileName( fn.GetFullPath() );
mSheetMap.insert( { rootSheetID, mRootSheet } );
m_sheetMap.insert( { rootSheetID, m_rootSheet } );
loadChildSheets( rootSheetID, rootPath );
}
else
@ -263,9 +263,9 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadHierarchicalSheetPins()
else
continue;
if( mSheetMap.find( sheetID ) != mSheetMap.end() )
if( m_sheetMap.find( sheetID ) != m_sheetMap.end() )
{
SCH_SHEET* sheet = mSheetMap.at( sheetID );
SCH_SHEET* sheet = m_sheetMap.at( sheetID );
for( std::pair<TERMINAL_ID, TERMINAL> termPair : block.Terminals )
{
@ -290,7 +290,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadHierarchicalSheetPins()
sheet->GetScreen()->Append( sheetPin );
BLOCK_PIN_ID blockPinID = std::make_pair( block.ID, term.ID );
mSheetPinMap.insert( { blockPinID, sheetPin } );
m_sheetPinMap.insert( { blockPinID, sheetPin } );
}
}
}
@ -331,12 +331,12 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadPartsLibrary()
loadSymDefIntoLibrary( symbolID, &part, gateID, kiPart );
}
( *mPlugin )->SaveSymbol( mLibraryFileName.GetFullPath(), kiPart );
( *m_plugin )->SaveSymbol( m_libraryFileName.GetFullPath(), kiPart );
LIB_PART* loadedPart =
( *mPlugin )->LoadSymbol( mLibraryFileName.GetFullPath(), kiPart->GetName() );
( *m_plugin )->LoadSymbol( m_libraryFileName.GetFullPath(), kiPart->GetName() );
mPartMap.insert( { key, loadedPart } );
m_partMap.insert( { key, loadedPart } );
}
}
@ -352,7 +352,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadSchematicSymbolInstances()
if( sym.IsComponent )
{
if( mPartMap.find( sym.PartRef.RefID ) == mPartMap.end() )
if( m_partMap.find( sym.PartRef.RefID ) == m_partMap.end() )
{
wxLogError( wxString::Format(
_( "Symbol '%s' references part '%s' which could not be found "
@ -362,7 +362,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadSchematicSymbolInstances()
continue;
}
LIB_PART* kiPart = mPartMap.at( sym.PartRef.RefID );
LIB_PART* kiPart = m_partMap.at( sym.PartRef.RefID );
double symOrientDeciDeg = 0.0;
SCH_COMPONENT* component = loadSchematicSymbol( sym, *kiPart, symOrientDeciDeg );
@ -463,8 +463,8 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadSchematicSymbolInstances()
partName = LIB_ID::FixIllegalChars( partName );
if( mPowerSymLibMap.find( symID ) == mPowerSymLibMap.end()
|| mPowerSymLibMap.at( symID )->GetName() != partName )
if( m_powerSymLibMap.find( symID ) == m_powerSymLibMap.end()
|| m_powerSymLibMap.at( symID )->GetName() != partName )
{
kiPart = new LIB_PART( partName );
kiPart->SetPower();
@ -489,12 +489,12 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadSchematicSymbolInstances()
kiPart->GetReferenceField().SetText( "#PWR" );
kiPart->GetReferenceField().SetVisible( false );
( *mPlugin )->SaveSymbol( mLibraryFileName.GetFullPath(), kiPart );
mPowerSymLibMap.insert( { symID, kiPart } );
( *m_plugin )->SaveSymbol( m_libraryFileName.GetFullPath(), kiPart );
m_powerSymLibMap.insert( { symID, kiPart } );
}
else
{
kiPart = mPowerSymLibMap.at( symID );
kiPart = m_powerSymLibMap.at( symID );
}
double compOrientationTenthDegree = 0.0;
@ -502,7 +502,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadSchematicSymbolInstances()
SCH_COMPONENT* component =
loadSchematicSymbol( sym, *kiPart, compOrientationTenthDegree );
mPowerSymMap.insert( { sym.ID, component } );
m_powerSymMap.insert( { sym.ID, component } );
}
else if( sym.SymbolVariant.Type == SYMBOLVARIANT::TYPE::SIGNALREF )
{
@ -531,8 +531,8 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadSchematicSymbolInstances()
else
netLabel->SetShape( PINSHEETLABEL_SHAPE::PS_UNSPECIFIED );
mSheetMap.at( sym.LayerID )->GetScreen()->Append( netLabel );
mGlobLabelMap.insert( { sym.ID, netLabel } );
m_sheetMap.at( sym.LayerID )->GetScreen()->Append( netLabel );
m_globalLabelsMap.insert( { sym.ID, netLabel } );
}
else
{
@ -574,13 +574,13 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadBusses()
if( bus.LayerID != wxT( "NO_SHEET" ) )
{
SCH_SCREEN* screen = mSheetMap.at( bus.LayerID )->GetScreen();
SCH_SCREEN* screen = m_sheetMap.at( bus.LayerID )->GetScreen();
std::shared_ptr<BUS_ALIAS> kiBusAlias = std::make_shared<BUS_ALIAS>();
kiBusAlias->SetName( bus.Name );
kiBusAlias->SetParent( screen );
screen->AddBusAlias( kiBusAlias );
mBusesMap.insert( { bus.ID, kiBusAlias } );
m_busesMap.insert( { bus.ID, kiBusAlias } );
SCH_LABEL* label = new SCH_LABEL();
label->SetText( wxT( "{" ) + bus.Name + wxT( "}" ) );
@ -652,9 +652,9 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadNets()
{
NET_SCH::SYM_TERM netTerm = terminalPair.second;
if( mPowerSymMap.find( netTerm.SymbolID ) != mPowerSymMap.end() )
if( m_powerSymMap.find( netTerm.SymbolID ) != m_powerSymMap.end() )
{
SCH_FIELD* val = mPowerSymMap.at( netTerm.SymbolID )->GetField( VALUE_FIELD );
SCH_FIELD* val = m_powerSymMap.at( netTerm.SymbolID )->GetField( VALUE_FIELD );
val->SetText( netName );
val->SetBold( false );
val->SetVisible( false );
@ -669,9 +669,9 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadNets()
netTerm.NetLabel.Justification, val );
}
}
else if( mGlobLabelMap.find( netTerm.SymbolID ) != mGlobLabelMap.end() )
else if( m_globalLabelsMap.find( netTerm.SymbolID ) != m_globalLabelsMap.end() )
{
mGlobLabelMap.at( netTerm.SymbolID )->SetText( netName );
m_globalLabelsMap.at( netTerm.SymbolID )->SetText( netName );
}
}
@ -682,10 +682,10 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadNets()
NET_SCH::BLOCK_TERM blockTerm = net.BlockTerminals.at( aNode );
BLOCK_PIN_ID blockPinID = std::make_pair( blockTerm.BlockID, blockTerm.TerminalID );
if( mSheetPinMap.find( blockPinID )
!= mSheetPinMap.end() )
if( m_sheetPinMap.find( blockPinID )
!= m_sheetPinMap.end() )
{
return mSheetPinMap.at( blockPinID );
return m_sheetPinMap.at( blockPinID );
}
}
@ -707,8 +707,8 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadNets()
NET_SCH::BUS_TERM busTerm = busPair.second;
BUS bus = Schematic.Buses.at( busTerm.BusID );
if( !mBusesMap.at( bus.ID )->Contains( netName ) )
mBusesMap.at( bus.ID )->AddMember( netName );
if( !m_busesMap.at( bus.ID )->Contains( netName ) )
m_busesMap.at( bus.ID )->AddMember( netName );
SCH_BUS_WIRE_ENTRY* busEntry =
new SCH_BUS_WIRE_ENTRY( getKiCadPoint( busTerm.FirstPoint ), false );
@ -717,7 +717,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadNets()
getKiCadPoint( busTerm.SecondPoint ) - getKiCadPoint( busTerm.FirstPoint );
busEntry->SetSize( wxSize( size.x, size.y ) );
mSheetMap.at( bus.LayerID )->GetScreen()->Append( busEntry );
m_sheetMap.at( bus.LayerID )->GetScreen()->Append( busEntry );
if( busTerm.HasNetLabel )
{
@ -731,7 +731,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadNets()
netlabels.insert( { busTerm.ID, label } );
mSheetMap.at( bus.LayerID )->GetScreen()->Append( label );
m_sheetMap.at( bus.LayerID )->GetScreen()->Append( label );
}
}
@ -746,7 +746,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadNets()
label->SetVisible( true );
netlabels.insert( { dangler.ID, label } );
mSheetMap.at( dangler.LayerID )->GetScreen()->Append( label );
m_sheetMap.at( dangler.LayerID )->GetScreen()->Append( label );
}
@ -893,7 +893,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadNets()
last = (wxPoint) pt;
mSheetMap.at( conn.LayerID )->GetScreen()->Append( wire );
m_sheetMap.at( conn.LayerID )->GetScreen()->Append( wire );
}
//Fix labels on the end wire
@ -921,7 +921,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadNets()
SCH_JUNCTION* kiJunc = new SCH_JUNCTION();
kiJunc->SetPosition( getKiCadPoint( junc.Location ) );
mSheetMap.at( junc.LayerID )->GetScreen()->Append( kiJunc );
m_sheetMap.at( junc.LayerID )->GetScreen()->Append( kiJunc );
if( junc.HasNetLabel )
{
@ -936,7 +936,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadNets()
LABEL_SPIN_STYLE spin = getSpinStyleDeciDeg( labelAngleDeciDeg );
label->SetLabelSpinStyle( spin );
mSheetMap.at( junc.LayerID )->GetScreen()->Append( label );
m_sheetMap.at( junc.LayerID )->GetScreen()->Append( label );
}
}
}
@ -1029,24 +1029,24 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadDocumentationSymbols()
void CADSTAR_SCH_ARCHIVE_LOADER::loadTextVariables()
{
auto findAndReplaceTextField = [&]( TEXT_FIELD_NAME aField, wxString aValue ) {
if( mContext.TextFieldToValuesMap.find( aField ) != mContext.TextFieldToValuesMap.end() )
if( m_context.TextFieldToValuesMap.find( aField ) != m_context.TextFieldToValuesMap.end() )
{
if( mContext.TextFieldToValuesMap.at( aField ) != aValue )
if( m_context.TextFieldToValuesMap.at( aField ) != aValue )
{
mContext.TextFieldToValuesMap.at( aField ) = aValue;
mContext.InconsistentTextFields.insert( aField );
m_context.TextFieldToValuesMap.at( aField ) = aValue;
m_context.InconsistentTextFields.insert( aField );
return false;
}
}
else
{
mContext.TextFieldToValuesMap.insert( { aField, aValue } );
m_context.TextFieldToValuesMap.insert( { aField, aValue } );
}
return true;
};
PROJECT* pj = &mSchematic->Prj();
PROJECT* pj = &m_schematic->Prj();
if( pj )
{
@ -1063,15 +1063,15 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadTextVariables()
findAndReplaceTextField( TEXT_FIELD_NAME::DESIGN_TITLE, Header.JobTitle );
for( std::pair<TEXT_FIELD_NAME, wxString> txtvalue : mContext.TextFieldToValuesMap )
for( std::pair<TEXT_FIELD_NAME, wxString> txtvalue : m_context.TextFieldToValuesMap )
{
wxString varName = CadstarToKicadFieldsMap.at( txtvalue.first );
wxString varName = CADSTAR_TO_KICAD_FIELDS.at( txtvalue.first );
wxString varValue = txtvalue.second;
txtVars.insert( { varName, varValue } );
}
for( std::pair<wxString, wxString> txtvalue : mContext.FilenamesToTextMap )
for( std::pair<wxString, wxString> txtvalue : m_context.FilenamesToTextMap )
{
wxString varName = txtvalue.first;
wxString varValue = txtvalue.second;
@ -1171,7 +1171,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadSymDefIntoLibrary( const SYMDEF_ID& aSymdef
}
if(aCadstarPart)
mPinNumsMap.insert( { aCadstarPart->ID + aGateID, pinNumMap } );
m_pinNumsMap.insert( { aCadstarPart->ID + aGateID, pinNumMap } );
for( std::pair<TEXT_ID, TEXT> textPair : symbol.Texts )
{
@ -1448,12 +1448,12 @@ void CADSTAR_SCH_ARCHIVE_LOADER::applyToLibraryFieldAttribute(
SCH_COMPONENT* CADSTAR_SCH_ARCHIVE_LOADER::loadSchematicSymbol(
const SYMBOL& aCadstarSymbol, const LIB_PART& aKiCadPart, double& aComponentOrientationDeciDeg )
{
LIB_ID libId( mLibraryFileName.GetName(), aKiCadPart.GetName() );
LIB_ID libId( m_libraryFileName.GetName(), aKiCadPart.GetName() );
int unit = getKiCadUnitNumberFromGate( aCadstarSymbol.GateID );
SCH_SHEET_PATH sheetpath;
SCH_SHEET* kiSheet = mSheetMap.at( aCadstarSymbol.LayerID );
mRootSheet->LocatePathOfScreen( kiSheet->GetScreen(), &sheetpath );
SCH_SHEET* kiSheet = m_sheetMap.at( aCadstarSymbol.LayerID );
m_rootSheet->LocatePathOfScreen( kiSheet->GetScreen(), &sheetpath );
SCH_COMPONENT* component = new SCH_COMPONENT( aKiCadPart, libId, &sheetpath, unit );
@ -1487,7 +1487,7 @@ SCH_COMPONENT* CADSTAR_SCH_ARCHIVE_LOADER::loadSchematicSymbol(
component->SetOrientation( compOrientation );
if( mSheetMap.find( aCadstarSymbol.LayerID ) == mSheetMap.end() )
if( m_sheetMap.find( aCadstarSymbol.LayerID ) == m_sheetMap.end() )
{
wxLogError(
wxString::Format( _( "Symbol '%s' references sheet ID '%s' which does not exist in "
@ -1502,9 +1502,9 @@ SCH_COMPONENT* CADSTAR_SCH_ARCHIVE_LOADER::loadSchematicSymbol(
wxString partGateIndex = aCadstarSymbol.PartRef.RefID + gate;
//Handle pin swaps
if( mPinNumsMap.find( partGateIndex ) != mPinNumsMap.end() )
if( m_pinNumsMap.find( partGateIndex ) != m_pinNumsMap.end() )
{
TERMINAL_TO_PINNUM_MAP termNumMap = mPinNumsMap.at( partGateIndex );
TERMINAL_TO_PINNUM_MAP termNumMap = m_pinNumsMap.at( partGateIndex );
std::map<wxString, LIB_PIN*> pinNumToLibPinMap;
@ -1861,10 +1861,10 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadFigure( const FIGURE& aCadstarFigure,
void CADSTAR_SCH_ARCHIVE_LOADER::loadSheetAndChildSheets(
LAYER_ID aCadstarSheetID, wxPoint aPosition, wxSize aSheetSize, const SCH_SHEET_PATH& aParentSheet )
{
wxCHECK_MSG( mSheetMap.find( aCadstarSheetID ) == mSheetMap.end(), , "Sheet already loaded!" );
wxCHECK_MSG( m_sheetMap.find( aCadstarSheetID ) == m_sheetMap.end(), , "Sheet already loaded!" );
SCH_SHEET* sheet = new SCH_SHEET( aParentSheet.Last(), aPosition );
SCH_SCREEN* screen = new SCH_SCREEN( mSchematic );
SCH_SCREEN* screen = new SCH_SCREEN( m_schematic );
SCH_SHEET_PATH instance( aParentSheet );
sheet->SetSize( aSheetSize );
@ -1894,7 +1894,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadSheetAndChildSheets(
wxString pageNumStr = wxString::Format( "%d", getSheetNumber( aCadstarSheetID ) );
sheet->SetPageNumber( instance, pageNumStr );
mSheetMap.insert( { aCadstarSheetID, sheet } );
m_sheetMap.insert( { aCadstarSheetID, sheet } );
loadChildSheets( aCadstarSheetID, instance );
}
@ -1903,7 +1903,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadSheetAndChildSheets(
void CADSTAR_SCH_ARCHIVE_LOADER::loadChildSheets(
LAYER_ID aCadstarSheetID, const SCH_SHEET_PATH& aSheet )
{
wxCHECK_MSG( mSheetMap.find( aCadstarSheetID ) != mSheetMap.end(), ,
wxCHECK_MSG( m_sheetMap.find( aCadstarSheetID ) != m_sheetMap.end(), ,
"FIXME! Parent sheet should be loaded before attempting to load subsheets" );
for( std::pair<BLOCK_ID, BLOCK> blockPair : Schematic.Blocks )
@ -1949,7 +1949,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadChildSheets(
if( block.HasBlockLabel )
{
// Add the block label as a separate field
SCH_SHEET* loadedSheet = mSheetMap.at( block.AssocLayerID );
SCH_SHEET* loadedSheet = m_sheetMap.at( block.AssocLayerID );
SCH_FIELDS fields = loadedSheet->GetFields();
for( SCH_FIELD& field : fields )
@ -2025,7 +2025,7 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadItemOntoKiCadSheet( LAYER_ID aCadstarSheetI
{
LAYER_ID sheetID = sheetPair.first;
duplicateItem = aItem->Duplicate();
mSheetMap.at( sheetID )->GetScreen()->Append( aItem->Duplicate() );
m_sheetMap.at( sheetID )->GetScreen()->Append( aItem->Duplicate() );
}
//Get rid of the extra copy:
@ -2039,9 +2039,9 @@ void CADSTAR_SCH_ARCHIVE_LOADER::loadItemOntoKiCadSheet( LAYER_ID aCadstarSheetI
}
else
{
if( mSheetMap.find( aCadstarSheetID ) != mSheetMap.end() )
if( m_sheetMap.find( aCadstarSheetID ) != m_sheetMap.end() )
{
mSheetMap.at( aCadstarSheetID )->GetScreen()->Append( aItem );
m_sheetMap.at( aCadstarSheetID )->GetScreen()->Append( aItem );
}
else
{
@ -2087,7 +2087,7 @@ int CADSTAR_SCH_ARCHIVE_LOADER::getLineThickness( const LINECODE_ID& aCadstarLin
{
wxCHECK( Assignments.Codedefs.LineCodes.find( aCadstarLineCodeID )
!= Assignments.Codedefs.LineCodes.end(),
mSchematic->Settings().m_DefaultWireThickness );
m_schematic->Settings().m_DefaultWireThickness );
return getKiCadLength( Assignments.Codedefs.LineCodes.at( aCadstarLineCodeID ).Width );
}
@ -2382,8 +2382,8 @@ wxPoint CADSTAR_SCH_ARCHIVE_LOADER::getKiCadPoint( wxPoint aCadstarPoint )
{
wxPoint retval;
retval.x = ( aCadstarPoint.x - mDesignCenter.x ) * KiCadUnitMultiplier;
retval.y = -( aCadstarPoint.y - mDesignCenter.y ) * KiCadUnitMultiplier;
retval.x = ( aCadstarPoint.x - m_designCenter.x ) * KiCadUnitMultiplier;
retval.y = -( aCadstarPoint.y - m_designCenter.y ) * KiCadUnitMultiplier;
return retval;
}

50
eeschema/sch_plugins/cadstar/cadstar_sch_archive_loader.h
View File

@ -55,11 +55,11 @@ public:
explicit CADSTAR_SCH_ARCHIVE_LOADER( wxString aFilename )
: CADSTAR_SCH_ARCHIVE_PARSER( aFilename )
{
mSchematic = nullptr;
mRootSheet = nullptr;
mPlugin = nullptr;
mDesignCenter.x = 0;
mDesignCenter.y = 0;
m_schematic = nullptr;
m_rootSheet = nullptr;
m_plugin = nullptr;
m_designCenter.x = 0;
m_designCenter.y = 0;
}
@ -72,35 +72,38 @@ public:
* @param aSchematic Schematic to add the design onto
* @param aRootSheet Root sheet to add the design onto
*/
void Load( ::SCHEMATIC* aSchematic, ::SCH_SHEET* aRootSheet,
void Load( SCHEMATIC* aSchematic, SCH_SHEET* aRootSheet,
SCH_PLUGIN::SCH_PLUGIN_RELEASER* aSchPlugin, const wxFileName& aLibraryFileName );
private:
typedef std::pair<BLOCK_ID, TERMINAL_ID> BLOCK_PIN_ID;
/**
* Map between a terminal ID in a symbol definition to the pin number that should
* be imported into KiCad.
*/
typedef std::map<TERMINAL_ID, wxString> TERMINAL_TO_PINNUM_MAP;
::SCHEMATIC* mSchematic;
::SCH_SHEET* mRootSheet;
SCH_PLUGIN::SCH_PLUGIN_RELEASER* mPlugin;
wxFileName mLibraryFileName;
wxPoint mDesignCenter; ///< Used for calculating the required
///< offset to apply to the Cadstar design
///< so that it fits in KiCad canvas
std::set<HATCHCODE_ID> mHatchcodesTested; ///< Used by checkAndLogHatchCode() to
///< avoid multiple duplicate warnings
std::map<LAYER_ID, SCH_SHEET*> mSheetMap; ///< Map between Cadstar and KiCad Sheets
SCHEMATIC* m_schematic;
SCH_SHEET* m_rootSheet;
SCH_PLUGIN::SCH_PLUGIN_RELEASER* m_plugin;
wxFileName m_libraryFileName;
wxPoint m_designCenter; ///< Used for calculating the required
///< offset to apply to the Cadstar design
///< so that it fits in KiCad canvas
std::map<LAYER_ID, SCH_SHEET*> m_sheetMap; ///< Map between Cadstar and KiCad Sheets
std::map<BLOCK_PIN_ID, SCH_HIERLABEL*>
mSheetPinMap; ///< Map between Cadstar and KiCad Sheets Pins
std::map<PART_ID, LIB_PART*> mPartMap; ///< Map between Cadstar and KiCad Parts
std::map<PART_ID, TERMINAL_TO_PINNUM_MAP> mPinNumsMap; ///< Map of pin numbers
m_sheetPinMap; ///< Map between Cadstar and KiCad Sheets Pins
std::map<PART_ID, LIB_PART*> m_partMap; ///< Map between Cadstar and KiCad Parts
std::map<PART_ID, TERMINAL_TO_PINNUM_MAP> m_pinNumsMap; ///< Map of pin numbers in CADSTAR parts
std::map<SYMDEF_ID, LIB_PART*>
mPowerSymLibMap; ///< Map between Cadstar and KiCad Power Symbol Library items
m_powerSymLibMap; ///< Map between Cadstar and KiCad Power Symbol Library items
std::map<SYMBOL_ID, SCH_COMPONENT*>
mPowerSymMap; ///< Map between Cadstar and KiCad Power Symbols
m_powerSymMap; ///< Map between Cadstar and KiCad Power Symbols
std::map<SYMBOL_ID, SCH_GLOBALLABEL*>
mGlobLabelMap; ///< Map between Cadstar and KiCad Global Labels
std::map<BUS_ID, std::shared_ptr<BUS_ALIAS>> mBusesMap; ///< Map between Cadstar and KiCad Buses
m_globalLabelsMap; ///< Map between Cadstar and KiCad Global Labels
std::map<BUS_ID, std::shared_ptr<BUS_ALIAS>> m_busesMap; ///< Map of Cadstar and KiCad Buses
void loadSheets();
void loadHierarchicalSheetPins();
@ -197,7 +200,6 @@ private:
int getKiCadUnitNumberFromGate( const GATE_ID& aCadstarGateID );
LABEL_SPIN_STYLE getSpinStyle( const long long& aCadstarOrientation, bool aMirror );
LABEL_SPIN_STYLE getSpinStyleDeciDeg( const double& aOrientationDeciDeg );
SCH_FIELD* getFieldByName( SCH_COMPONENT* aComponent );
//General Graphical manipulation functions
std::pair<wxPoint, wxSize> getFigureExtentsKiCad( const FIGURE& aCadstarFigure );

18
eeschema/sch_plugins/cadstar/cadstar_sch_archive_parser.cpp
View File

@ -41,7 +41,7 @@ void CADSTAR_SCH_ARCHIVE_PARSER::Parse()
{
if( cNode->GetName() == wxT( "HEADER" ) )
{
Header.Parse( cNode, &mContext );
Header.Parse( cNode, &m_context );
switch( Header.Resolution )
{
@ -56,11 +56,11 @@ void CADSTAR_SCH_ARCHIVE_PARSER::Parse()
}
else if( cNode->GetName() == wxT( "ASSIGNMENTS" ) )
{
Assignments.Parse( cNode, &mContext );
Assignments.Parse( cNode, &m_context );
}
else if( cNode->GetName() == wxT( "LIBRARY" ) )
{
Library.Parse( cNode, &mContext );
Library.Parse( cNode, &m_context );
}
else if( cNode->GetName() == wxT( "DEFAULTS" ) )
{
@ -70,15 +70,15 @@ void CADSTAR_SCH_ARCHIVE_PARSER::Parse()
}
else if( cNode->GetName() == wxT( "PARTS" ) )
{
Parts.Parse( cNode, &mContext );
Parts.Parse( cNode, &m_context );
}
else if( cNode->GetName() == wxT( "SHEETS" ) )
{
Sheets.Parse( cNode, &mContext );
Sheets.Parse( cNode, &m_context );
}
else if( cNode->GetName() == wxT( "SCHEMATIC" ) )
{
Schematic.Parse( cNode, &mContext );
Schematic.Parse( cNode, &m_context );
}
else if( cNode->GetName() == wxT( "DISPLAY" ) )
{
@ -90,7 +90,7 @@ void CADSTAR_SCH_ARCHIVE_PARSER::Parse()
{
if( subNode->GetName() == wxT( "ATTRCOLORS" ) )
{
AttrColors.Parse( subNode, &mContext );
AttrColors.Parse( subNode, &m_context );
}
else if( subNode->GetName() == wxT( "SCMITEMCOLORS" ) )
{
@ -105,7 +105,7 @@ void CADSTAR_SCH_ARCHIVE_PARSER::Parse()
for( ; sub3Node; sub3Node = sub3Node->GetNext() )
{
if( sub3Node->GetName() == wxT( "PARTNAMECOL" ) )
SymbolPartNameColor.Parse( sub3Node, &mContext );
SymbolPartNameColor.Parse( sub3Node, &m_context );
}
}
}
@ -1103,7 +1103,7 @@ void CADSTAR_SCH_ARCHIVE_PARSER::NET_SCH::Parse( XNODE* aNode, PARSER_CONTEXT* a
}
void CADSTAR_SCH_ARCHIVE_PARSER::SCHEMATIC::Parse( XNODE* aNode, PARSER_CONTEXT* aContext )
void CADSTAR_SCH_ARCHIVE_PARSER::CADSTAR_SCHEMATIC::Parse( XNODE* aNode, PARSER_CONTEXT* aContext )
{
wxCHECK( aNode->GetName() == wxT( "SCHEMATIC" ), );

20
eeschema/sch_plugins/cadstar/cadstar_sch_archive_parser.h
View File

@ -423,7 +423,7 @@ public:
};
struct SCHEMATIC : PARSER
struct CADSTAR_SCHEMATIC : PARSER
{
std::map<GROUP_ID, GROUP> Groups;
std::map<REUSEBLOCK_ID, REUSEBLOCK> ReuseBlocks;
@ -441,15 +441,15 @@ public:
};
wxString Filename;
HEADER Header;
ASSIGNMENTS_SCM Assignments;
LIBRARY_SCM Library;
PARTS Parts;
SHEETS Sheets;
SCHEMATIC Schematic;
ATTRCOLORS AttrColors;
PARTNAMECOL SymbolPartNameColor;
wxString Filename;
HEADER Header;
ASSIGNMENTS_SCM Assignments;
LIBRARY_SCM Library;
PARTS Parts;
SHEETS Sheets;
CADSTAR_SCHEMATIC Schematic;
ATTRCOLORS AttrColors;
PARTNAMECOL SymbolPartNameColor;
double KiCadUnitMultiplier; ///<Use this value to convert units in this CSA file to KiCad units

279
pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.cpp
View File

@ -41,10 +41,10 @@
#include <limits> // std::numeric_limits
void CADSTAR_PCB_ARCHIVE_LOADER::Load( ::BOARD* aBoard, ::PROJECT* aProject )
void CADSTAR_PCB_ARCHIVE_LOADER::Load( BOARD* aBoard, PROJECT* aProject )
{
mBoard = aBoard;
mProject = aProject;
m_board = aBoard;
m_project = aProject;
Parse();
@ -71,7 +71,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::Load( ::BOARD* aBoard, ::PROJECT* aProject )
(double) maxDesignSizekicad / PCB_IU_PER_MM ) );
}
mDesignCenter =
m_designCenter =
( Assignments.Technology.DesignArea.first + Assignments.Technology.DesignArea.second )
/ 2;
@ -133,7 +133,7 @@ std::vector<FOOTPRINT*> CADSTAR_PCB_ARCHIVE_LOADER::GetLoadedLibraryFootpints()
{
std::vector<FOOTPRINT*> retval;
for( std::pair<SYMDEF_ID, FOOTPRINT*> fpPair : mLibraryMap )
for( std::pair<SYMDEF_ID, FOOTPRINT*> fpPair : m_libraryMap )
{
retval.push_back( static_cast<FOOTPRINT*>( fpPair.second->Clone() ) );
}
@ -146,7 +146,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::logBoardStackupWarning(
const wxString& aCadstarLayerName,
const PCB_LAYER_ID& aKiCadLayer )
{
if( mLogLayerWarnings )
if( m_logLayerWarnings )
{
wxLogWarning( wxString::Format(
_( "The CADSTAR layer '%s' has no KiCad equivalent. All elements on this "
@ -159,7 +159,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::logBoardStackupWarning(
void CADSTAR_PCB_ARCHIVE_LOADER::logBoardStackupMessage( const wxString& aCadstarLayerName,
const PCB_LAYER_ID& aKiCadLayer )
{
if( mLogLayerWarnings )
if( m_logLayerWarnings )
{
wxLogMessage( wxString::Format(
_( "The CADSTAR layer '%s' has been assumed to be a technical layer. All "
@ -170,7 +170,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::logBoardStackupMessage( const wxString& aCadsta
void CADSTAR_PCB_ARCHIVE_LOADER::initStackupItem( const LAYER& aCadstarLayer,
::BOARD_STACKUP_ITEM* aKiCadItem,
BOARD_STACKUP_ITEM* aKiCadItem,
int aDielectricSublayer )
{
if( !aCadstarLayer.MaterialId.IsEmpty() )
@ -280,12 +280,12 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadBoardStackup()
// Create a new stackup from default stackup list
BOARD_STACKUP& stackup = mBoard->GetDesignSettings().GetStackupDescriptor();
BOARD_STACKUP& stackup = m_board->GetDesignSettings().GetStackupDescriptor();
stackup.RemoveAll();
mBoard->SetEnabledLayers( LSET::AllLayersMask() );
mBoard->SetVisibleLayers( LSET::AllLayersMask() );
mBoard->SetCopperLayerCount( totalCopperLayers );
stackup.BuildDefaultStackupList( &mBoard->GetDesignSettings(), totalCopperLayers );
m_board->SetEnabledLayers( LSET::AllLayersMask() );
m_board->SetVisibleLayers( LSET::AllLayersMask() );
m_board->SetCopperLayerCount( totalCopperLayers );
stackup.BuildDefaultStackupList( &m_board->GetDesignSettings(), totalCopperLayers );
size_t stackIndex = 0;
@ -318,7 +318,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadBoardStackup()
case LAYER_TYPE::POWER:
copperType = LAYER_T::LT_POWER;
mPowerPlaneLayers.push_back( copperLayer.ID ); //need to add a Copper zone
m_powerPlaneLayers.push_back( copperLayer.ID ); //need to add a Copper zone
break;
default:
@ -326,10 +326,9 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadBoardStackup()
break;
}
mBoard->SetLayerType( item->GetBrdLayerId(), copperType );
mBoard->SetLayerName( item->GetBrdLayerId(), item->GetLayerName() );
mCopperLayers.insert( { copperLayer.PhysicalLayer, copperLayer.ID } );
mLayermap.insert( { copperLayer.ID, item->GetBrdLayerId() } );
m_board->SetLayerType( item->GetBrdLayerId(), copperType );
m_board->SetLayerName( item->GetBrdLayerId(), item->GetLayerName() );
m_layermap.insert( { copperLayer.ID, item->GetBrdLayerId() } );
}
}
else if( item->GetType() == BOARD_STACKUP_ITEM_TYPE::BS_ITEM_TYPE_DIELECTRIC )
@ -395,8 +394,8 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadBoardStackup()
item->AddDielectricPrms( dielectricSublayer );
initStackupItem( dielectricLayer, item, dielectricSublayer );
mBoard->SetLayerName( item->GetBrdLayerId(), item->GetLayerName() );
mLayermap.insert( { dielectricLayer.ID, item->GetBrdLayerId() } );
m_board->SetLayerName( item->GetBrdLayerId(), item->GetLayerName() );
m_layermap.insert( { dielectricLayer.ID, item->GetBrdLayerId() } );
++dielectricSublayer;
}
@ -538,21 +537,21 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadBoardStackup()
break;
}
mLayermap.insert( { curLayer.ID, kicadLayerID } );
m_layermap.insert( { curLayer.ID, kicadLayerID } );
}
}
void CADSTAR_PCB_ARCHIVE_LOADER::remapUnsureLayers()
{
LSET enabledLayers = mBoard->GetEnabledLayers();
LSET enabledLayers = m_board->GetEnabledLayers();
LSET validRemappingLayers = enabledLayers | LSET::AllBoardTechMask() |
LSET::UserMask() | LSET::UserDefinedLayers();
std::vector<INPUT_LAYER_DESC> inputLayers;
std::map<wxString, LAYER_ID> cadstarLayerNameMap;
for( std::pair<LAYER_ID, PCB_LAYER_ID> layerPair : mLayermap )
for( std::pair<LAYER_ID, PCB_LAYER_ID> layerPair : m_layermap )
{
LAYER* curLayer = &Assignments.Layerdefs.Layers.at( layerPair.first );
@ -579,7 +578,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::remapUnsureLayers()
return;
// Callback:
std::map<wxString, PCB_LAYER_ID> reMappedLayers = mLayerMappingHandler( inputLayers );
std::map<wxString, PCB_LAYER_ID> reMappedLayers = m_layerMappingHandler( inputLayers );
for( std::pair<wxString, PCB_LAYER_ID> layerPair : reMappedLayers )
{
@ -590,18 +589,18 @@ void CADSTAR_PCB_ARCHIVE_LOADER::remapUnsureLayers()
}
LAYER_ID cadstarLayerID = cadstarLayerNameMap.at( layerPair.first );
mLayermap.at( cadstarLayerID ) = layerPair.second;
m_layermap.at( cadstarLayerID ) = layerPair.second;
enabledLayers |= LSET( layerPair.second );
}
mBoard->SetEnabledLayers( enabledLayers );
mBoard->SetVisibleLayers( enabledLayers );
m_board->SetEnabledLayers( enabledLayers );
m_board->SetVisibleLayers( enabledLayers );
}
void CADSTAR_PCB_ARCHIVE_LOADER::loadDesignRules()
{
BOARD_DESIGN_SETTINGS& ds = mBoard->GetDesignSettings();
BOARD_DESIGN_SETTINGS& ds = m_board->GetDesignSettings();
std::map<SPACINGCODE_ID, SPACINGCODE>& spacingCodes = Assignments.Codedefs.SpacingCodes;
auto applyRule =
@ -625,8 +624,8 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadDesignRules()
ds.m_MinThroughDrill = 0; // CADSTAR does not specify a minimum hole size
ds.m_HoleClearance = ds.m_CopperEdgeClearance; // Not specified, assumed same as edge
auto applyNetClassRule = [&]( wxString aID, ::NETCLASS* aNetClassPtr,
void ( ::NETCLASS::*aFunc )( int ) ) {
auto applyNetClassRule = [&]( wxString aID, NETCLASS* aNetClassPtr,
void ( NETCLASS::*aFunc )( int ) ) {
int value = -1;
applyRule( aID, &value );
@ -636,7 +635,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadDesignRules()
applyNetClassRule( "T_T", ds.GetDefault(), &::NETCLASS::SetClearance );
mBoard->m_LegacyNetclassesLoaded = true;
m_board->m_LegacyNetclassesLoaded = true;
wxLogWarning( _( "KiCad design rules are different from CADSTAR ones. Only the compatible "
"design rules were imported. It is recommended that you review the design "
@ -653,7 +652,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadComponentLibrary()
wxString fpName = component.ReferenceName + ( ( component.Alternate.size() > 0 ) ?
( wxT( " (" ) + component.Alternate + wxT( ")" ) ) :
wxT( "" ) );
FOOTPRINT* footprint = new FOOTPRINT( mBoard );
FOOTPRINT* footprint = new FOOTPRINT( m_board );
footprint->SetPosition( getKiCadPoint( component.Origin ) );
LIB_ID libID;
@ -665,7 +664,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadComponentLibrary()
loadLibraryAreas( component, footprint );
loadLibraryPads( component, footprint );
mLibraryMap.insert( std::make_pair( key, footprint ) );
m_libraryMap.insert( std::make_pair( key, footprint ) );
}
}
@ -954,7 +953,7 @@ PAD* CADSTAR_PCB_ARCHIVE_LOADER::getKiCadPad( const COMPONENT_PAD& aCadstarPad,
{
SHAPE_POLY_SET padOutline;
PCB_LAYER_ID layer = lset.Seq().at( 0 );
int maxError = mBoard->GetDesignSettings().m_MaxError;
int maxError = m_board->GetDesignSettings().m_MaxError;
pad->SetPosition( { 0, 0 } );
pad->SetPos0( { 0, 0 } );
@ -987,14 +986,14 @@ PAD* CADSTAR_PCB_ARCHIVE_LOADER::getKiCadPad( const COMPONENT_PAD& aCadstarPad,
csPadcode.SlotOrientation = 0;
drillOffset = { 0, 0 };
if( mPadcodesTested.find( csPadcode.ID ) == mPadcodesTested.end() )
if( m_padcodesTested.find( csPadcode.ID ) == m_padcodesTested.end() )
{
wxLogError( wxString::Format(
_( "The CADSTAR pad definition '%s' has the hole shape outside the "
"pad shape. The hole has been moved to the center of the pad." ),
csPadcode.Name ) );
mPadcodesTested.insert( csPadcode.ID );
m_padcodesTested.insert( csPadcode.ID );
}
}
@ -1032,13 +1031,13 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadGroups()
{
GROUP& csGroup = groupPair.second;
PCB_GROUP* kiGroup = new PCB_GROUP( mBoard );
PCB_GROUP* kiGroup = new PCB_GROUP( m_board );
mBoard->Add( kiGroup );
m_board->Add( kiGroup );
kiGroup->SetName( csGroup.Name );
kiGroup->SetLocked( csGroup.Fixed );
mGroupMap.insert( { csGroup.ID, kiGroup } );
m_groupMap.insert( { csGroup.ID, kiGroup } );
}
//now add any groups to their parent group
@ -1048,14 +1047,14 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadGroups()
if( !csGroup.GroupID.IsEmpty() )
{
if( mGroupMap.find( csGroup.ID ) == mGroupMap.end() )
if( m_groupMap.find( csGroup.ID ) == m_groupMap.end() )
{
THROW_IO_ERROR( wxString::Format(
_( "The file appears to be corrupt. Unable to find group ID %s "
"in the group definitions." ),
csGroup.ID ) );
}
else if( mGroupMap.find( csGroup.ID ) == mGroupMap.end() )
else if( m_groupMap.find( csGroup.ID ) == m_groupMap.end() )
{
THROW_IO_ERROR( wxString::Format(
_( "The file appears to be corrupt. Unable to find sub group %s "
@ -1064,8 +1063,8 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadGroups()
}
else
{
PCB_GROUP* kiCadGroup = mGroupMap.at( csGroup.ID );
PCB_GROUP* parentGroup = mGroupMap.at( csGroup.GroupID );
PCB_GROUP* kiCadGroup = m_groupMap.at( csGroup.ID );
PCB_GROUP* parentGroup = m_groupMap.at( csGroup.GroupID );
parentGroup->AddItem( kiCadGroup );
}
}
@ -1075,13 +1074,13 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadGroups()
void CADSTAR_PCB_ARCHIVE_LOADER::loadBoards()
{
for( std::pair<BOARD_ID, BOARD> boardPair : Layout.Boards )
for( std::pair<BOARD_ID, CADSTAR_BOARD> boardPair : Layout.Boards )
{
BOARD& board = boardPair.second;
CADSTAR_BOARD& board = boardPair.second;
GROUP_ID boardGroup = createUniqueGroupID( wxT( "Board" ) );
drawCadstarShape( board.Shape, PCB_LAYER_ID::Edge_Cuts,
getLineThickness( board.LineCodeID ), wxString::Format( "BOARD %s", board.ID ),
mBoard, boardGroup );
m_board, boardGroup );
if( !board.GroupID.IsEmpty() )
{
@ -1099,7 +1098,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadFigures()
{
FIGURE& fig = figPair.second;
drawCadstarShape( fig.Shape, getKiCadLayer( fig.LayerID ),
getLineThickness( fig.LineCodeID ), wxString::Format( "FIGURE %s", fig.ID ), mBoard,
getLineThickness( fig.LineCodeID ), wxString::Format( "FIGURE %s", fig.ID ), m_board,
fig.GroupID );
//TODO process "swaprule" (doesn't seem to apply to Layout Figures?)
@ -1114,7 +1113,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadTexts()
for( std::pair<TEXT_ID, TEXT> txtPair : Layout.Texts )
{
TEXT& csTxt = txtPair.second;
drawCadstarText( csTxt, mBoard );
drawCadstarText( csTxt, m_board );
}
}
@ -1148,11 +1147,11 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadDimensions()
csDim.ID ) );
}
::ALIGNED_DIMENSION* dimension = nullptr;
ALIGNED_DIMENSION* dimension = nullptr;
if( csDim.Subtype == DIMENSION::SUBTYPE::ORTHOGONAL )
{
dimension = new ::ORTHOGONAL_DIMENSION( mBoard );
dimension = new ORTHOGONAL_DIMENSION( m_board );
ORTHOGONAL_DIMENSION* orDim = static_cast<ORTHOGONAL_DIMENSION*>( dimension );
if( csDim.ExtensionLineParams.Start.x == csDim.Line.Start.x )
@ -1162,10 +1161,10 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadDimensions()
}
else
{
dimension = new ::ALIGNED_DIMENSION( mBoard );
dimension = new ALIGNED_DIMENSION( m_board );
}
mBoard->Add( dimension, ADD_MODE::APPEND );
m_board->Add( dimension, ADD_MODE::APPEND );
applyDimensionSettings( csDim, dimension );
dimension->SetExtensionHeight(
@ -1211,8 +1210,8 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadDimensions()
if( csDim.Line.Style == DIMENSION::LINE::STYLE::INTERNAL )
{
// "internal" is a simple double sided arrow from start to end (no extension lines)
::ALIGNED_DIMENSION* dimension = new ::ALIGNED_DIMENSION( mBoard );
mBoard->Add( dimension, ADD_MODE::APPEND );
ALIGNED_DIMENSION* dimension = new ALIGNED_DIMENSION( m_board );
m_board->Add( dimension, ADD_MODE::APPEND );
applyDimensionSettings( csDim, dimension );
// Lets set again start/end:
@ -1227,8 +1226,8 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadDimensions()
else
{
// "external" is a "leader" style dimension
::LEADER* leaderDim = new ::LEADER( mBoard );
mBoard->Add( leaderDim, ADD_MODE::APPEND );
LEADER* leaderDim = new LEADER( m_board );
m_board->Add( leaderDim, ADD_MODE::APPEND );
applyDimensionSettings( csDim, leaderDim );
leaderDim->SetStart( getKiCadPoint( csDim.Line.End ) );
@ -1318,7 +1317,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadDimensions()
leaderDim->SetEnd( getKiCadPoint( endPoint ) );
leaderDim->Text().SetTextPos( getKiCadPoint( txtPoint ) );
leaderDim->SetText( ParseTextFields( csDim.Text.Text, &mContext ) );
leaderDim->SetText( ParseTextFields( csDim.Text.Text, &m_context ) );
leaderDim->SetPrefix( wxEmptyString );
leaderDim->SetSuffix( wxEmptyString );
leaderDim->SetUnitsFormat( DIM_UNITS_FORMAT::NO_SUFFIX );
@ -1353,9 +1352,9 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadAreas()
if( area.NoVias || area.NoTracks || area.Keepout || area.Routing )
{
ZONE* zone = getZoneFromCadstarShape( area.Shape, getLineThickness( area.LineCodeID ),
mBoard );
m_board );
mBoard->Add( zone, ADD_MODE::APPEND );
m_board->Add( zone, ADD_MODE::APPEND );
if( isLayerSet( area.LayerID ) )
zone->SetLayerSet( getKiCadLayerSet( area.LayerID ) );
@ -1406,9 +1405,9 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadComponents()
if( !comp.VariantID.empty() && comp.VariantParentComponentID != comp.ID )
continue; // Only load master Variant
auto fpIter = mLibraryMap.find( comp.SymdefID );
auto fpIter = m_libraryMap.find( comp.SymdefID );
if( fpIter == mLibraryMap.end() )
if( fpIter == m_libraryMap.end() )
{
THROW_IO_ERROR( wxString::Format( _( "Unable to find component '%s' in the library"
"(Symdef ID: '%s')" ),
@ -1420,7 +1419,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadComponents()
// Use Duplicate() to ensure unique KIID for all objects
FOOTPRINT* footprint = static_cast<FOOTPRINT*>( libFootprint->Duplicate() );
mBoard->Add( footprint, ADD_MODE::APPEND );
m_board->Add( footprint, ADD_MODE::APPEND );
// First lets fix the pad names on the footprint.
// CADSTAR defines the pad name in the PART definition and the SYMDEF (i.e. the PCB
@ -1506,7 +1505,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadComponents()
if( !comp.PartID.IsEmpty() && comp.PartID != wxT( "NO_PART" ) )
footprint->SetDescription( getPart( comp.PartID ).Definition.Name );
mComponentMap.insert( { comp.ID, footprint } );
m_componentMap.insert( { comp.ID, footprint } );
}
}
@ -1557,7 +1556,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadDocumentationSymbols()
drawCadstarShape( fig.Shape, layer, getLineThickness( fig.LineCodeID ),
wxString::Format( "DOCUMENTATION SYMBOL %s, FIGURE %s",
docSymDefinition.ReferenceName, fig.ID ),
mBoard, groupID, moveVector, rotationAngle, scalingFactor,
m_board, groupID, moveVector, rotationAngle, scalingFactor,
centreOfTransform, mirrorInvert );
}
}
@ -1565,7 +1564,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadDocumentationSymbols()
for( std::pair<TEXT_ID, TEXT> textPair : docSymDefinition.Texts )
{
TEXT txt = textPair.second;
drawCadstarText( txt, mBoard, groupID, docSymInstance.LayerID, moveVector,
drawCadstarText( txt, m_board, groupID, docSymInstance.LayerID, moveVector,
rotationAngle, scalingFactor, centreOfTransform, mirrorInvert );
}
}
@ -1580,9 +1579,9 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadTemplates()
int zonelinethickness = 0; // The line thickness in CADSTAR is only for display purposes but
// does not affect the end copper result.
ZONE* zone = getZoneFromCadstarShape( csTemplate.Shape, zonelinethickness, mBoard );
ZONE* zone = getZoneFromCadstarShape( csTemplate.Shape, zonelinethickness, m_board );
mBoard->Add( zone, ADD_MODE::APPEND );
m_board->Add( zone, ADD_MODE::APPEND );
zone->SetZoneName( csTemplate.Name );
zone->SetLayer( getKiCadLayer( csTemplate.LayerID ) );
@ -1665,7 +1664,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadTemplates()
}
else
{
clearance += mBoard->GetDesignSettings().m_MinClearance;
clearance += m_board->GetDesignSettings().m_MinClearance;
}
zone->SetLocalClearance( clearance );
@ -1724,11 +1723,11 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadTemplates()
zone->SetPadConnection( ZONE_CONNECTION::FULL );
}
mLoadedTemplates.insert( { csTemplate.ID, zone } );
m_zonesMap.insert( { csTemplate.ID, zone } );
}
//Now create power plane layers:
for( LAYER_ID layer : mPowerPlaneLayers )
for( LAYER_ID layer : m_powerPlaneLayers )
{
wxASSERT(
Assignments.Layerdefs.Layers.find( layer ) != Assignments.Layerdefs.Layers.end() );
@ -1758,15 +1757,15 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadTemplates()
}
else
{
for( std::pair<BOARD_ID, BOARD> boardPair : Layout.Boards )
for( std::pair<BOARD_ID, CADSTAR_BOARD> boardPair : Layout.Boards )
{
//create a zone in each board shape
BOARD_DESIGN_SETTINGS& bds = mBoard->GetDesignSettings();
BOARD& board = boardPair.second;
BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
CADSTAR_BOARD& board = boardPair.second;
int defaultLineThicknesss = bds.GetLineThickness( PCB_LAYER_ID::Edge_Cuts );
ZONE* zone = getZoneFromCadstarShape( board.Shape, defaultLineThicknesss, mBoard );
ZONE* zone = getZoneFromCadstarShape( board.Shape, defaultLineThicknesss, m_board );
mBoard->Add( zone, ADD_MODE::APPEND );
m_board->Add( zone, ADD_MODE::APPEND );
zone->SetZoneName( powerPlaneLayerName );
zone->SetLayer( getKiCadLayer( layer ) );
@ -1789,7 +1788,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadCoppers()
if( !csCopper.PouredTemplateID.IsEmpty() )
{
ZONE* pouredZone = mLoadedTemplates.at( csCopper.PouredTemplateID );
ZONE* pouredZone = m_zonesMap.at( csCopper.PouredTemplateID );
SHAPE_POLY_SET rawPolys;
int copperWidth = getKiCadLength( getCopperCode( csCopper.CopperCodeID ).CopperWidth );
@ -1850,14 +1849,14 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadCoppers()
// For now we are going to load coppers to a KiCad zone however this isn't perfect
//TODO: Load onto a graphical polygon with a net (when KiCad has this feature)
if( !mDoneCopperWarning )
if( !m_doneCopperWarning )
{
wxLogWarning(
_( "The CADSTAR design contains COPPER elements, which have no direct KiCad "
"equivalent. These have been imported as a KiCad Zone if solid or hatch "
"filled, or as a KiCad Track if the shape was an unfilled outline (open or "
"closed)." ) );
mDoneCopperWarning = true;
m_doneCopperWarning = true;
}
@ -1867,7 +1866,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadCoppers()
std::vector<PCB_SHAPE*> outlineSegments =
getDrawSegmentsFromVertices( csCopper.Shape.Vertices );
std::vector<TRACK*> outlineTracks = makeTracksFromDrawsegments( outlineSegments, mBoard,
std::vector<TRACK*> outlineTracks = makeTracksFromDrawsegments( outlineSegments, m_board,
getKiCadNet( csCopper.NetRef.NetID ), getKiCadLayer( csCopper.LayerID ),
getKiCadLength( getCopperCode( csCopper.CopperCodeID ).CopperWidth ) );
@ -1880,7 +1879,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadCoppers()
std::vector<PCB_SHAPE*> cutoutSeg =
getDrawSegmentsFromVertices( cutout.Vertices );
std::vector<TRACK*> cutoutTracks = makeTracksFromDrawsegments( cutoutSeg, mBoard,
std::vector<TRACK*> cutoutTracks = makeTracksFromDrawsegments( cutoutSeg, m_board,
getKiCadNet( csCopper.NetRef.NetID ), getKiCadLayer( csCopper.LayerID ),
getKiCadLength( getCopperCode( csCopper.CopperCodeID ).CopperWidth ) );
@ -1893,9 +1892,9 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadCoppers()
{
ZONE* zone = getZoneFromCadstarShape( csCopper.Shape,
getKiCadLength( getCopperCode( csCopper.CopperCodeID ).CopperWidth ),
mBoard );
m_board );
mBoard->Add( zone, ADD_MODE::APPEND );
m_board->Add( zone, ADD_MODE::APPEND );
zone->SetZoneName( csCopper.ID );
zone->SetLayer( getKiCadLayer( csCopper.LayerID ) );
@ -1916,7 +1915,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadCoppers()
zone->SetIslandRemovalMode( ISLAND_REMOVAL_MODE::NEVER );
zone->SetPadConnection( ZONE_CONNECTION::FULL );
zone->SetNet( getKiCadNet( csCopper.NetRef.NetID ) );
zone->SetPriority( mLoadedTemplates.size() + 1 ); // Highest priority (always fill first)
zone->SetPriority( m_zonesMap.size() + 1 ); // Highest priority (always fill first)
zone->SetRawPolysList( getKiCadLayer( csCopper.LayerID ), *zone->Outline() );
SHAPE_POLY_SET fillePolys( *zone->Outline() );
@ -1989,27 +1988,27 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadTextVariables()
auto findAndReplaceTextField =
[&]( TEXT_FIELD_NAME aField, wxString aValue )
{
if( mContext.TextFieldToValuesMap.find( aField ) !=
mContext.TextFieldToValuesMap.end() )
if( m_context.TextFieldToValuesMap.find( aField ) !=
m_context.TextFieldToValuesMap.end() )
{
if( mContext.TextFieldToValuesMap.at( aField ) != aValue )
if( m_context.TextFieldToValuesMap.at( aField ) != aValue )
{
mContext.TextFieldToValuesMap.at( aField ) = aValue;
mContext.InconsistentTextFields.insert( aField );
m_context.TextFieldToValuesMap.at( aField ) = aValue;
m_context.InconsistentTextFields.insert( aField );
return false;
}
}
else
{
mContext.TextFieldToValuesMap.insert( { aField, aValue } );
m_context.TextFieldToValuesMap.insert( { aField, aValue } );
}
return true;
};
if( mProject )
if( m_project )
{
std::map<wxString, wxString>& txtVars = mProject->GetTextVars();
std::map<wxString, wxString>& txtVars = m_project->GetTextVars();
// Most of the design text fields can be derived from other elements
if( Layout.VariantHierarchy.Variants.size() > 0 )
@ -2022,15 +2021,15 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadTextVariables()
findAndReplaceTextField( TEXT_FIELD_NAME::DESIGN_TITLE, Header.JobTitle );
for( std::pair<TEXT_FIELD_NAME, wxString> txtvalue : mContext.TextFieldToValuesMap )
for( std::pair<TEXT_FIELD_NAME, wxString> txtvalue : m_context.TextFieldToValuesMap )
{
wxString varName = CadstarToKicadFieldsMap.at( txtvalue.first );
wxString varName = CADSTAR_TO_KICAD_FIELDS.at( txtvalue.first );
wxString varValue = txtvalue.second;
txtVars.insert( { varName, varValue } );
}
for( std::pair<wxString, wxString> txtvalue : mContext.FilenamesToTextMap )
for( std::pair<wxString, wxString> txtvalue : m_context.FilenamesToTextMap )
{
wxString varName = txtvalue.first;
wxString varValue = txtvalue.second;
@ -2102,7 +2101,7 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadNetTracks(
//Todo add real netcode to the tracks
std::vector<TRACK*> tracks =
makeTracksFromDrawsegments( shapes, mBoard, getKiCadNet( aCadstarNetID ) );
makeTracksFromDrawsegments( shapes, m_board, getKiCadNet( aCadstarNetID ) );
//cleanup
for( PCB_SHAPE* shape : shapes )
@ -2113,8 +2112,8 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadNetTracks(
void CADSTAR_PCB_ARCHIVE_LOADER::loadNetVia(
const NET_ID& aCadstarNetID, const NET_PCB::VIA& aCadstarVia )
{
VIA* via = new VIA( mBoard );
mBoard->Add( via, ADD_MODE::APPEND );
VIA* via = new VIA( m_board );
m_board->Add( via, ADD_MODE::APPEND );
VIACODE csViaCode = getViaCode( aCadstarVia.ViaCodeID );
LAYERPAIR csLayerPair = getLayerPair( aCadstarVia.LayerPairID );
@ -2291,13 +2290,13 @@ void CADSTAR_PCB_ARCHIVE_LOADER::drawCadstarText( const TEXT& aCadstarText,
{
txt->SetLayer( layer );
newtxt = static_cast<PCB_TEXT*>( txt->Duplicate() );
mBoard->Add( newtxt, ADD_MODE::APPEND );
m_board->Add( newtxt, ADD_MODE::APPEND );
if( !aCadstarGroupID.IsEmpty() )
addToGroup( aCadstarGroupID, newtxt );
}
mBoard->Remove( txt );
m_board->Remove( txt );
delete txt;
}
else
@ -2904,7 +2903,7 @@ int CADSTAR_PCB_ARCHIVE_LOADER::getLineThickness( const LINECODE_ID& aCadstarLin
{
wxCHECK( Assignments.Codedefs.LineCodes.find( aCadstarLineCodeID )
!= Assignments.Codedefs.LineCodes.end(),
mBoard->GetDesignSettings().GetLineThickness( PCB_LAYER_ID::Edge_Cuts ) );
m_board->GetDesignSettings().GetLineThickness( PCB_LAYER_ID::Edge_Cuts ) );
return getKiCadLength( Assignments.Codedefs.LineCodes.at( aCadstarLineCodeID ).Width );
}
@ -3023,7 +3022,7 @@ double CADSTAR_PCB_ARCHIVE_LOADER::getHatchCodeAngleDegrees(
HATCHCODE hcode = getHatchCode( aCadstarHatchcodeID );
if( hcode.Hatches.size() < 1 )
return mBoard->GetDesignSettings().GetDefaultZoneSettings().m_HatchOrientation;
return m_board->GetDesignSettings().GetDefaultZoneSettings().m_HatchOrientation;
else
return getAngleDegrees( hcode.Hatches.at( 0 ).OrientAngle );
}
@ -3036,7 +3035,7 @@ int CADSTAR_PCB_ARCHIVE_LOADER::getKiCadHatchCodeThickness(
HATCHCODE hcode = getHatchCode( aCadstarHatchcodeID );
if( hcode.Hatches.size() < 1 )
return mBoard->GetDesignSettings().GetDefaultZoneSettings().m_HatchThickness;
return m_board->GetDesignSettings().GetDefaultZoneSettings().m_HatchThickness;
else
return getKiCadLength( hcode.Hatches.at( 0 ).LineWidth );
}
@ -3048,7 +3047,7 @@ int CADSTAR_PCB_ARCHIVE_LOADER::getKiCadHatchCodeGap( const HATCHCODE_ID& aCadst
HATCHCODE hcode = getHatchCode( aCadstarHatchcodeID );
if( hcode.Hatches.size() < 1 )
return mBoard->GetDesignSettings().GetDefaultZoneSettings().m_HatchGap;
return m_board->GetDesignSettings().GetDefaultZoneSettings().m_HatchGap;
else
return getKiCadLength( hcode.Hatches.at( 0 ).Step );
}
@ -3056,15 +3055,15 @@ int CADSTAR_PCB_ARCHIVE_LOADER::getKiCadHatchCodeGap( const HATCHCODE_ID& aCadst
PCB_GROUP* CADSTAR_PCB_ARCHIVE_LOADER::getKiCadGroup( const GROUP_ID& aCadstarGroupID )
{
wxCHECK( mGroupMap.find( aCadstarGroupID ) != mGroupMap.end(), nullptr );
wxCHECK( m_groupMap.find( aCadstarGroupID ) != m_groupMap.end(), nullptr );
return mGroupMap.at( aCadstarGroupID );
return m_groupMap.at( aCadstarGroupID );
}
void CADSTAR_PCB_ARCHIVE_LOADER::checkAndLogHatchCode( const HATCHCODE_ID& aCadstarHatchcodeID )
{
if( mHatchcodesTested.find( aCadstarHatchcodeID ) != mHatchcodesTested.end() )
if( m_hatchcodesTested.find( aCadstarHatchcodeID ) != m_hatchcodesTested.end() )
{
return; //already checked
}
@ -3121,13 +3120,13 @@ void CADSTAR_PCB_ARCHIVE_LOADER::checkAndLogHatchCode( const HATCHCODE_ID& aCads
}
}
mHatchcodesTested.insert( aCadstarHatchcodeID );
m_hatchcodesTested.insert( aCadstarHatchcodeID );
}
}
void CADSTAR_PCB_ARCHIVE_LOADER::applyDimensionSettings( const DIMENSION& aCadstarDim,
::DIMENSION_BASE* aKiCadDim )
DIMENSION_BASE* aKiCadDim )
{
UNITS dimensionUnits = aCadstarDim.LinearUnits;
TEXTCODE txtCode = getTextCode( aCadstarDim.Text.TextCodeID );
@ -3151,10 +3150,10 @@ void CADSTAR_PCB_ARCHIVE_LOADER::applyDimensionSettings( const DIMENSION& aCads
if( startpos != wxNOT_FOUND )
{
prefix = ParseTextFields( aCadstarDim.Text.Text.SubString( 0, startpos - 1 ), &mContext );
prefix = ParseTextFields( aCadstarDim.Text.Text.SubString( 0, startpos - 1 ), &m_context );
wxString remainingStr = aCadstarDim.Text.Text.Mid( startpos );
size_t endpos = remainingStr.Find( "@>" );
suffix = ParseTextFields( remainingStr.Mid( endpos + 2 ), &mContext );
suffix = ParseTextFields( remainingStr.Mid( endpos + 2 ), &m_context );
}
if( suffix.StartsWith( "mm" ) )
@ -3228,15 +3227,15 @@ void CADSTAR_PCB_ARCHIVE_LOADER::calculateZonePriorities()
return winningOverlaps[b].count( a ) > 0;
};
for( std::map<TEMPLATE_ID, ZONE*>::iterator it1 = mLoadedTemplates.begin();
it1 != mLoadedTemplates.end(); ++it1 )
for( std::map<TEMPLATE_ID, ZONE*>::iterator it1 = m_zonesMap.begin();
it1 != m_zonesMap.end(); ++it1 )
{
TEMPLATE thisTemplate = Layout.Templates.at( it1->first );
PCB_LAYER_ID thisLayer = getKiCadLayer( thisTemplate.LayerID );
ZONE* thisZone = it1->second;
for( std::map<TEMPLATE_ID, ZONE*>::iterator it2 = it1;
it2 != mLoadedTemplates.end(); ++it2 )
it2 != m_zonesMap.end(); ++it2 )
{
TEMPLATE otherTemplate = Layout.Templates.at( it2->first );
PCB_LAYER_ID otherLayer = getKiCadLayer( otherTemplate.LayerID );
@ -3318,13 +3317,13 @@ void CADSTAR_PCB_ARCHIVE_LOADER::calculateZonePriorities()
wxASSERT( !isLowerPriority( id, prevID ) );
int newPriority = mLoadedTemplates.at( prevID )->GetPriority();
int newPriority = m_zonesMap.at( prevID )->GetPriority();
// Only increase priority of the current zone
if( isLowerPriority( prevID, id ) )
newPriority++;
mLoadedTemplates.at( id )->SetPriority( newPriority );
m_zonesMap.at( id )->SetPriority( newPriority );
prevID = id;
}
@ -3333,10 +3332,10 @@ void CADSTAR_PCB_ARCHIVE_LOADER::calculateZonePriorities()
FOOTPRINT* CADSTAR_PCB_ARCHIVE_LOADER::getFootprintFromCadstarID( const COMPONENT_ID& aCadstarComponentID )
{
if( mComponentMap.find( aCadstarComponentID ) == mComponentMap.end() )
if( m_componentMap.find( aCadstarComponentID ) == m_componentMap.end() )
return nullptr;
else
return mComponentMap.at( aCadstarComponentID );
return m_componentMap.at( aCadstarComponentID );
}
@ -3344,8 +3343,8 @@ wxPoint CADSTAR_PCB_ARCHIVE_LOADER::getKiCadPoint( wxPoint aCadstarPoint )
{
wxPoint retval;
retval.x = ( aCadstarPoint.x - mDesignCenter.x ) * KiCadUnitMultiplier;
retval.y = -( aCadstarPoint.y - mDesignCenter.y ) * KiCadUnitMultiplier;
retval.x = ( aCadstarPoint.x - m_designCenter.x ) * KiCadUnitMultiplier;
retval.y = -( aCadstarPoint.y - m_designCenter.y ) * KiCadUnitMultiplier;
return retval;
}
@ -3362,9 +3361,9 @@ NETINFO_ITEM* CADSTAR_PCB_ARCHIVE_LOADER::getKiCadNet( const NET_ID& aCadstarNet
{
if( aCadstarNetID.IsEmpty() )
return nullptr;
else if( mNetMap.find( aCadstarNetID ) != mNetMap.end() )
else if( m_netMap.find( aCadstarNetID ) != m_netMap.end() )
{
return mNetMap.at( aCadstarNetID );
return m_netMap.at( aCadstarNetID );
}
else
{
@ -3394,7 +3393,7 @@ NETINFO_ITEM* CADSTAR_PCB_ARCHIVE_LOADER::getKiCadNet( const NET_ID& aCadstarNet
}
}
if( !mDoneNetClassWarning && !csNet.NetClassID.IsEmpty()
if( !m_doneNetClassWarning && !csNet.NetClassID.IsEmpty()
&& csNet.NetClassID != wxT( "NONE" ) )
{
wxLogMessage(
@ -3402,37 +3401,37 @@ NETINFO_ITEM* CADSTAR_PCB_ARCHIVE_LOADER::getKiCadNet( const NET_ID& aCadstarNet
"not have an equivalent to CADSTAR's Net Class so these elements were not "
"imported. Note: KiCad's version of 'Net Class' is closer to CADSTAR's "
"'Net Route Code' (which has been imported for all nets)." ) );
mDoneNetClassWarning = true;
m_doneNetClassWarning = true;
}
if( !mDoneSpacingClassWarning && !csNet.SpacingClassID.IsEmpty()
if( !m_doneSpacingClassWarning && !csNet.SpacingClassID.IsEmpty()
&& csNet.SpacingClassID != wxT( "NONE" ) )
{
wxLogWarning( _( "The CADSTAR design contains nets with a 'Spacing Class' assigned. "
"KiCad does not have an equivalent to CADSTAR's Spacing Class so "
"these elements were not imported. Please review the design rules as "
"copper pours will affected by this." ) );
mDoneSpacingClassWarning = true;
m_doneSpacingClassWarning = true;
}
NETINFO_ITEM* netInfo = new NETINFO_ITEM( mBoard, newName, ++mNumNets );
mBoard->Add( netInfo, ADD_MODE::APPEND );
NETINFO_ITEM* netInfo = new NETINFO_ITEM( m_board, newName, ++m_numNets );
m_board->Add( netInfo, ADD_MODE::APPEND );
if( mNetClassMap.find( csNet.RouteCodeID ) != mNetClassMap.end() )
if( m_netClassMap.find( csNet.RouteCodeID ) != m_netClassMap.end() )
{
NETCLASSPTR netclass = mNetClassMap.at( csNet.RouteCodeID );
NETCLASSPTR netclass = m_netClassMap.at( csNet.RouteCodeID );
netInfo->SetNetClass( netclass );
}
else
{
ROUTECODE rc = getRouteCode( csNet.RouteCodeID );
NETCLASSPTR netclass( new ::NETCLASS( rc.Name ) );
NETCLASSPTR netclass( new NETCLASS( rc.Name ) );
netclass->SetTrackWidth( getKiCadLength( rc.OptimalWidth ) );
netInfo->SetNetClass( netclass );
mNetClassMap.insert( { csNet.RouteCodeID, netclass } );
m_netClassMap.insert( { csNet.RouteCodeID, netclass } );
}
mNetMap.insert( { aCadstarNetID, netInfo } );
m_netMap.insert( { aCadstarNetID, netInfo } );
return netInfo;
}
@ -3517,9 +3516,9 @@ PCB_LAYER_ID CADSTAR_PCB_ARCHIVE_LOADER::getKiCadLayer( const LAYER_ID& aCadstar
return PCB_LAYER_ID::UNDEFINED_LAYER;
}
wxCHECK( mLayermap.find( aCadstarLayerID ) != mLayermap.end(), PCB_LAYER_ID::UNDEFINED_LAYER );
wxCHECK( m_layermap.find( aCadstarLayerID ) != m_layermap.end(), PCB_LAYER_ID::UNDEFINED_LAYER );
return mLayermap.at( aCadstarLayerID );
return m_layermap.at( aCadstarLayerID );
}
@ -3548,9 +3547,9 @@ LSET CADSTAR_PCB_ARCHIVE_LOADER::getKiCadLayerSet( const LAYER_ID& aCadstarLayer
void CADSTAR_PCB_ARCHIVE_LOADER::addToGroup(
const GROUP_ID& aCadstarGroupID, BOARD_ITEM* aKiCadItem )
{
wxCHECK( mGroupMap.find( aCadstarGroupID ) != mGroupMap.end(), );
wxCHECK( m_groupMap.find( aCadstarGroupID ) != m_groupMap.end(), );
PCB_GROUP* parentGroup = mGroupMap.at( aCadstarGroupID );
PCB_GROUP* parentGroup = m_groupMap.at( aCadstarGroupID );
parentGroup->AddItem( aKiCadItem );
}
@ -3561,16 +3560,16 @@ CADSTAR_PCB_ARCHIVE_LOADER::GROUP_ID CADSTAR_PCB_ARCHIVE_LOADER::createUniqueGro
wxString groupName = aName;
int num = 0;
while( mGroupMap.find( groupName ) != mGroupMap.end() )
while( m_groupMap.find( groupName ) != m_groupMap.end() )
{
groupName = aName + wxT( "_" ) + wxString::Format( "%i", ++num );
}
PCB_GROUP* docSymGroup = new PCB_GROUP( mBoard );
mBoard->Add( docSymGroup );
PCB_GROUP* docSymGroup = new PCB_GROUP( m_board );
m_board->Add( docSymGroup );
docSymGroup->SetName( groupName );
GROUP_ID groupID( groupName );
mGroupMap.insert( { groupID, docSymGroup } );
m_groupMap.insert( { groupID, docSymGroup } );
return groupID;
}

99
pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.h
View File

@ -41,22 +41,22 @@ public:
wxString aFilename, LAYER_MAPPING_HANDLER aLayerMappingHandler, bool aLogLayerWarnings )
: CADSTAR_PCB_ARCHIVE_PARSER( aFilename )
{
mLayerMappingHandler = aLayerMappingHandler;
mLogLayerWarnings = aLogLayerWarnings;
mBoard = nullptr;
mProject = nullptr;
mDesignCenter.x = 0;
mDesignCenter.y = 0;
mDoneCopperWarning = false;
mDoneSpacingClassWarning = false;
mDoneNetClassWarning = false;
mNumNets = 0;
m_layerMappingHandler = aLayerMappingHandler;
m_logLayerWarnings = aLogLayerWarnings;
m_board = nullptr;
m_project = nullptr;
m_designCenter.x = 0;
m_designCenter.y = 0;
m_doneCopperWarning = false;
m_doneSpacingClassWarning = false;
m_doneNetClassWarning = false;
m_numNets = 0;
}
~CADSTAR_PCB_ARCHIVE_LOADER()
{
for( std::pair<SYMDEF_ID, FOOTPRINT*> libItem : mLibraryMap )
for( std::pair<SYMDEF_ID, FOOTPRINT*> libItem : m_libraryMap )
{
FOOTPRINT* footprint = libItem.second;
@ -69,7 +69,7 @@ public:
* @brief Loads a CADSTAR PCB Archive file into the KiCad BOARD object given
* @param aBoard
*/
void Load( ::BOARD* aBoard, ::PROJECT* aProject );
void Load( BOARD* aBoard, PROJECT* aProject );
/**
* @brief Return a copy of the loaded library footprints (caller owns the objects)
@ -78,51 +78,49 @@ public:
std::vector<FOOTPRINT*> GetLoadedLibraryFootpints() const;
private:
LAYER_MAPPING_HANDLER mLayerMappingHandler; ///< Callback to get layer mapping
bool mLogLayerWarnings; ///< Used in loadBoardStackup()
::BOARD* mBoard;
::PROJECT* mProject;
std::map<LAYER_ID, PCB_LAYER_ID> mLayermap; ///< Map between Cadstar and KiCad Layers.
LAYER_MAPPING_HANDLER m_layerMappingHandler; ///< Callback to get layer mapping
bool m_logLayerWarnings; ///< Used in loadBoardStackup()
BOARD* m_board;
PROJECT* m_project;
std::map<LAYER_ID, PCB_LAYER_ID> m_layermap; ///< Map between Cadstar and KiCad Layers.
///< Populated by loadBoardStackup().
std::map<SYMDEF_ID, FOOTPRINT*> mLibraryMap; ///< Map between Cadstar and KiCad
std::map<SYMDEF_ID, FOOTPRINT*> m_libraryMap; ///< Map between Cadstar and KiCad
///< components in the library. Populated
///< by loadComponentLibrary(). Owns the
///< FOOTPRINT objects.
std::map<GROUP_ID, PCB_GROUP*> mGroupMap; ///< Map between Cadstar and KiCad
std::map<GROUP_ID, PCB_GROUP*> m_groupMap; ///< Map between Cadstar and KiCad
///< groups. Does NOT ownthe PCB_GROUP
///< objects (these should have been
///< loaded to mBoard).
std::map<COMPONENT_ID, FOOTPRINT*> mComponentMap; ///< Map between Cadstar and KiCad
///< loaded to m_board).
std::map<COMPONENT_ID, FOOTPRINT*> m_componentMap; ///< Map between Cadstar and KiCad
///< components on the board. Does NOT own
///< the FOOTPRINT objects (these should
///< have been loaded to mBoard).
std::map<NET_ID, NETINFO_ITEM*> mNetMap; ///< Map between Cadstar and KiCad Nets
std::map<ROUTECODE_ID, NETCLASSPTR> mNetClassMap; ///< Map between Cadstar and KiCad classes
std::map<PHYSICAL_LAYER_ID, LAYER_ID> mCopperLayers; ///< Map of CADSTAR Physical layers to
///< CADSTAR Layer IDs
std::map<TEMPLATE_ID, ZONE*> mLoadedTemplates; ///< Map between Cadstar and KiCad zones
std::vector<LAYER_ID> mPowerPlaneLayers; ///< List of layers that are marked as
///< have been loaded to m_board).
std::map<NET_ID, NETINFO_ITEM*> m_netMap; ///< Map between Cadstar and KiCad Nets
std::map<ROUTECODE_ID, NETCLASSPTR> m_netClassMap; ///< Map between Cadstar and KiCad classes
std::map<TEMPLATE_ID, ZONE*> m_zonesMap; ///< Map between Cadstar and KiCad zones
std::vector<LAYER_ID> m_powerPlaneLayers; ///< List of layers that are marked as
///< power plane in CADSTAR. This is used
///< by "loadtemplates"
wxPoint mDesignCenter; ///< Used for calculating the required
wxPoint m_designCenter; ///< Used for calculating the required
///< offset to apply to the Cadstar design
///< so that it fits in KiCad canvas
std::set<HATCHCODE_ID> mHatchcodesTested; ///< Used by checkAndLogHatchCode() to
std::set<HATCHCODE_ID> m_hatchcodesTested; ///< Used by checkAndLogHatchCode() to
///< avoid multiple duplicate warnings
std::set<PADCODE_ID> mPadcodesTested; ///< Used by getKiCadPad() to avoid
std::set<PADCODE_ID> m_padcodesTested; ///< Used by getKiCadPad() to avoid
///< multiple duplicate warnings
bool mDoneCopperWarning; ///< Used by loadCoppers() to avoid
bool m_doneCopperWarning; ///< Used by loadCoppers() to avoid
///< multiple duplicate warnings
bool mDoneSpacingClassWarning; ///< Used by getKiCadNet() to avoid
bool m_doneSpacingClassWarning; ///< Used by getKiCadNet() to avoid
///< multiple duplicate warnings
bool mDoneNetClassWarning; ///< Used by getKiCadNet() to avoid
bool m_doneNetClassWarning; ///< Used by getKiCadNet() to avoid
///< multiple duplicate warnings
int mNumNets; ///< Number of nets loaded so far
int m_numNets; ///< Number of nets loaded so far
// Functions for loading individual elements:
void loadBoardStackup();
void remapUnsureLayers(); ///< Callback mLayerMappingHandler for layers we aren't sure of
void remapUnsureLayers(); ///< Callback m_layerMappingHandler for layers we aren't sure of
void loadDesignRules();
void loadComponentLibrary();
void loadGroups();
@ -143,7 +141,7 @@ private:
const PCB_LAYER_ID& aKiCadLayer );
void logBoardStackupMessage( const wxString& aCadstarLayerName,
const PCB_LAYER_ID& aKiCadLayer );
void initStackupItem( const LAYER& aCadstarLayer, ::BOARD_STACKUP_ITEM* aKiCadItem,
void initStackupItem( const LAYER& aCadstarLayer, BOARD_STACKUP_ITEM* aKiCadItem,
int aDielectricSublayer );
void loadLibraryFigures( const SYMDEF_PCB& aComponent, FOOTPRINT* aFootprint );
void loadLibraryCoppers( const SYMDEF_PCB& aComponent, FOOTPRINT* aFootprint );
@ -153,7 +151,8 @@ private:
void loadNetTracks( const NET_ID& aCadstarNetID, const NET_PCB::ROUTE& aCadstarRoute );
void loadNetVia( const NET_ID& aCadstarNetID, const NET_PCB::VIA& aCadstarVia );
void checkAndLogHatchCode( const HATCHCODE_ID& aCadstarHatchcodeID );
void applyDimensionSettings( const DIMENSION& aCadstarDim, ::DIMENSION_BASE* aKiCadDim );
void applyDimensionSettings( const DIMENSION& aCadstarDim, DIMENSION_BASE* aKiCadDim );
/**
* @brief Tries to make a best guess as to the zone priorities based on the pour status.
@ -165,7 +164,7 @@ private:
/**
* @brief
* @param aCadstarText
* @param aContainer to draw on (e.g. mBoard)
* @param aContainer to draw on (e.g. m_board)
* @param aCadstarGroupID to add the text to
* @param aCadstarLayerOverride if not empty, overrides the LayerID in aCadstarText
* @param aMoveVector move draw segment by this amount (in KiCad coordinates)
@ -189,7 +188,7 @@ private:
* @param aCadstarLayerID KiCad layer to draw on
* @param aLineThickness Thickness of line to draw with
* @param aShapeName for reporting warnings/errors to the user
* @param aContainer to draw on (e.g. mBoard)
* @param aContainer to draw on (e.g. m_board)
* @param aCadstarGroupID to add the shape to
* @param aMoveVector move draw segment by this amount (in KiCad coordinates)
* @param aRotationAngle rotate draw segment by this amount (in tenth degrees)
@ -207,11 +206,11 @@ private:
const bool& aMirrorInvert = false );
/**
* @brief Uses PCB_SHAPE to draw the cutouts on mBoard object
* @brief Uses PCB_SHAPE to draw the cutouts on m_board object
* @param aVertices
* @param aKiCadLayer KiCad layer to draw on
* @param aLineThickness Thickness of line to draw with
* @param aContainer to draw on (e.g. mBoard)
* @param aContainer to draw on (e.g. m_board)
* @param aCadstarGroupID to add the shape to
* @param aMoveVector move draw segment by this amount (in KiCad coordinates)
* @param aRotationAngle rotate draw segment by this amount (in tenth degrees)
@ -230,11 +229,11 @@ private:
const bool& aMirrorInvert = false );
/**
* @brief Uses PCB_SHAPE to draw the vertices on mBoard object
* @brief Uses PCB_SHAPE to draw the vertices on m_board object
* @param aCadstarVertices
* @param aKiCadLayer KiCad layer to draw on
* @param aLineThickness Thickness of line to draw with
* @param aContainer to draw on (e.g. mBoard)
* @param aContainer to draw on (e.g. m_board)
* @param aCadstarGroupID to add the shape to
* @param aMoveVector move draw segment by this amount (in KiCad coordinates)
* @param aRotationAngle rotate draw segment by this amount (in tenth degrees)
@ -256,7 +255,7 @@ private:
/**
* @brief Returns a vector of pointers to PCB_SHAPE objects. Caller owns the objects.
* @param aCadstarVertices
* @param aContainer to draw on (e.g. mBoard). Can be nullptr.
* @param aContainer to draw on (e.g. m_board). Can be nullptr.
* @param aCadstarGroupID to add the shape to
* @param aMoveVector move draw segment by this amount (in KiCad coordinates)
* @param aRotationAngle rotate draw segment by this amount (in tenth degrees)
@ -278,7 +277,7 @@ private:
* @brief Returns a pointer to a PCB_SHAPE object. Caller owns the object.
* @param aCadstarStartPoint
* @param aCadstarVertex
* @param aContainer to draw on (e.g. mBoard). Can be nullptr.
* @param aContainer to draw on (e.g. m_board). Can be nullptr.
* @param aCadstarGroupID to add the shape to
* @param aMoveVector move draw segment by this amount (in KiCad coordinates)
* @param aRotationAngle rotate draw segment by this amount (in tenth degrees)
@ -311,7 +310,7 @@ private:
* @brief Returns a SHAPE_POLY_SET object from a Cadstar SHAPE
* @param aCadstarShape
* @param aLineThickness Thickness of line is used for expanding the polygon by half.
* @param aContainer to draw on (e.g. mBoard). Can be nullptr.
* @param aContainer to draw on (e.g. m_board). Can be nullptr.
* @param aMoveVector move draw segment by this amount (in KiCad coordinates)
* @param aRotationAngle rotate draw segment by this amount (in tenth degrees)
* @param aScalingFactor scale draw segment by this amount
@ -440,8 +439,8 @@ private:
double getPolarAngle( wxPoint aPoint );
/**
* @brief Searches mNetMap and returns the NETINFO_ITEM pointer if exists. Otherwise
* creates a new one and adds it to mBoard.
* @brief Searches m_netMap and returns the NETINFO_ITEM pointer if exists. Otherwise
* creates a new one and adds it to m_board.
* @param aCadstarNetID
* @return
*/
@ -486,7 +485,7 @@ private:
void addToGroup( const GROUP_ID& aCadstarGroupID, BOARD_ITEM* aKiCadItem );
/**
* @brief Adds a new PCB_GROUP* to mGroupMap
* @brief Adds a new PCB_GROUP* to m_groupMap
* @param aName Name to give the group. If name already exists, append "_1", "_2", etc.
* to the end to ensure it is unique
* @return

14
pcbnew/plugins/cadstar/cadstar_pcb_archive_parser.cpp
View File

@ -41,7 +41,7 @@ void CADSTAR_PCB_ARCHIVE_PARSER::Parse()
{
if( cNode->GetName() == wxT( "HEADER" ) )
{
Header.Parse( cNode, &mContext );
Header.Parse( cNode, &m_context );
switch( Header.Resolution )
{
@ -72,11 +72,11 @@ void CADSTAR_PCB_ARCHIVE_PARSER::Parse()
}
else if( cNode->GetName() == wxT( "ASSIGNMENTS" ) )
{
Assignments.Parse( cNode, &mContext );
Assignments.Parse( cNode, &m_context );
}
else if( cNode->GetName() == wxT( "LIBRARY" ) )
{
Library.Parse( cNode, &mContext );
Library.Parse( cNode, &m_context );
}
else if( cNode->GetName() == wxT( "DEFAULTS" ) )
{
@ -86,11 +86,11 @@ void CADSTAR_PCB_ARCHIVE_PARSER::Parse()
}
else if( cNode->GetName() == wxT( "PARTS" ) )
{
Parts.Parse( cNode, &mContext );
Parts.Parse( cNode, &m_context );
}
else if( cNode->GetName() == wxT( "LAYOUT" ) )
{
Layout.Parse( cNode, &mContext );
Layout.Parse( cNode, &m_context );
}
else if( cNode->GetName() == wxT( "DISPLAY" ) )
{
@ -1598,7 +1598,7 @@ void CADSTAR_PCB_ARCHIVE_PARSER::LIBRARY::Parse( XNODE* aNode, PARSER_CONTEXT* a
}
void CADSTAR_PCB_ARCHIVE_PARSER::BOARD::Parse( XNODE* aNode, PARSER_CONTEXT* aContext )
void CADSTAR_PCB_ARCHIVE_PARSER::CADSTAR_BOARD::Parse( XNODE* aNode, PARSER_CONTEXT* aContext )
{
wxASSERT( aNode->GetName() == wxT( "BOARD" ) );
@ -2473,7 +2473,7 @@ void CADSTAR_PCB_ARCHIVE_PARSER::LAYOUT::Parse( XNODE* aNode, PARSER_CONTEXT* aC
}
else if( cNodeName == wxT( "BOARD" ) )
{
BOARD board;
CADSTAR_BOARD board;
board.Parse( cNode, aContext );
Boards.insert( std::make_pair( board.ID, board ) );
}

8
pcbnew/plugins/cadstar/cadstar_pcb_archive_parser.h
View File

@ -793,7 +793,7 @@ public:
};
struct BOARD : PARSER
struct CADSTAR_BOARD : PARSER
{
BOARD_ID ID;
LINECODE_ID LineCodeID;
@ -801,8 +801,8 @@ public:
std::map<ATTRIBUTE_ID, ATTRIBUTE_VALUE> AttributeValues;
bool Fixed = false;
GROUP_ID GroupID = wxEmptyString; ///< If not empty, this BOARD is part of a group
REUSEBLOCKREF ReuseBlockRef; ///< Normally BOARD cannot be part of a reuseblock,
GROUP_ID GroupID = wxEmptyString; ///< If not empty, this CADSTAR_BOARD is part of a group
REUSEBLOCKREF ReuseBlockRef; ///< Normally CADSTAR_BOARD cannot be part of a reuseblock,
///< but included for completeness
void Parse( XNODE* aNode, PARSER_CONTEXT* aContext ) override;
@ -1178,7 +1178,7 @@ public:
std::map<GROUP_ID, GROUP> Groups;
std::map<REUSEBLOCK_ID, REUSEBLOCK> ReuseBlocks;
std::map<BOARD_ID, BOARD> Boards; ///< Normally CADSTAR only allows one board but
std::map<BOARD_ID, CADSTAR_BOARD> Boards; ///< Normally CADSTAR only allows one board but
///< implemented this as a map just in case
std::map<FIGURE_ID, FIGURE> Figures;
std::map<AREA_ID, AREA> Areas;