Add an optional name property to zones
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@ -150,6 +150,7 @@ mod_text_width
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mode
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model
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module
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name
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net
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net_class
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net_name
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@ -639,11 +639,14 @@ void ZONE_CONTAINER::GetMsgPanelInfo( EDA_DRAW_FRAME* aFrame, std::vector<MSG_PA
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// Display priority level
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msg.Printf( wxT( "%d" ), GetPriority() );
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aList.emplace_back( _( "Priority" ), msg, BLUE );
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aList.emplace_back( _( "Priority" ), msg, BLUE );
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}
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aList.emplace_back( _( "Layer" ), LayerMaskDescribe( GetBoard(), m_layerSet ), DARKGREEN );
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if( !m_zoneName.empty() )
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aList.emplace_back( _( "Name" ), m_zoneName, DARKMAGENTA );
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switch( m_FillMode )
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{
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case ZONE_FILL_MODE::POLYGONS: msg = _( "Solid" ); break;
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@ -105,6 +105,10 @@ public:
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virtual LSET GetLayerSet() const override;
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wxString GetZoneName() const { return m_zoneName; }
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void SetZoneName( const wxString& aName ) { m_zoneName = aName; }
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/** Function GetBoundingBox (virtual)
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* @return an EDA_RECT that is the bounding box of the zone outline
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*/
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@ -763,6 +767,9 @@ protected:
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int m_cornerSmoothingType;
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unsigned int m_cornerRadius;
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/// An optional unique name for this zone, used for identifying it in DRC checking
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wxString m_zoneName;
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LSET m_layerSet;
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/* Priority: when a zone outline is inside and other zone, if its priority is higher
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@ -1792,6 +1792,9 @@ void PCB_IO::format( ZONE_CONTAINER* aZone, int aNestLevel ) const
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m_out->Print( 0, " (tstamp %s)", TO_UTF8( aZone->m_Uuid.AsString() ) );
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if( !aZone->GetZoneName().empty() )
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m_out->Print( 0, " (name %s)", TO_UTF8( aZone->GetZoneName() ) );
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// Save the outline aux info
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std::string hatch;
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@ -69,7 +69,8 @@ class TEXTE_PCB;
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//#define SEXPR_BOARD_FILE_VERSION 20200119 // arcs in tracks
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//#define SEXPR_BOARD_FILE_VERSION 20200512 // page -> paper
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//#define SEXPR_BOARD_FILE_VERSION 20200518 // save hole_to_hole_min
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#define SEXPR_BOARD_FILE_VERSION 20200614 // Add support for fp_rects and gr_rects
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//#define SEXPR_BOARD_FILE_VERSION 20200614 // Add support for fp_rects and gr_rects
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#define SEXPR_BOARD_FILE_VERSION 20200623 // Add name property to zones
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#define CTL_STD_LAYER_NAMES (1 << 0) ///< Use English Standard layer names
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#define CTL_OMIT_NETS (1 << 1) ///< Omit pads net names (useless in library)
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@ -4106,9 +4106,17 @@ ZONE_CONTAINER* PCB_PARSER::parseZONE_CONTAINER( BOARD_ITEM_CONTAINER* aParent )
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}
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break;
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case T_name:
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{
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NextTok();
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zone->SetZoneName( FromUTF8() );
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NeedRIGHT();
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}
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break;
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default:
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Expecting( "net, layer/layers, tstamp, hatch, priority, connect_pads, min_thickness, "
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"fill, polygon, filled_polygon, or fill_segments" );
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"fill, polygon, filled_polygon, fill_segments or name" );
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}
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}
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