Don't include plating thickness when drawing hole clearance lines.
We don't include it in the router, and the code didn't differentiate between plated and non-plated holes, and it confuses users. Fixes https://gitlab.com/kicad/code/kicad/-/issues/15575
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@ -1670,8 +1670,6 @@ void PCB_PAINTER::draw( const PAD* aPad, int aLayer )
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}
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else if( aPad->GetEffectiveHoleShape() && clearance > 0 )
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{
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clearance += m_holePlatingThickness;
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std::shared_ptr<SHAPE_SEGMENT> slot = aPad->GetEffectiveHoleShape();
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m_gal->DrawSegment( slot->GetSeg().A, slot->GetSeg().B,
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slot->GetWidth() + 2 * clearance );
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