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Add qa test: save and reload schematic with page numbers 

Note: PGM_BASE::InitPgm() is creating a SETTINGS_MANAGER object, which
in turn tries to display a "migrate settings" dialog when no settings
are found, but obviously the dialog can't be displayed inside docker.

Needed to add an optional parameter to InitPgm() in order to allow
running in headless mode.
This commit is contained in:
Roberto Fernandez Bautista 2021-05-01 23:24:09 +01:00
parent ae009e0758
commit 0f0c5c194b
9 changed files with 4493 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
common/pgm_base.cpp
View File

@ -202,7 +202,7 @@ const wxString PGM_BASE::AskUserForPreferredEditor( const wxString& aDefaultEdit
}
bool PGM_BASE::InitPgm()
bool PGM_BASE::InitPgm( bool aHeadless )
{
wxFileName pgm_name( App().argv[0] );
@ -264,7 +264,7 @@ bool PGM_BASE::InitPgm()
SetLanguagePath();
SetDefaultLanguage( tmp );
m_settings_manager = std::make_unique<SETTINGS_MANAGER>();
m_settings_manager = std::make_unique<SETTINGS_MANAGER>( aHeadless );
// Something got in the way of settings load: can't continue
if( !m_settings_manager->IsOK() )

3
include/pgm_base.h
View File

@ -266,9 +266,10 @@ public:
*
* @note Do not initialize anything relating to DSOs or projects.
*
* @param aHeadless If true, run in headless mode (e.g. for unit tests)
* @return true if success, false if failure and program is to terminate.
*/
bool InitPgm();
bool InitPgm( bool aHeadless = false );
// The PGM_* classes can have difficulties at termination if they
// are not destroyed soon enough. Relying on a static destructor can be

327
qa/eeschema/data/netlists/complex_hierarchy_shared/ampli_ht/ampli_ht.kicad_pro Normal file
View File

@ -0,0 +1,327 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.1,
"copper_line_width": 0.2,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"other_line_width": 0.15,
"silk_line_width": 0.15,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"rules": {
"min_copper_edge_clearance": 0.0,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0
},
"track_widths": [],
"via_dimensions": []
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
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1511
qa/eeschema/data/netlists/complex_hierarchy_shared/ampli_ht/ampli_ht.kicad_sch Normal file
View File

File diff suppressed because it is too large Load Diff

569
qa/eeschema/data/netlists/complex_hierarchy_shared/ampli_ht/filter.kicad_sch Normal file
View File

@ -0,0 +1,569 @@
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(uuid 972a6a01-b910-4b94-a2df-2808a090325a)
)
(hierarchical_label "OUT" (shape input) (at 241.3 82.55 0)
(effects (font (size 1.27 1.27)) (justify left))
(uuid e253e497-3efd-48d2-a87d-3ca62c9017c4)
)
(symbol (lib_id "complex_hierarchy_schlib:-VAA") (at 192.405 93.98 180)
(in_bom yes) (on_board yes)
(uuid b1d4f16d-b3db-43af-9510-15252f0e89d0)
(property "Reference" "#PWR042" (id 0) (at 192.405 96.52 0)
(effects (font (size 0.508 0.508)) hide)
)
(property "Value" "-VAA" (id 1) (at 192.405 96.52 0)
(effects (font (size 1.016 1.016)))
)
(property "Footprint" "" (id 2) (at 192.405 93.98 0)
(effects (font (size 0.254 0.254)) hide)
)
(property "Datasheet" "" (id 3) (at 192.405 93.98 0)
(effects (font (size 1.524 1.524)) hide)
)
(pin "1" (uuid 3b1b6f67-94e8-4932-ac4c-a23135371f57))
)
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(in_bom yes) (on_board yes)
(uuid 51596b74-88f9-41c6-bf3e-4b161083e60a)
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(effects (font (size 0.508 0.508)) hide)
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(pin "1" (uuid 311bba16-cb61-4668-9f82-b27d3bdef4a4))
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(pin "1" (uuid 6c4d4075-d2ad-4eed-bd58-f23cc053c68f))
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(pin "1" (uuid c2c68297-1855-4362-950d-e1b0a6c48c44))
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(property "Value" "150nF" (id 1) (at 147.955 80.01 0)
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(property "Footprint" "Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm" (id 2) (at 151.765 81.28 0)
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(property "Footprint" "Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm" (id 2) (at 177.165 90.17 0)
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(pin "2" (uuid f829b572-7bf8-44b8-a37f-bea2104437fb))
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(symbol (lib_id "complex_hierarchy_schlib:LM358N") (at 194.945 82.55 0)
(in_bom yes) (on_board yes)
(uuid 1ba44369-aca1-4e8e-b594-64d846d506c3)
(property "Reference" "U4" (id 0) (at 196.215 77.47 0)
(effects (font (size 1.524 1.524)))
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(property "Value" "LM358N" (id 1) (at 198.755 87.63 0))
(property "Footprint" "Package_DIP:DIP-8_W7.62mm_LongPads" (id 2) (at 201.295 88.9 0)
(effects (font (size 0.254 0.254)))
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(effects (font (size 1.524 1.524)) hide)
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(pin "4" (uuid b4aad4bb-d03c-4aa4-8f44-04bdbaed4687))
(pin "8" (uuid c4708d95-71cd-469c-8f0c-464a892bcef0))
(pin "1" (uuid 98b509ed-47bb-4d7b-9a51-75202c79cd25))
(pin "2" (uuid 000610d1-553f-4222-9e5f-1bf4fba437b5))
(pin "3" (uuid 9205d067-4474-467a-bc36-0c9afc0bea2c))
)
)

377
qa/eeschema/data/netlists/complex_hierarchy_shared/complex_hierarchy.kicad_pro Normal file
View File

@ -0,0 +1,377 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.09999999999999999,
"copper_line_width": 0.3,
"copper_text_italic": false,
"copper_text_size_h": 2.0,
"copper_text_size_v": 2.0,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.05,
"dimension_precision": 1,
"dimension_units": 0,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"silk_line_width": 0.2,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.2,
"silk_text_upright": false
},
"diff_pair_dimensions": [
{
"gap": 0.35,
"via_gap": 0.25,
"width": 0.4
}
],
"drc_exclusions": [],
"rule_severitieslegacy_courtyards_overlap": true,
"rule_severitieslegacy_no_courtyard_defined": false,
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"min_copper_edge_clearance": 0.01,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.508,
"min_microvia_drill": 0.2032,
"min_through_hole_diameter": 0.508,
"min_track_width": 0.2032,
"min_via_diameter": 0.889,
"solder_mask_clearance": 0.254,
"solder_mask_min_width": 0.0,
"solder_paste_clearance": 0.0,
"solder_paste_margin_ratio": -0.0
},
"track_widths": [
0.4
],
"via_dimensions": [
{
"diameter": 1.651,
"drill": 0.6
}
]
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
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0,
0,
1,
0,
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2,
2,
2
],
[
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],
[
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],
[
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],
[
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],
[
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[
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],
[
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],
[
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0,
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2
],
[
0,
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1,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "complex_hierarchy.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 6.0,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 0
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vmrl": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"drawing": {
"default_bus_thickness": 12.0,
"default_junction_size": 40.0,
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"default_wire_thickness": 6.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.3
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 0
},
"net_format_name": "Pcbnew",
"ngspice": {
"meta": {
"version": 0
},
"model_mode": 0
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"586ecf1e-327c-4cb7-b179-d5a732b52cac",
""
],
[
"c8464be4-ef62-4ac9-9520-fff745be87bf",
"ampli_ht_vertical"
],
[
"c8464be4-ef62-4ac9-9520-fff745be87bf",
"Filter FC=1000Hz"
],
[
"00000000-0000-0000-0000-00004b3a13a4",
"ampli_ht_horizontal"
],
[
"c8464be4-ef62-4ac9-9520-fff745be87bf",
"Filter FC=1000Hz"
]
],
"text_variables": {}
}

1602
qa/eeschema/data/netlists/complex_hierarchy_shared/complex_hierarchy.kicad_sch Normal file
View File

File diff suppressed because it is too large Load Diff

8
qa/eeschema/test_module.cpp
View File

@ -28,6 +28,7 @@
*/
#include <boost/test/unit_test.hpp>
#include <pgm_base.h>
#include <wx/init.h>
#include <unit_test_utils/wx_assert.h>
@ -48,7 +49,10 @@ bool init_unit_test()
{
boost::unit_test::framework::master_test_suite().p_name.value = "Common Eeschema module tests";
bool ok = wxInitialize();
bool ok = wxInitialize( boost::unit_test::framework::master_test_suite().argc,
boost::unit_test::framework::master_test_suite().argv );
Pgm().InitPgm( true ); // Initialize in headless mode
wxSetAssertHandler( &wxAssertThrower );
@ -60,6 +64,8 @@ int main( int argc, char* argv[] )
{
int ret = boost::unit_test::unit_test_main( &init_unit_test, argc, argv );
Pgm().Destroy();
// This causes some glib warnings on GTK3 (http://trac.wxwidgets.org/ticket/18274)
// but without it, Valgrind notices a lot of leaks from WX
wxUninitialize();

107
qa/eeschema/test_sch_sheet_list.cpp
View File

@ -44,7 +44,9 @@ public:
delete m_pi;
}
void loadSchematic( const wxString& aBaseName );
void loadSchematic( const wxString& aRelativePath );
wxFileName buildFullPath( const wxString& aRelativePath );
///> Schematic to load
SCHEMATIC m_schematic;
@ -55,26 +57,23 @@ public:
};
void TEST_SCH_SHEET_LIST_FIXTURE::loadSchematic( const wxString& aBaseName )
void TEST_SCH_SHEET_LIST_FIXTURE::loadSchematic( const wxString& aRelativePath )
{
wxFileName fn = KI_TEST::GetEeschemaTestDataDir();
fn.AppendDir( "netlists" );
fn.AppendDir( aBaseName );
fn.SetName( aBaseName );
fn.SetExt( KiCadSchematicFileExtension );
wxFileName fn = buildFullPath( aRelativePath );
BOOST_TEST_MESSAGE( fn.GetFullPath() );
wxFileName pro( fn );
pro.SetExt( ProjectFileExtension );
m_manager.LoadProject( pro.GetFullPath() );
m_schematic.Reset();
m_schematic.CurrentSheet().clear();
m_manager.LoadProject( pro.GetFullPath() );
m_manager.Prj().SetElem( PROJECT::ELEM_SCH_PART_LIBS, nullptr );
m_schematic.Reset();
m_schematic.SetProject( &m_manager.Prj() );
m_schematic.SetRoot( m_pi->Load( fn.GetFullPath(), &m_schematic ) );
BOOST_REQUIRE_EQUAL( m_pi->GetError().IsEmpty(), true );
@ -90,6 +89,7 @@ void TEST_SCH_SHEET_LIST_FIXTURE::loadSchematic( const wxString& aBaseName )
// Restore all of the loaded symbol instances from the root sheet screen.
sheets.UpdateSymbolInstances( m_schematic.RootScreen()->GetSymbolInstances() );
sheets.UpdateSheetInstances( m_schematic.RootScreen()->GetSheetInstances() );
sheets.AnnotatePowerSymbols();
@ -100,12 +100,24 @@ void TEST_SCH_SHEET_LIST_FIXTURE::loadSchematic( const wxString& aBaseName )
}
wxFileName TEST_SCH_SHEET_LIST_FIXTURE::buildFullPath( const wxString& aRelativePath )
{
wxFileName fn = KI_TEST::GetEeschemaTestDataDir();
fn.AppendDir( "netlists" );
wxString path = fn.GetFullPath();
path += aRelativePath + wxT( "." ) + KiCadSchematicFileExtension;
return wxFileName( path );
}
BOOST_FIXTURE_TEST_SUITE( SchSheetList, TEST_SCH_SHEET_LIST_FIXTURE )
BOOST_AUTO_TEST_CASE( TestSheetListPageProperties )
{
loadSchematic( "complex_hierarchy" );
loadSchematic( "complex_hierarchy/complex_hierarchy" );
SCH_SHEET_LIST sheets = m_schematic.GetSheets();
@ -120,4 +132,77 @@ BOOST_AUTO_TEST_CASE( TestSheetListPageProperties )
}
BOOST_AUTO_TEST_CASE( TestEditPageNumbersInSharedDesign )
{
BOOST_TEST_CONTEXT( "Read Sub-Sheet, prior to modification" )
{
// Check the Sub Sheet has the expected page numbers
loadSchematic( "complex_hierarchy_shared/ampli_ht/ampli_ht" );
SCH_SHEET_LIST sheets = m_schematic.GetSheets();
BOOST_CHECK_EQUAL( sheets.size(), 2 );
BOOST_CHECK_EQUAL( sheets.at( 0 ).GetPageNumber(), "i" );
BOOST_CHECK_EQUAL( sheets.at( 1 ).GetPageNumber(), "ii" );
}
BOOST_TEST_CONTEXT( "Read Root Sheet, prior to modification" )
{
// Check the parent sheet has the expected page numbers
loadSchematic( "complex_hierarchy_shared/complex_hierarchy" );
SCH_SHEET_LIST sheets = m_schematic.GetSheets();
BOOST_CHECK_EQUAL( sheets.size(), 5 );
BOOST_CHECK_EQUAL( sheets.at( 0 ).GetPageNumber(), "1" );
BOOST_CHECK_EQUAL( sheets.at( 1 ).GetPageNumber(), "2" );
BOOST_CHECK_EQUAL( sheets.at( 2 ).GetPageNumber(), "3" );
BOOST_CHECK_EQUAL( sheets.at( 3 ).GetPageNumber(), "4" );
BOOST_CHECK_EQUAL( sheets.at( 4 ).GetPageNumber(), "5" );
}
BOOST_TEST_CONTEXT( "Modify page numbers in root sheet" )
{
SCH_SHEET_LIST sheets = m_schematic.GetSheets();
// Ammend Page numbers
sheets.at( 0 ).SetPageNumber( "A" );
sheets.at( 1 ).SetPageNumber( "B" );
sheets.at( 2 ).SetPageNumber( "C" );
sheets.at( 3 ).SetPageNumber( "D" );
sheets.at( 4 ).SetPageNumber( "E" );
// Save and reload
wxString tempName = "complex_hierarchy_shared/complex_hierarchy_modified";
wxFileName tempFn = buildFullPath( tempName );
m_pi->Save( tempFn.GetFullPath(), &m_schematic.Root(), &m_schematic );
loadSchematic( tempName );
sheets = m_schematic.GetSheets();
BOOST_CHECK_EQUAL( sheets.size(), 5 );
BOOST_CHECK_EQUAL( sheets.at( 0 ).GetPageNumber(), "A" );
BOOST_CHECK_EQUAL( sheets.at( 1 ).GetPageNumber(), "B" );
BOOST_CHECK_EQUAL( sheets.at( 2 ).GetPageNumber(), "C" );
BOOST_CHECK_EQUAL( sheets.at( 3 ).GetPageNumber(), "D" );
BOOST_CHECK_EQUAL( sheets.at( 4 ).GetPageNumber(), "E" );
// Cleanup
wxRemoveFile( tempFn.GetFullPath() );
}
BOOST_TEST_CONTEXT( "Read Sub-Sheet, after modification" )
{
// Check the Sub Sheet has the expected page numbers
// (This should not have been modified after editing the root sheet)
loadSchematic( "complex_hierarchy_shared/ampli_ht/ampli_ht" );
SCH_SHEET_LIST sheets = m_schematic.GetSheets();
BOOST_CHECK_EQUAL( sheets.size(), 2 );
BOOST_CHECK_EQUAL( sheets.at( 0 ).GetPageNumber(), "i" );
BOOST_CHECK_EQUAL( sheets.at( 1 ).GetPageNumber(), "ii" );
}
}
BOOST_AUTO_TEST_SUITE_END()