Sim QA: Add Directives test

This test checks whether Spice directives placed in schematics as text
objects are properly included in the generated Spice netlist.
This commit is contained in:
Mikolaj Wielgus 2022-08-31 09:39:28 +02:00
parent ae879c8f02
commit 121fad63ab
5 changed files with 1417 additions and 0 deletions

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(kicad_pcb (version 20220818) (generator pcbnew)
)

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{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.1,
"copper_line_width": 0.2,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"other_line_width": 0.15,
"silk_line_width": 0.15,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"rules": {
"min_copper_edge_clearance": 0.0,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0
},
"track_widths": [],
"via_dimensions": []
},
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
1,
0,
1,
2
],
[
0,
1,
0,
0,
0,
0,
1,
1,
2,
1,
1,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
2
],
[
1,
1,
1,
1,
1,
0,
1,
1,
1,
1,
1,
2
],
[
0,
0,
0,
1,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
1,
2,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
0,
2,
1,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "directives.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 3
},
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"dashed_lines_dash_length_ratio": 12.0,
"dashed_lines_gap_length_ratio": 3.0,
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.375,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.15
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"spice_save_all_currents": false,
"spice_save_all_voltages": false,
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"a442c838-4dd5-4486-8afe-ccab26ad4148",
""
]
],
"text_variables": {}
}

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@ -0,0 +1,657 @@
(kicad_sch (version 20220822) (generator eeschema)
(uuid a442c838-4dd5-4486-8afe-ccab26ad4148)
(paper "A4")
(lib_symbols
(symbol "Device:L" (pin_numbers hide) (pin_names (offset 1.016) hide) (in_bom yes) (on_board yes)
(property "Reference" "L" (id 0) (at -1.27 0 90)
(effects (font (size 1.27 1.27)))
)
(property "Value" "L" (id 1) (at 1.905 0 90)
(effects (font (size 1.27 1.27)))
)
(property "Footprint" "" (id 2) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Datasheet" "~" (id 3) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_keywords" "inductor choke coil reactor magnetic" (id 4) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_description" "Inductor" (id 5) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_fp_filters" "Choke_* *Coil* Inductor_* L_*" (id 6) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(symbol "L_0_1"
(arc (start 0 -2.54) (mid 0.635 -1.905) (end 0 -1.27)
(stroke (width 0) (type default))
(fill (type none))
)
(arc (start 0 -1.27) (mid 0.635 -0.635) (end 0 0)
(stroke (width 0) (type default))
(fill (type none))
)
(arc (start 0 0) (mid 0.635 0.635) (end 0 1.27)
(stroke (width 0) (type default))
(fill (type none))
)
(arc (start 0 1.27) (mid 0.635 1.905) (end 0 2.54)
(stroke (width 0) (type default))
(fill (type none))
)
)
(symbol "L_1_1"
(pin passive line (at 0 3.81 270) (length 1.27)
(name "1" (effects (font (size 1.27 1.27))))
(number "1" (effects (font (size 1.27 1.27))))
)
(pin passive line (at 0 -3.81 90) (length 1.27)
(name "2" (effects (font (size 1.27 1.27))))
(number "2" (effects (font (size 1.27 1.27))))
)
)
)
(symbol "Device:R" (pin_numbers hide) (pin_names (offset 0)) (in_bom yes) (on_board yes)
(property "Reference" "R" (id 0) (at 2.032 0 90)
(effects (font (size 1.27 1.27)))
)
(property "Value" "R" (id 1) (at 0 0 90)
(effects (font (size 1.27 1.27)))
)
(property "Footprint" "" (id 2) (at -1.778 0 90)
(effects (font (size 1.27 1.27)) hide)
)
(property "Datasheet" "~" (id 3) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_keywords" "R res resistor" (id 4) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_description" "Resistor" (id 5) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_fp_filters" "R_*" (id 6) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(symbol "R_0_1"
(rectangle (start -1.016 -2.54) (end 1.016 2.54)
(stroke (width 0.254) (type default))
(fill (type none))
)
)
(symbol "R_1_1"
(pin passive line (at 0 3.81 270) (length 1.27)
(name "~" (effects (font (size 1.27 1.27))))
(number "1" (effects (font (size 1.27 1.27))))
)
(pin passive line (at 0 -3.81 90) (length 1.27)
(name "~" (effects (font (size 1.27 1.27))))
(number "2" (effects (font (size 1.27 1.27))))
)
)
)
(symbol "Simulation_SPICE:VDC" (pin_numbers hide) (pin_names (offset 0.0254)) (in_bom yes) (on_board yes)
(property "Reference" "V" (id 0) (at 2.54 2.54 0)
(effects (font (size 1.27 1.27)) (justify left))
)
(property "Value" "VDC" (id 1) (at 2.54 0 0)
(effects (font (size 1.27 1.27)) (justify left))
)
(property "Footprint" "" (id 2) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Datasheet" "~" (id 3) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Spice_Netlist_Enabled" "Y" (id 4) (at 0 0 0)
(effects (font (size 1.27 1.27)) (justify left) hide)
)
(property "Spice_Primitive" "V" (id 5) (at 0 0 0)
(effects (font (size 1.27 1.27)) (justify left) hide)
)
(property "Spice_Model" "dc(1)" (id 6) (at 2.54 -2.54 0)
(effects (font (size 1.27 1.27)) (justify left))
)
(property "ki_keywords" "simulation" (id 7) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_description" "Voltage source, DC" (id 8) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(symbol "VDC_0_0"
(polyline
(pts
(xy -1.27 0.254)
(xy 1.27 0.254)
)
(stroke (width 0) (type default))
(fill (type none))
)
(polyline
(pts
(xy -0.762 -0.254)
(xy -1.27 -0.254)
)
(stroke (width 0) (type default))
(fill (type none))
)
(polyline
(pts
(xy 0.254 -0.254)
(xy -0.254 -0.254)
)
(stroke (width 0) (type default))
(fill (type none))
)
(polyline
(pts
(xy 1.27 -0.254)
(xy 0.762 -0.254)
)
(stroke (width 0) (type default))
(fill (type none))
)
(text "+" (at 0 1.905 0)
(effects (font (size 1.27 1.27)))
)
)
(symbol "VDC_0_1"
(circle (center 0 0) (radius 2.54)
(stroke (width 0.254) (type default))
(fill (type background))
)
)
(symbol "VDC_1_1"
(pin passive line (at 0 5.08 270) (length 2.54)
(name "~" (effects (font (size 1.27 1.27))))
(number "1" (effects (font (size 1.27 1.27))))
)
(pin passive line (at 0 -5.08 90) (length 2.54)
(name "~" (effects (font (size 1.27 1.27))))
(number "2" (effects (font (size 1.27 1.27))))
)
)
)
(symbol "Simulation_SPICE:VSIN" (pin_numbers hide) (pin_names (offset 0.0254)) (in_bom yes) (on_board yes)
(property "Reference" "V" (id 0) (at 2.54 2.54 0)
(effects (font (size 1.27 1.27)) (justify left))
)
(property "Value" "VSIN" (id 1) (at 2.54 0 0)
(effects (font (size 1.27 1.27)) (justify left))
)
(property "Footprint" "" (id 2) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Datasheet" "~" (id 3) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Spice_Netlist_Enabled" "Y" (id 4) (at 0 0 0)
(effects (font (size 1.27 1.27)) (justify left) hide)
)
(property "Spice_Primitive" "V" (id 5) (at 0 0 0)
(effects (font (size 1.27 1.27)) (justify left) hide)
)
(property "Spice_Model" "sin(0 1 1k)" (id 6) (at 2.54 -2.54 0)
(effects (font (size 1.27 1.27)) (justify left))
)
(property "ki_keywords" "simulation" (id 7) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_description" "Voltage source, sinusoidal" (id 8) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(symbol "VSIN_0_0"
(arc (start 0 0) (mid -0.635 0.635) (end -1.27 0)
(stroke (width 0) (type default))
(fill (type none))
)
(arc (start 0 0) (mid 0.635 -0.635) (end 1.27 0)
(stroke (width 0) (type default))
(fill (type none))
)
(text "+" (at 0 1.905 0)
(effects (font (size 1.27 1.27)))
)
)
(symbol "VSIN_0_1"
(circle (center 0 0) (radius 2.54)
(stroke (width 0.254) (type default))
(fill (type background))
)
)
(symbol "VSIN_1_1"
(pin passive line (at 0 5.08 270) (length 2.54)
(name "~" (effects (font (size 1.27 1.27))))
(number "1" (effects (font (size 1.27 1.27))))
)
(pin passive line (at 0 -5.08 90) (length 2.54)
(name "~" (effects (font (size 1.27 1.27))))
(number "2" (effects (font (size 1.27 1.27))))
)
)
)
(symbol "power:GND" (power) (pin_names (offset 0)) (in_bom yes) (on_board yes)
(property "Reference" "#PWR" (id 0) (at 0 -6.35 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Value" "GND" (id 1) (at 0 -3.81 0)
(effects (font (size 1.27 1.27)))
)
(property "Footprint" "" (id 2) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Datasheet" "" (id 3) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_keywords" "power-flag" (id 4) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_description" "Power symbol creates a global label with name \"GND\" , ground" (id 5) (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(symbol "GND_0_1"
(polyline
(pts
(xy 0 0)
(xy 0 -1.27)
(xy 1.27 -1.27)
(xy 0 -2.54)
(xy -1.27 -1.27)
(xy 0 -1.27)
)
(stroke (width 0) (type default))
(fill (type none))
)
)
(symbol "GND_1_1"
(pin power_in line (at 0 0 270) (length 0) hide
(name "GND" (effects (font (size 1.27 1.27))))
(number "1" (effects (font (size 1.27 1.27))))
)
)
)
)
(wire (pts (xy 114.3 76.2) (xy 139.7 76.2))
(stroke (width 0) (type default))
(uuid 12e159da-aa7d-4046-a4b1-09721c80fe01)
)
(wire (pts (xy 165.1 86.36) (xy 165.1 88.9))
(stroke (width 0) (type default))
(uuid 4a5e7d13-141b-4818-97e1-9ddbb80f318a)
)
(wire (pts (xy 114.3 88.9) (xy 114.3 87.63))
(stroke (width 0) (type default))
(uuid 4bd96004-bd58-4b69-8f69-d40488cbc2e1)
)
(wire (pts (xy 152.4 76.2) (xy 152.4 78.74))
(stroke (width 0) (type default))
(uuid 526fc8d5-e3b4-4fb6-9bbd-f72e88d122f0)
)
(wire (pts (xy 152.4 76.2) (xy 165.1 76.2))
(stroke (width 0) (type default))
(uuid 551a057e-701e-46b2-962a-cc3ddf2dec41)
)
(wire (pts (xy 114.3 101.6) (xy 127 101.6))
(stroke (width 0) (type default))
(uuid 593d1288-f12d-4e39-a004-5a5d9f25683e)
)
(wire (pts (xy 127 111.76) (xy 127 114.3))
(stroke (width 0) (type default))
(uuid 5dcc6f72-3489-48d2-a999-b127ffe2692b)
)
(wire (pts (xy 139.7 86.36) (xy 139.7 88.9))
(stroke (width 0) (type default))
(uuid 8698f9eb-c83c-4445-87c2-ee33fd1f28a4)
)
(wire (pts (xy 127 101.6) (xy 127 104.14))
(stroke (width 0) (type default))
(uuid 8b185feb-2847-4990-bb06-ba8b71c53c34)
)
(wire (pts (xy 114.3 76.2) (xy 114.3 77.47))
(stroke (width 0) (type default))
(uuid 9b6abdf8-e409-4b69-be35-aaefd16e1b0b)
)
(wire (pts (xy 165.1 76.2) (xy 165.1 78.74))
(stroke (width 0) (type default))
(uuid a504d5bd-95e4-4f04-8718-80b4350ab7ab)
)
(wire (pts (xy 114.3 113.03) (xy 114.3 114.3))
(stroke (width 0) (type default))
(uuid aed8ca17-8c25-493f-83a4-c991646db757)
)
(wire (pts (xy 152.4 86.36) (xy 152.4 88.9))
(stroke (width 0) (type default))
(uuid c05484ba-2868-4e2a-9055-f01b69f40b4e)
)
(wire (pts (xy 114.3 102.87) (xy 114.3 101.6))
(stroke (width 0) (type default))
(uuid c547d5cd-cfe6-4f18-88ce-ebd7a18851f1)
)
(wire (pts (xy 139.7 78.74) (xy 139.7 76.2))
(stroke (width 0) (type default))
(uuid c575dbbf-6f76-4a5c-af2d-bc1844739369)
)
(text ".tran 1u 10m" (at 88.9 116.84 0)
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid 12c70666-8e01-4564-ba80-566a7722547a)
)
(text ".param k=0\nK12 L1 L2 {k}" (at 138.43 73.66 0)
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid 503dd1f3-122c-4522-bda0-61ccab9d9d14)
)
(text ".control\nalterparam k=0.9\nreset\n.endc" (at 138.43 68.58 0)
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid a058a379-6994-404d-a9a1-17c467c1e639)
)
(text ".subckt RESISTOR 1 2\nR 1 2 1k\n.ends" (at 88.9 111.76 0)
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid a806a0b3-52f9-4a96-ac22-fb65972c0ace)
)
(label "r" (at 127 101.6 0) (fields_autoplaced)
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid 460c0234-3918-47f5-b1e0-8038e11f2300)
)
(label "out" (at 165.1 76.2 0) (fields_autoplaced)
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid 5d44c42a-eaaf-41b4-aed0-5b7161b2e9bf)
)
(label "in" (at 114.3 76.2 0) (fields_autoplaced)
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid fe2fff8f-6150-480a-b1d6-76f0dbc514c3)
)
(symbol (lib_id "power:GND") (at 165.1 88.9 0) (unit 1)
(in_bom yes) (on_board yes) (fields_autoplaced)
(uuid 09a419c4-55ec-4f63-883d-ac849651dd08)
(default_instance (reference "#PWR?") (unit 1) (value "GND") (footprint ""))
(property "Reference" "#PWR?" (id 0) (at 165.1 95.25 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Value" "GND" (id 1) (at 165.1 93.98 0)
(effects (font (size 1.27 1.27)))
)
(property "Footprint" "" (id 2) (at 165.1 88.9 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Datasheet" "" (id 3) (at 165.1 88.9 0)
(effects (font (size 1.27 1.27)) hide)
)
(pin "1" (uuid 8a427ab7-ec3c-4ee4-bdbc-f86d4f8e2841))
)
(symbol (lib_id "Simulation_SPICE:VDC") (at 114.3 107.95 0) (unit 1)
(in_bom yes) (on_board yes) (fields_autoplaced)
(uuid 1f2d1f32-eb72-4d63-8edf-d6a2e8fc8f39)
(default_instance (reference "VDC1") (unit 1) (value "1") (footprint ""))
(property "Reference" "VDC1" (id 0) (at 118.11 106.045 0)
(effects (font (size 1.27 1.27)) (justify left))
)
(property "Value" "1" (id 1) (at 118.11 108.585 0)
(effects (font (size 1.27 1.27)) (justify left))
)
(property "Footprint" "" (id 2) (at 114.3 107.95 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Datasheet" "~" (id 3) (at 114.3 107.95 0)
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View File

@ -392,6 +392,16 @@ BOOST_AUTO_TEST_CASE( Switches )
}
BOOST_AUTO_TEST_CASE( Directives )
{
TestNetlist( "directives" );
TestTranPoint( 9.25e-3, { { "V(/in)", 1 }, { "V(/out)", -900e-3 }, { "I(XR1)", 1e-3 } } );
TestTranPoint( 9.50e-3, { { "V(/in)", 0 }, { "V(/out)", 0 }, { "I(XR1)", 1e-3 } } );
TestTranPoint( 9.75e-3, { { "V(/in)", -1 }, { "V(/out)", 900e-3 }, { "I(XR1)", 1e-3 } } );
TestTranPoint( 10e-3, { { "V(/in)", 0 }, { "V(/out)", 0 }, { "I(XR1)", 1e-3 } } );
}
BOOST_AUTO_TEST_CASE( LegacyLaserDriver )
{
TestNetlist( "legacy_laser_driver" );