Consolidate on a more widely used sub-type architecture.
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@ -114,6 +114,9 @@ enum KICAD_T
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PCB_NETINFO_T, ///< class NETINFO_ITEM, a description of a net
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PCB_GROUP_T, ///< class PCB_GROUP, a set of BOARD_ITEMs
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// Be prudent with these types:
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// they should be used only to locate specific item sub-types
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// N.B. If you add a type here, be sure to add it below to the BaseType()
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PCB_LOCATE_STDVIA_T,
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PCB_LOCATE_UVIA_T,
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PCB_LOCATE_BBVIA_T,
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@ -124,6 +127,13 @@ enum KICAD_T
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PCB_LOCATE_NPTH_T,
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PCB_LOCATE_BOARD_EDGE_T,
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// Same for locating shapes types from PCB_SHAPE_T and PCB_FP_SHAPE_T items
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PCB_SHAPE_LOCATE_SEGMENT_T,
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PCB_SHAPE_LOCATE_RECT_T,
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PCB_SHAPE_LOCATE_CIRCLE_T,
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PCB_SHAPE_LOCATE_ARC_T,
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PCB_SHAPE_LOCATE_POLY_T,
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// Schematic draw Items. The order of these items effects the sort order.
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// It is currently ordered to mimic the old Eeschema locate behavior where
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// the smallest item is the selected item.
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@ -268,6 +278,13 @@ constexpr KICAD_T BaseType( const KICAD_T aType )
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case PCB_LOCATE_NPTH_T:
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return PCB_LOCATE_HOLE_T;
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case PCB_SHAPE_LOCATE_SEGMENT_T:
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case PCB_SHAPE_LOCATE_RECT_T:
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case PCB_SHAPE_LOCATE_CIRCLE_T:
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case PCB_SHAPE_LOCATE_ARC_T:
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case PCB_SHAPE_LOCATE_POLY_T:
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return PCB_SHAPE_T;
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case PCB_DIM_ALIGNED_T:
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case PCB_DIM_CENTER_T:
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case PCB_DIM_RADIAL_T:
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@ -52,16 +52,10 @@ public:
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bool IsType( const std::vector<KICAD_T>& aScanTypes ) const override
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{
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if( BOARD_ITEM::IsType( aScanTypes ) )
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if( PCB_SHAPE::IsType( aScanTypes ) )
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return true;
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for( KICAD_T scanType : aScanTypes )
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{
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if( scanType == PCB_LOCATE_GRAPHIC_T )
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return true;
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else if( scanType == PCB_LOCATE_BOARD_EDGE_T )
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return m_layer == Edge_Cuts;
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}
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// No special processing above and beyond PCB_SHAPE at present....
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return false;
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}
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@ -68,6 +68,16 @@ public:
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return true;
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else if( scanType == PCB_LOCATE_BOARD_EDGE_T )
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return m_layer == Edge_Cuts;
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else if( scanType == PCB_SHAPE_LOCATE_ARC_T )
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return m_shape == SHAPE_T::ARC;
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else if( scanType == PCB_SHAPE_LOCATE_CIRCLE_T )
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return m_shape == SHAPE_T::CIRCLE;
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else if( scanType == PCB_SHAPE_LOCATE_RECT_T )
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return m_shape == SHAPE_T::RECT;
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else if( scanType == PCB_SHAPE_LOCATE_SEGMENT_T )
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return m_shape == SHAPE_T::SEGMENT;
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else if( scanType == PCB_SHAPE_LOCATE_POLY_T )
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return m_shape == SHAPE_T::POLY;
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}
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return false;
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@ -150,22 +150,20 @@ bool CONVERT_TOOL::Init()
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m_menu->SetIcon( BITMAPS::convert );
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m_menu->SetTitle( _( "Create from Selection" ) );
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auto graphicLines = P_S_C::OnlyGraphicShapeTypes( { SHAPE_T::SEGMENT, SHAPE_T::RECT,
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SHAPE_T::CIRCLE, SHAPE_T::ARC } )
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auto graphicLines = S_C::OnlyTypes( { PCB_SHAPE_LOCATE_SEGMENT_T, PCB_SHAPE_LOCATE_RECT_T,
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PCB_SHAPE_LOCATE_CIRCLE_T, PCB_SHAPE_LOCATE_ARC_T } )
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&& P_S_C::SameLayer();
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auto graphicToTrack = P_S_C::OnlyGraphicShapeTypes( { SHAPE_T::SEGMENT, SHAPE_T::ARC } );
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auto graphicToTrack = S_C::OnlyTypes( { PCB_SHAPE_LOCATE_SEGMENT_T, PCB_SHAPE_LOCATE_ARC_T } );
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auto trackLines = S_C::MoreThan( 1 ) && S_C::OnlyTypes( { PCB_TRACE_T, PCB_ARC_T } )
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&& P_S_C::SameLayer();
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auto anyLines = graphicLines || trackLines;
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auto anyPolys = S_C::OnlyTypes( { PCB_ZONE_T, PCB_FP_ZONE_T } )
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|| P_S_C::OnlyGraphicShapeTypes( { SHAPE_T::POLY, SHAPE_T::RECT } );
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auto anyPolys = S_C::OnlyTypes( { PCB_ZONE_T, PCB_FP_ZONE_T,
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PCB_SHAPE_LOCATE_POLY_T, PCB_SHAPE_LOCATE_RECT_T } );
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auto lineToArc = S_C::Count( 1 )
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&& ( P_S_C::OnlyGraphicShapeTypes( { SHAPE_T::SEGMENT } )
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|| S_C::OnlyTypes( { PCB_TRACE_T } ) );
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auto lineToArc = S_C::Count( 1 ) && S_C::OnlyTypes( { PCB_TRACE_T, PCB_SHAPE_LOCATE_SEGMENT_T } );
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auto showConvert = anyPolys || anyLines || lineToArc;
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auto canCreatePolyType = anyLines || anyPolys;
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@ -2,6 +2,7 @@
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2014 CERN
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* Copyright (C) 2017-2022 KiCad Developers, see AUTHORS.txt for contributors.
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* @author Maciej Suminski <maciej.suminski@cern.ch>
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*
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* This program is free software; you can redistribute it and/or
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@ -25,50 +26,23 @@
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#include "pcb_selection_conditions.h"
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#include "pcb_selection_tool.h"
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#include <board_connected_item.h>
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#include <pcb_shape.h>
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#include <functional>
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using namespace std::placeholders;
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using S_C = SELECTION_CONDITION;
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bool PCB_SELECTION_CONDITIONS::OnlyConnectedItems( const SELECTION& aSelection )
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{
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if( aSelection.Empty() )
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return false;
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for( const auto &item : aSelection )
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{
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auto type = item->Type();
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if( type != PCB_PAD_T && type != PCB_VIA_T && type != PCB_TRACE_T && type != PCB_ZONE_T )
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return false;
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}
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return true;
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}
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S_C PCB_SELECTION_CONDITIONS::SameNet( bool aAllowUnconnected )
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SELECTION_CONDITION PCB_SELECTION_CONDITIONS::SameNet( bool aAllowUnconnected )
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{
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return std::bind( &PCB_SELECTION_CONDITIONS::sameNetFunc, _1, aAllowUnconnected );
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}
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S_C PCB_SELECTION_CONDITIONS::SameLayer()
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SELECTION_CONDITION PCB_SELECTION_CONDITIONS::SameLayer()
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{
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return std::bind( &PCB_SELECTION_CONDITIONS::sameLayerFunc, _1 );
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}
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S_C PCB_SELECTION_CONDITIONS::OnlyGraphicShapeTypes( const std::set<SHAPE_T> aTypes )
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{
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return std::bind( &PCB_SELECTION_CONDITIONS::onlyGraphicShapeTypesFunc, _1, aTypes );
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}
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bool PCB_SELECTION_CONDITIONS::sameNetFunc( const SELECTION& aSelection, bool aAllowUnconnected )
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{
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if( aSelection.Empty() )
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@ -76,12 +50,11 @@ bool PCB_SELECTION_CONDITIONS::sameNetFunc( const SELECTION& aSelection, bool aA
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int netcode = -1; // -1 stands for 'net code is not yet determined'
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for( const auto& aitem : aSelection )
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for( const EDA_ITEM* aitem : aSelection )
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{
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int current_netcode = -1;
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const BOARD_CONNECTED_ITEM* item =
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dynamic_cast<const BOARD_CONNECTED_ITEM*>( aitem );
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const BOARD_CONNECTED_ITEM* item = dynamic_cast<const BOARD_CONNECTED_ITEM*>( aitem );
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if( item )
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{
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@ -123,9 +96,9 @@ bool PCB_SELECTION_CONDITIONS::sameLayerFunc( const SELECTION& aSelection )
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LSET layerSet;
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layerSet.set();
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for( const auto& i : aSelection )
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for( const EDA_ITEM* i : aSelection )
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{
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auto item = static_cast<BOARD_ITEM*>( i );
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const BOARD_ITEM* item = static_cast<const BOARD_ITEM*>( i );
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layerSet &= item->GetLayerSet();
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if( !layerSet.any() ) // there are no common layers left
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@ -136,22 +109,3 @@ bool PCB_SELECTION_CONDITIONS::sameLayerFunc( const SELECTION& aSelection )
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}
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bool PCB_SELECTION_CONDITIONS::onlyGraphicShapeTypesFunc( const SELECTION& aSelection,
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const std::set<SHAPE_T> aTypes )
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{
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if( aSelection.Empty() )
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return false;
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for( const EDA_ITEM* item : aSelection )
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{
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if( item->Type() != PCB_SHAPE_T && item->Type() != PCB_FP_SHAPE_T )
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return false;
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SHAPE_T shape = static_cast<const PCB_SHAPE*>( item )->GetShape();
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if( !aTypes.count( shape ) )
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return false;
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}
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return true;
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}
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@ -2,7 +2,7 @@
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2014 CERN
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* Copyright (C) 2021 KiCad Developers, see AUTHORS.txt for contributors.
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* Copyright (C) 2017-2022 KiCad Developers, see AUTHORS.txt for contributors.
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*
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* @author Maciej Suminski <maciej.suminski@cern.ch>
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*
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@ -35,14 +35,6 @@
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class PCB_SELECTION_CONDITIONS : public SELECTION_CONDITIONS
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{
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public:
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/**
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* Test if selection contains exclusively connected items (pads, tracks, vias, zones).
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*
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* @param aSelection is the selection to be tested.
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* @return True if there are only connected items connected.
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*/
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static bool OnlyConnectedItems( const SELECTION& aSelection );
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/**
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* Create a functor that tests if selection contains items belonging to the same net or are
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* unconnected if aAllowUnconnected == true.
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@ -64,17 +56,6 @@ public:
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*/
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static SELECTION_CONDITION SameLayer();
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/**
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* Create a functor that tests if the selection contains PCB_SHAPE* items of certain shapes.
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*
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* This implicitly includes an OnlyType( PCB_SHAPE_T ) as part of the test.
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*
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* @param aTypes is a list of allowed PCB_SHAPE shapes (@see SHAPE_T)
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* @return functor testing if selected items match the given list of allowed shapes
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*/
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static SELECTION_CONDITION OnlyGraphicShapeTypes( const std::set<SHAPE_T> aTypes );
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private:
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///< Helper function used by SameNet()
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static bool sameNetFunc( const SELECTION& aSelection, bool aAllowUnconnected );
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///< Helper function used by SameLayer()
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static bool sameLayerFunc( const SELECTION& aSelection );
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///< Helper function used by OnlyGraphicShapeTypes()
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static bool onlyGraphicShapeTypesFunc( const SELECTION& aSelection,
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const std::set<SHAPE_T> aTypes );
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};
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#endif /* PCB_SELECTION_CONDITIONS_H_ */
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