Eagle PCB import: disable copper pour for imported *Restrict layer polygons
Fixes: lp:1772245 * https://bugs.launchpad.net/kicad/+bug/1772245
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@ -1080,29 +1080,29 @@ ZONE_CONTAINER* EAGLE_PLUGIN::loadPolygon( wxXmlNode* aPolyNode )
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EPOLYGON p( aPolyNode );
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PCB_LAYER_ID layer = kicad_layer( p.layer );
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ZONE_CONTAINER* zone = nullptr;
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bool keepout = ( p.layer == EAGLE_LAYER::TRESTRICT || p.layer == EAGLE_LAYER::BRESTRICT );
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if( !IsCopperLayer( layer ) && !keepout )
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return nullptr;
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// Handle copper and keepout layers
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if( IsCopperLayer( layer )
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|| p.layer == EAGLE_LAYER::TRESTRICT || p.layer == EAGLE_LAYER::BRESTRICT )
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{
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// use a "netcode = 0" type ZONE:
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zone = new ZONE_CONTAINER( m_board );
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zone->SetTimeStamp( EagleTimeStamp( aPolyNode ) );
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m_board->Add( zone, ADD_APPEND );
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if( p.layer == EAGLE_LAYER::TRESTRICT )
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{
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zone->SetIsKeepout( true );
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if( p.layer == EAGLE_LAYER::TRESTRICT ) // front layer keepout
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zone->SetLayer( F_Cu );
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}
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else if( p.layer == EAGLE_LAYER::BRESTRICT )
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else if( p.layer == EAGLE_LAYER::BRESTRICT ) // bottom layer keepout
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zone->SetLayer( B_Cu );
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else
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zone->SetLayer( layer );
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if( keepout )
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{
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zone->SetIsKeepout( true );
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zone->SetLayer( B_Cu );
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}
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else
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{
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zone->SetLayer( layer );
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zone->SetDoNotAllowVias( true );
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zone->SetDoNotAllowTracks( true );
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zone->SetDoNotAllowCopperPour( true );
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}
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// Get the first vertex and iterate
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@ -1202,7 +1202,6 @@ ZONE_CONTAINER* EAGLE_PLUGIN::loadPolygon( wxXmlNode* aPolyNode )
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int rank = p.rank ? (p.max_priority - *p.rank) : p.max_priority;
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zone->SetPriority( rank );
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}
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return zone;
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}
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