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Revert "Reconcile PNS router with DRC." 

This reverts commit ad9109cad4.
This commit is contained in:
Seth Hillbrand 2023-05-24 08:54:16 -07:00
parent 248de56fb0
commit 1958cafbdf
1 changed files with 2 additions and 32 deletions
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34
pcbnew/router/pns_kicad_iface.cpp
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@ -275,34 +275,6 @@ static bool isHole( const PNS::ITEM* aItem )
}
static bool isDrilledHole( const PNS::ITEM* aItem )
{
if( !isHole( aItem ) )
return false;
if( PAD* pad = dynamic_cast<PAD*>( aItem->Parent() ) )
return pad->GetDrillSizeX() && pad->GetDrillSizeX() == pad->GetDrillSizeY();
// Via holes are (currently) always round
return true;
}
static bool isNonPlatedSlot( const PNS::ITEM* aItem )
{
if( !isHole( aItem ) )
return false;
if( PAD* pad = dynamic_cast<PAD*>( aItem->Parent() ) )
return pad->GetAttribute() == PAD_ATTRIB::NPTH && pad->GetDrillSizeX() != pad->GetDrillSizeY();
// Via holes are (currently) always round
return false;
}
static bool isEdge( const PNS::ITEM* aItem )
{
if ( !aItem )
@ -460,7 +432,7 @@ int PNS_PCBNEW_RULE_RESOLVER::Clearance( const PNS::ITEM* aA, const PNS::ITEM* a
for( int layer = layers.Start(); layer <= layers.End(); ++layer )
{
if( isDrilledHole( aA ) && isDrilledHole( aB) )
if( isHole( aA ) && isHole( aB) )
{
if( QueryConstraint( PNS::CONSTRAINT_TYPE::CT_HOLE_TO_HOLE, aA, aB, layer, &constraint ) )
{
@ -484,9 +456,7 @@ int PNS_PCBNEW_RULE_RESOLVER::Clearance( const PNS::ITEM* aA, const PNS::ITEM* a
rv = constraint.m_Value.Min();
}
}
// No 'else'; non-plated milled holes get both HOLE_CLEARANCE and EDGE_CLEARANCE
if( isEdge( aA ) || isNonPlatedSlot( aA ) || isEdge( aB ) || isNonPlatedSlot( aB ) )
else if( isEdge( aA ) || ( aB && isEdge( aB ) ) )
{
if( QueryConstraint( PNS::CONSTRAINT_TYPE::CT_EDGE_CLEARANCE, aA, aB, layer, &constraint ) )
{