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Implement "disallow" rules and integrate with keepout settings.

This commit is contained in:
Jeff Young 2020-05-25 18:46:06 +01:00
parent c415130de9
commit 1db799d841
10 changed files with 359 additions and 93 deletions
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6
common/drc_rules.keywords
View File

@ -1,11 +1,11 @@
annulus_width
blind_via
board_edge
buried_via
clearance
condition
constraint
disallow
track_width
footprint
graphic
hole
match_area
@ -19,11 +19,11 @@ npth
opt
pad
pth
relaxed
rule
selector
text
track
track_width
version
via
zone

76
pcbnew/class_zone.cpp
View File

@ -350,6 +350,82 @@ int ZONE_CONTAINER::GetThermalReliefCopperBridge( D_PAD* aPad ) const
}
int ZONE_CONTAINER::GetKeepouts( std::map<int, wxString>* aSources ) const
{
wxString source;
int keepouts = 0;
auto setFlag = [&]( int aFlag )
{
keepouts |= aFlag;
if( aSources )
(*aSources)[ aFlag ] = source;
};
if( m_isKeepout )
{
if( aSources )
source = _( "zone properties" );
if( m_doNotAllowTracks )
setFlag( DISALLOW_TRACKS );
if( m_doNotAllowVias )
setFlag( DISALLOW_VIAS );
if( m_doNotAllowPads )
setFlag( DISALLOW_PADS );
if( m_doNotAllowFootprints )
setFlag( DISALLOW_FOOTPRINTS );
if( m_doNotAllowCopperPour )
setFlag( DISALLOW_ZONES );
}
DRC_RULE* rule = GetRule( this, nullptr, DISALLOW_CONSTRAINT );
if( rule )
{
if( aSources )
source = wxString::Format( _( "'%s' rule" ), rule->m_Name );
if( ( rule->m_DisallowFlags & DISALLOW_VIAS ) > 0 )
setFlag( DISALLOW_VIAS );
if( ( rule->m_DisallowFlags & DISALLOW_MICRO_VIAS ) > 0 )
setFlag( DISALLOW_MICRO_VIAS );
if( ( rule->m_DisallowFlags & DISALLOW_BB_VIAS ) > 0 )
setFlag( DISALLOW_BB_VIAS );
if( ( rule->m_DisallowFlags & DISALLOW_TRACKS ) > 0 )
setFlag( DISALLOW_TRACKS );
if( ( rule->m_DisallowFlags & DISALLOW_PADS ) > 0 )
setFlag( DISALLOW_PADS );
if( ( rule->m_DisallowFlags & DISALLOW_ZONES ) > 0 )
setFlag( DISALLOW_ZONES );
if( ( rule->m_DisallowFlags & DISALLOW_TEXTS ) > 0 )
setFlag( DISALLOW_TEXTS );
if( ( rule->m_DisallowFlags & DISALLOW_GRAPHICS ) > 0 )
setFlag( DISALLOW_GRAPHICS );
if( ( rule->m_DisallowFlags & DISALLOW_HOLES ) > 0 )
setFlag( DISALLOW_HOLES );
if( ( rule->m_DisallowFlags & DISALLOW_FOOTPRINTS ) > 0 )
setFlag( DISALLOW_FOOTPRINTS );
}
return keepouts;
}
void ZONE_CONTAINER::SetCornerRadius( unsigned int aRadius )
{
if( m_cornerRadius != aRadius )

9
pcbnew/class_zone.h
View File

@ -658,6 +658,15 @@ public:
bool GetDoNotAllowPads() const { return m_doNotAllowPads; }
bool GetDoNotAllowFootprints() const { return m_doNotAllowFootprints; }
/**
* Return a bitset of flags for keepouts. Includes both those set via the GUI
* and those set via DRC rules.
* @aSources indicates the source ("zone properties" or rule name) of each
* flag.
* @return a bitset of DISALLOW_* flags.
*/
int GetKeepouts( std::map<int, wxString>* aSources = nullptr ) const;
void SetIsKeepout( bool aEnable ) { m_isKeepout = aEnable; }
void SetDoNotAllowCopperPour( bool aEnable ) { m_doNotAllowCopperPour = aEnable; }
void SetDoNotAllowVias( bool aEnable ) { m_doNotAllowVias = aEnable; }

2
pcbnew/dialogs/panel_setup_rules.cpp
View File

@ -157,7 +157,7 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent )
if( sexprs.top() == "constraint" )
tokens = "annulus_width clearance hole track_width";
else if( sexprs.top() == "disallow" )
tokens = "blind_via graphic hole micro_via pad text track via zone";
tokens = "buried_via graphic hole micro_via pad text track via zone";
int wordStartPos = m_textEditor->WordStartPosition( currentPos, true );
wxASSERT( currentPos - wordStartPos == partial.size() );

5
pcbnew/drc/drc.h
View File

@ -84,9 +84,14 @@ enum PCB_DRC_CODE {
DRCE_NETCLASS_uVIASIZE, ///< netclass has ViaSize < board.m_designSettings->m_MicroViasMinSize
DRCE_NETCLASS_uVIADRILLSIZE, ///< netclass has ViaSize < board.m_designSettings->m_MicroViasMinDrill
DRCE_VIA_INSIDE_KEEPOUT,
DRCE_MICROVIA_INSIDE_KEEPOUT,
DRCE_BBVIA_INSIDE_KEEPOUT,
DRCE_TRACK_INSIDE_KEEPOUT,
DRCE_PAD_INSIDE_KEEPOUT,
DRCE_FOOTPRINT_INSIDE_KEEPOUT,
DRCE_HOLE_INSIDE_KEEPOUT,
DRCE_TEXT_INSIDE_KEEPOUT,
DRCE_GRAPHICS_INSIDE_KEEPOUT,
DRCE_OVERLAPPING_FOOTPRINTS, ///< footprint courtyards overlap
DRCE_MISSING_COURTYARD, ///< footprint has no courtyard defined
DRCE_MALFORMED_COURTYARD, ///< footprint has a courtyard but malformed

5
pcbnew/drc/drc_item.cpp
View File

@ -106,9 +106,14 @@ wxString DRC_ITEM::GetErrorText( int aCode, bool aTranslate ) const
case DRCE_NETCLASS_uVIADRILLSIZE: msg = _HKI( "NetClass uVia Drill too small" ); break;
case DRCE_VIA_INSIDE_KEEPOUT: msg = _HKI( "Via inside keepout area" ); break;
case DRCE_MICROVIA_INSIDE_KEEPOUT: msg = _HKI( "Micro via inside keepout area" ); break;
case DRCE_BBVIA_INSIDE_KEEPOUT: msg = _HKI( "Buried via inside keepout area" ); break;
case DRCE_TRACK_INSIDE_KEEPOUT: msg = _HKI( "Track inside keepout area" ); break;
case DRCE_PAD_INSIDE_KEEPOUT: msg = _HKI( "Pad inside keepout area" ); break;
case DRCE_FOOTPRINT_INSIDE_KEEPOUT: msg = _HKI( "Footprint inside keepout area" ); break;
case DRCE_HOLE_INSIDE_KEEPOUT: msg = _HKI( "Hole inside keepout area" ); break;
case DRCE_TEXT_INSIDE_KEEPOUT: msg = _HKI( "Text inside keepout area" ); break;
case DRCE_GRAPHICS_INSIDE_KEEPOUT: msg = _HKI( "Graphic inside keepout area" ); break;
case DRCE_VIA_NEAR_COPPER: msg = _HKI( "Via too close to copper item" ); break;
case DRCE_TRACK_NEAR_COPPER: msg = _HKI( "Track too close to copper item" ); break;

306
pcbnew/drc/drc_keepout_tester.cpp
View File

@ -31,7 +31,9 @@
DRC_KEEPOUT_TESTER::DRC_KEEPOUT_TESTER( MARKER_HANDLER aMarkerHandler ) :
DRC_TEST_PROVIDER( std::move( aMarkerHandler ) ),
m_units( EDA_UNITS::MILLIMETRES ),
m_board( nullptr )
m_board( nullptr ),
m_zone( nullptr ),
m_keepoutFlags( 0 )
{
}
@ -49,13 +51,16 @@ bool DRC_KEEPOUT_TESTER::RunDRC( EDA_UNITS aUnits, BOARD& aBoard )
// Test keepout areas for vias, tracks and pads inside keepout areas
for( ZONE_CONTAINER* area : areasToInspect )
{
if( area->GetIsKeepout() )
{
if( area->GetDoNotAllowTracks() || area->GetDoNotAllowVias() )
success &= checkTracksAndVias( area );
m_keepoutFlags = area->GetKeepouts( &m_sources );
if( area->GetDoNotAllowPads() || area->GetDoNotAllowFootprints() )
success &= checkFootprints( area );
if( m_keepoutFlags > 0 )
{
m_zone = area;
m_zoneBBox = area->GetBoundingBox();
success &= checkTracksAndVias();
success &= checkFootprints();
success &= checkDrawings();
}
}
@ -63,46 +68,93 @@ bool DRC_KEEPOUT_TESTER::RunDRC( EDA_UNITS aUnits, BOARD& aBoard )
}
bool DRC_KEEPOUT_TESTER::checkTracksAndVias( ZONE_CONTAINER* aKeepout )
bool DRC_KEEPOUT_TESTER::checkTracksAndVias()
{
constexpr int VIA_MASK = DISALLOW_VIAS | DISALLOW_MICRO_VIAS | DISALLOW_BB_VIAS;
constexpr int CHECK_VIAS_MASK = VIA_MASK | DISALLOW_HOLES;
constexpr int CHECK_TRACKS_AND_VIAS_MASK = CHECK_VIAS_MASK | DISALLOW_TRACKS;
if(( m_keepoutFlags & CHECK_TRACKS_AND_VIAS_MASK ) == 0 )
return true;
bool success = true;
for( TRACK* segm : m_board->Tracks() )
{
if( segm->Type() == PCB_TRACE_T && aKeepout->GetDoNotAllowTracks() )
if( !m_zoneBBox.Intersects( segm->GetBoundingBox() ) )
continue;
if( segm->Type() == PCB_TRACE_T && ( m_keepoutFlags & DISALLOW_TRACKS ) != 0 )
{
// Ignore if the keepout zone is not on the same layer
if( !aKeepout->IsOnLayer( segm->GetLayer() ) )
if( !m_zone->IsOnLayer( segm->GetLayer() ) )
continue;
int widths = segm->GetWidth() / 2;
SEG trackSeg( segm->GetStart(), segm->GetEnd() );
SEG::ecoord center2center_squared = aKeepout->Outline()->SquaredDistance( trackSeg );
SEG::ecoord center2center_squared = m_zone->Outline()->SquaredDistance( trackSeg );
if( center2center_squared <= SEG::Square( widths) )
{
DRC_ITEM* drcItem = new DRC_ITEM( DRCE_TRACK_INSIDE_KEEPOUT );
drcItem->SetItems( segm, aKeepout );
HandleMarker( new MARKER_PCB( drcItem, DRC::GetLocation( segm, aKeepout ) ) );
m_msg.Printf( drcItem->GetErrorText() + _( " (%s)" ),
m_sources.at(DISALLOW_TRACKS ) );
drcItem->SetErrorMessage( m_msg );
drcItem->SetItems( segm, m_zone );
HandleMarker( new MARKER_PCB( drcItem, DRC::GetLocation( segm, m_zone ) ) );
success = false;
}
}
else if( segm->Type() == PCB_VIA_T && aKeepout->GetDoNotAllowVias() )
else if( segm->Type() == PCB_VIA_T && ( m_keepoutFlags & CHECK_VIAS_MASK ) != 0 )
{
if( !aKeepout->CommonLayerExists( segm->GetLayerSet() ) )
VIA* via = static_cast<VIA*>( segm );
int errorCode = 0;
int sourceId = 0;
if( ( m_keepoutFlags & DISALLOW_VIAS ) > 0 )
{
errorCode = DRCE_VIA_INSIDE_KEEPOUT;
sourceId = DISALLOW_VIAS;
}
else if( via->GetViaType() == VIATYPE::MICROVIA
&& ( m_keepoutFlags & DISALLOW_MICRO_VIAS ) > 0 )
{
errorCode = DRCE_MICROVIA_INSIDE_KEEPOUT;
sourceId = DISALLOW_MICRO_VIAS;
}
else if( via->GetViaType() == VIATYPE::BLIND_BURIED
&& ( m_keepoutFlags & DISALLOW_BB_VIAS ) > 0 )
{
errorCode = DRCE_BBVIA_INSIDE_KEEPOUT;
sourceId = DISALLOW_BB_VIAS;
}
else if( ( m_keepoutFlags & DISALLOW_HOLES ) > 0 )
{
errorCode = DRCE_HOLE_INSIDE_KEEPOUT;
sourceId = DISALLOW_HOLES;
}
else
continue;
int widths = segm->GetWidth() / 2;
wxPoint viaPos = segm->GetPosition();
SEG::ecoord center2center_squared = aKeepout->Outline()->SquaredDistance( viaPos );
int widths = via->GetWidth() / 2;
wxPoint viaPos = via->GetPosition();
if( center2center_squared <= SEG::Square( widths) )
if( errorCode == DRCE_HOLE_INSIDE_KEEPOUT )
widths = via->GetDrillValue() / 2;
SEG::ecoord center2center_squared = m_zone->Outline()->SquaredDistance( viaPos );
if( center2center_squared <= SEG::Square( widths ) )
{
DRC_ITEM* drcItem = new DRC_ITEM( DRCE_VIA_INSIDE_KEEPOUT );
drcItem->SetItems( segm, aKeepout );
DRC_ITEM* drcItem = new DRC_ITEM( errorCode );
m_msg.Printf( drcItem->GetErrorText() + _( " (%s)" ), m_sources.at( sourceId ) );
drcItem->SetErrorMessage( m_msg );
drcItem->SetItems( segm, m_zone );
HandleMarker( new MARKER_PCB( drcItem, DRC::GetLocation( segm, aKeepout ) ) );
HandleMarker( new MARKER_PCB( drcItem, DRC::GetLocation( segm, m_zone ) ) );
success = false;
}
}
@ -112,77 +164,128 @@ bool DRC_KEEPOUT_TESTER::checkTracksAndVias( ZONE_CONTAINER* aKeepout )
}
bool DRC_KEEPOUT_TESTER::checkFootprints( ZONE_CONTAINER* aKeepout )
bool DRC_KEEPOUT_TESTER::checkFootprints()
{
bool success = true;
EDA_RECT areaBBox = aKeepout->GetBoundingBox();
bool checkFront = aKeepout->CommonLayerExists( LSET::FrontMask() );
bool checkBack = aKeepout->CommonLayerExists( LSET::BackMask() );
constexpr int CHECK_PADS_MASK = DISALLOW_PADS | DISALLOW_HOLES;
constexpr int CHECK_FOOTPRINTS_MASK = CHECK_PADS_MASK | DISALLOW_FOOTPRINTS;
if(( m_keepoutFlags & CHECK_FOOTPRINTS_MASK ) == 0 )
return true;
bool success = true;
for( MODULE* fp : m_board->Modules() )
{
if( aKeepout->GetDoNotAllowFootprints() && ( fp->IsFlipped() ? checkBack : checkFront ) )
if( !m_zoneBBox.Intersects( fp->GetBoundingBox() ) )
continue;
if( ( m_keepoutFlags & DISALLOW_FOOTPRINTS ) > 0
&& ( fp->IsFlipped() ? m_zone->CommonLayerExists( LSET::BackMask() )
: m_zone->CommonLayerExists( LSET::FrontMask() ) ) )
{
// Fast test to detect a footprint inside the keepout area bounding box.
if( areaBBox.Intersects( fp->GetBoundingBox() ) )
SHAPE_POLY_SET poly;
if( fp->BuildPolyCourtyard() )
poly = fp->IsFlipped() ? fp->GetPolyCourtyardBack() : fp->GetPolyCourtyardFront();
if( poly.OutlineCount() == 0 )
poly = fp->GetBoundingPoly();
// Build the common area between footprint and the keepout area:
poly.BooleanIntersection( *m_zone->Outline(), SHAPE_POLY_SET::PM_FAST );
// If it's not empty then we have a violation
if( poly.OutlineCount() )
{
SHAPE_POLY_SET outline;
const VECTOR2I& pt = poly.CVertex( 0, 0, -1 );
DRC_ITEM* drcItem = new DRC_ITEM( DRCE_FOOTPRINT_INSIDE_KEEPOUT );
if( fp->BuildPolyCourtyard() )
{
outline = fp->IsFlipped() ? fp->GetPolyCourtyardBack()
: fp->GetPolyCourtyardFront();
}
m_msg.Printf( drcItem->GetErrorText() + _( " (%s)" ),
m_sources.at( DISALLOW_FOOTPRINTS ) );
if( outline.OutlineCount() == 0 )
outline = fp->GetBoundingPoly();
drcItem->SetErrorMessage( m_msg );
drcItem->SetItems( fp, m_zone );
// Build the common area between footprint and the keepout area:
outline.BooleanIntersection( *aKeepout->Outline(), SHAPE_POLY_SET::PM_FAST );
// If it's not empty then we have a violation
if( outline.OutlineCount() )
{
const VECTOR2I& pt = outline.CVertex( 0, 0, -1 );
DRC_ITEM* drcItem = new DRC_ITEM( DRCE_FOOTPRINT_INSIDE_KEEPOUT );
drcItem->SetItems( fp, aKeepout );
HandleMarker( new MARKER_PCB( drcItem, (wxPoint) pt ) );
success = false;
}
HandleMarker( new MARKER_PCB( drcItem, (wxPoint) pt ) );
success = false;
}
}
if( aKeepout->GetDoNotAllowPads() )
if( ( m_keepoutFlags & CHECK_PADS_MASK ) > 0 )
{
for( D_PAD* pad : fp->Pads() )
success &= checkPads( fp );
}
}
return success;
}
bool DRC_KEEPOUT_TESTER::checkPads( MODULE* aModule )
{
bool success = true;
for( D_PAD* pad : aModule->Pads() )
{
if( !m_zone->CommonLayerExists( pad->GetLayerSet() ) )
continue;
// Fast test to detect a pad inside the keepout area bounding box.
EDA_RECT padBBox( pad->ShapePos(), wxSize() );
padBBox.Inflate( pad->GetBoundingRadius() );
if( !m_zoneBBox.Intersects( padBBox ) )
continue;
if( ( m_keepoutFlags & DISALLOW_PADS ) > 0 )
{
SHAPE_POLY_SET outline;
pad->TransformShapeWithClearanceToPolygon( outline, 0 );
// Build the common area between pad and the keepout area:
outline.BooleanIntersection( *m_zone->Outline(), SHAPE_POLY_SET::PM_FAST );
// If it's not empty then we have a violation
if( outline.OutlineCount() )
{
if( !aKeepout->CommonLayerExists( pad->GetLayerSet() ) )
continue;
const VECTOR2I& pt = outline.CVertex( 0, 0, -1 );
DRC_ITEM* drcItem = new DRC_ITEM( DRCE_PAD_INSIDE_KEEPOUT );
// Fast test to detect a pad inside the keepout area bounding box.
EDA_RECT padBBox( pad->ShapePos(), wxSize() );
padBBox.Inflate( pad->GetBoundingRadius() );
m_msg.Printf( drcItem->GetErrorText() + _( " (%s)" ),
m_sources.at( DISALLOW_PADS ) );
if( areaBBox.Intersects( padBBox ) )
{
SHAPE_POLY_SET outline;
pad->TransformShapeWithClearanceToPolygon( outline, 0 );
drcItem->SetErrorMessage( m_msg );
drcItem->SetItems( pad, m_zone );
// Build the common area between pad and the keepout area:
outline.BooleanIntersection( *aKeepout->Outline(), SHAPE_POLY_SET::PM_FAST );
HandleMarker( new MARKER_PCB( drcItem, (wxPoint) pt ) );
success = false;
}
}
else if( ( m_keepoutFlags & DISALLOW_HOLES ) > 0 )
{
wxPoint slotStart, slotEnd;
int slotWidth;
// If it's not empty then we have a violation
if( outline.OutlineCount() )
{
const VECTOR2I& pt = outline.CVertex( 0, 0, -1 );
DRC_ITEM* drcItem = new DRC_ITEM( DRCE_PAD_INSIDE_KEEPOUT );
drcItem->SetItems( pad, aKeepout );
pad->GetOblongGeometry( pad->GetDrillSize(), &slotStart, &slotEnd, &slotWidth );
slotStart += pad->GetPosition();
slotEnd += pad->GetPosition();
HandleMarker( new MARKER_PCB( drcItem, (wxPoint) pt ) );
success = false;
}
}
SEG slotSeg( slotStart, slotEnd );
SHAPE_POLY_SET* outline = const_cast<SHAPE_POLY_SET*>( &m_zone->GetFilledPolysList() );
SEG::ecoord center2center_sq = outline->SquaredDistance( slotSeg );
if( center2center_sq <= SEG::Square( slotWidth) )
{
DRC_ITEM* drcItem = new DRC_ITEM( DRCE_HOLE_INSIDE_KEEPOUT );
m_msg.Printf( drcItem->GetErrorText() + _( " (%s)" ),
m_sources.at( DISALLOW_HOLES ) );
drcItem->SetErrorMessage( m_msg );
drcItem->SetItems( pad, m_zone );
HandleMarker( new MARKER_PCB( drcItem, pad->GetPosition() ) );
success = false;
}
}
}
@ -191,3 +294,58 @@ bool DRC_KEEPOUT_TESTER::checkFootprints( ZONE_CONTAINER* aKeepout )
}
bool DRC_KEEPOUT_TESTER::checkDrawings()
{
constexpr int CHECK_DRAWINGS_MASK = DISALLOW_TEXTS | DISALLOW_GRAPHICS;
constexpr KICAD_T graphicTypes[] = { PCB_LINE_T, PCB_DIMENSION_T, PCB_TARGET_T, EOT };
if(( m_keepoutFlags & CHECK_DRAWINGS_MASK ) == 0 )
return true;
bool success = true;
for( BOARD_ITEM* drawing : m_board->Drawings() )
{
if( !m_zoneBBox.Intersects( drawing->GetBoundingBox() ) )
continue;
int errorCode = 0;
int sourceId = 0;
if( drawing->IsType( graphicTypes ) && ( m_keepoutFlags & DISALLOW_GRAPHICS ) > 0 )
{
errorCode = DRCE_GRAPHICS_INSIDE_KEEPOUT;
sourceId = DISALLOW_GRAPHICS;
}
else if( drawing->Type() == PCB_TEXT_T && ( m_keepoutFlags & DISALLOW_TEXTS ) > 0 )
{
errorCode = DRCE_TEXT_INSIDE_KEEPOUT;
sourceId = DISALLOW_TEXTS;
}
else
continue;
SHAPE_POLY_SET poly;
drawing->TransformShapeWithClearanceToPolygon( poly, 0 );
// Build the common area between footprint and the keepout area:
poly.BooleanIntersection( *m_zone->Outline(), SHAPE_POLY_SET::PM_FAST );
// If it's not empty then we have a violation
if( poly.OutlineCount() )
{
const VECTOR2I& pt = poly.CVertex( 0, 0, -1 );
DRC_ITEM* drcItem = new DRC_ITEM( errorCode );
m_msg.Printf( drcItem->GetErrorText() + _( " (%s)" ), m_sources.at( sourceId ) );
drcItem->SetErrorMessage( m_msg );
drcItem->SetItems( drawing, m_zone );
HandleMarker( new MARKER_PCB( drcItem, (wxPoint) pt ) );
success = false;
}
}
return success;
}

13
pcbnew/drc/drc_keepout_tester.h
View File

@ -41,12 +41,21 @@ public:
bool RunDRC( EDA_UNITS aUnits, BOARD& aBoard ) override;
private:
bool checkTracksAndVias( ZONE_CONTAINER* aKeepout );
bool checkFootprints( ZONE_CONTAINER* aKeepout );
bool checkTracksAndVias();
bool checkFootprints();
bool checkPads( MODULE* aModule );
bool checkDrawings();
private:
EDA_UNITS m_units;
BOARD* m_board;
// Temp variables for use while testing:
ZONE_CONTAINER* m_zone;
EDA_RECT m_zoneBBox;
int m_keepoutFlags; // bitset of DISALLOW_* flags
std::map<int, wxString> m_sources; // map of DISALLOW_* flag to source
wxString m_msg; // avoid lots of calls to wxString's c'tor.
};
#endif // DRC_KEEPOUT_TESTER__H

1
pcbnew/drc/drc_rule.h
View File

@ -36,6 +36,7 @@ class BOARD_ITEM;
#define ANNULUS_CONSTRAINT (1 << 1)
#define TRACK_CONSTRAINT (1 << 2)
#define HOLE_CONSTRAINT (1 << 3)
#define DISALLOW_CONSTRAINT (1 << 4)
#define DISALLOW_VIAS (1 << 0)
#define DISALLOW_MICRO_VIAS (1 << 1)

29
pcbnew/drc/drc_rule_parser.cpp
View File

@ -152,7 +152,7 @@ DRC_SELECTOR* DRC_RULES_PARSER::parseDRC_SELECTOR( wxString* aRuleName )
case T_track: selector->m_MatchTypes.push_back( PCB_TRACE_T ); break;
case T_via: selector->m_MatchTypes.push_back( PCB_LOCATE_STDVIA_T ); break;
case T_micro_via: selector->m_MatchTypes.push_back( PCB_LOCATE_UVIA_T ); break;
case T_blind_via: selector->m_MatchTypes.push_back( PCB_LOCATE_BBVIA_T ); break;
case T_buried_via: selector->m_MatchTypes.push_back( PCB_LOCATE_BBVIA_T ); break;
case T_pad: selector->m_MatchTypes.push_back( PCB_PAD_T ); break;
case T_zone: selector->m_MatchTypes.push_back( PCB_ZONE_AREA_T ); break;
case T_text: selector->m_MatchTypes.push_back( PCB_LOCATE_TEXT_T ); break;
@ -161,7 +161,7 @@ DRC_SELECTOR* DRC_RULES_PARSER::parseDRC_SELECTOR( wxString* aRuleName )
case T_npth: selector->m_MatchTypes.push_back( PCB_LOCATE_NPTH_T ); break;
case T_pth: selector->m_MatchTypes.push_back( PCB_LOCATE_PTH_T ); break;
case T_board_edge: selector->m_MatchTypes.push_back( PCB_LOCATE_BOARD_EDGE_T ); break;
default: Expecting( "track, via, micro_via, blind_via, pad, zone, text, "
default: Expecting( "track, via, micro_via, buried_via, pad, zone, text, "
"graphic, hole, npth, pth, or board_edge" );
}
NeedRIGHT();
@ -214,18 +214,21 @@ DRC_RULE* DRC_RULES_PARSER::parseDRC_RULE()
case T_disallow:
switch( NextTok() )
{
case T_track: rule->m_DisallowFlags |= DISALLOW_TRACKS; break;
case T_via: rule->m_DisallowFlags |= DISALLOW_VIAS; break;
case T_micro_via: rule->m_DisallowFlags |= DISALLOW_MICRO_VIAS; break;
case T_blind_via: rule->m_DisallowFlags |= DISALLOW_BB_VIAS; break;
case T_pad: rule->m_DisallowFlags |= DISALLOW_PADS; break;
case T_zone: rule->m_DisallowFlags |= DISALLOW_ZONES; break;
case T_text: rule->m_DisallowFlags |= DISALLOW_TEXTS; break;
case T_graphic: rule->m_DisallowFlags |= DISALLOW_GRAPHICS; break;
case T_hole: rule->m_DisallowFlags |= DISALLOW_HOLES; break;
case T_track: rule->m_DisallowFlags |= DISALLOW_TRACKS; break;
case T_via: rule->m_DisallowFlags |= DISALLOW_VIAS; break;
case T_micro_via: rule->m_DisallowFlags |= DISALLOW_MICRO_VIAS; break;
case T_buried_via: rule->m_DisallowFlags |= DISALLOW_BB_VIAS; break;
case T_pad: rule->m_DisallowFlags |= DISALLOW_PADS; break;
case T_zone: rule->m_DisallowFlags |= DISALLOW_ZONES; break;
case T_text: rule->m_DisallowFlags |= DISALLOW_TEXTS; break;
case T_graphic: rule->m_DisallowFlags |= DISALLOW_GRAPHICS; break;
case T_hole: rule->m_DisallowFlags |= DISALLOW_HOLES; break;
case T_footprint: rule->m_DisallowFlags |= DISALLOW_FOOTPRINTS; break;
default: Expecting( "track, via, micro_via, blind_via, pad, zone, text, "
"graphic, or hole" );
}
rule->m_ConstraintFlags = DISALLOW_CONSTRAINT;
NeedRIGHT();
break;
@ -263,6 +266,8 @@ void DRC_RULES_PARSER::parseConstraint( DRC_RULE* aRule )
default: Expecting( "clearance, track_width, annulus_width, or hole" ); return;
}
aRule->m_ConstraintFlags |= constraintType;
for( token = NextTok(); token != T_RIGHT; token = NextTok() )
{
if( token != T_LEFT )
@ -319,8 +324,6 @@ void DRC_RULES_PARSER::parseConstraint( DRC_RULE* aRule )
Expecting( "allow or constraint" );
}
}
aRule->m_ConstraintFlags |= constraintType;
}