Don't render hole walls when no physical layers are visible.
Fixes https://gitlab.com/kicad/code/kicad/issues/7369
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@ -846,6 +846,13 @@ LSET LSET::UserMask()
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}
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LSET LSET::PhysicalLayersMask()
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{
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static const LSET saved = AllBoardTechMask() | AllCuMask();
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return saved;
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}
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LSET LSET::UserDefinedLayers()
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{
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static const LSET saved( 9,
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@ -649,6 +649,12 @@ public:
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static LSET UserMask();
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/**
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* Return a mask holding all layers which are physically realized. Equivalent to the copper
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* layers + the board tech mask.
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*/
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static LSET PhysicalLayersMask();
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/**
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* Return a mask with all of the allowable user defined layers.
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*/
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@ -802,6 +808,22 @@ inline bool IsCopperLayer( LAYER_NUM aLayerId, bool aIncludeSyntheticCopperLayer
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return IsCopperLayer( aLayerId );
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}
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inline bool IsViaPadLayer( LAYER_NUM aLayer )
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{
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return aLayer == LAYER_VIA_THROUGH
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|| aLayer == LAYER_VIA_MICROVIA
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|| aLayer == LAYER_VIA_BBLIND;
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}
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inline bool IsHoleLayer( LAYER_NUM aLayer )
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{
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return aLayer == LAYER_VIA_HOLES
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|| aLayer == LAYER_VIA_HOLEWALLS
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|| aLayer == LAYER_PAD_PLATEDHOLES
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|| aLayer == LAYER_PAD_HOLEWALLS
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|| aLayer == LAYER_NON_PLATEDHOLES;
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}
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/**
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* Test whether a layer is a non copper and a non tech layer.
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*
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@ -909,7 +931,7 @@ inline int GetNetnameLayer( int aLayer )
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return LAYER_PAD_FR_NETNAMES;
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else if( aLayer == LAYER_PAD_BK )
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return LAYER_PAD_BK_NETNAMES;
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else if( aLayer >= LAYER_VIA_MICROVIA && aLayer <= LAYER_VIA_THROUGH )
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else if( IsViaPadLayer( aLayer ) )
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return LAYER_VIA_NETNAMES;
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// Fallback
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@ -404,6 +404,10 @@ public:
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inline bool IsLayerVisible( int aLayer ) const
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{
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wxCHECK( aLayer < (int) m_layers.size(), false );
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if( GetPrintMode() > 0 )
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return true;
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return m_layers.at( aLayer ).visible;
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}
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@ -683,7 +687,7 @@ public:
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* @return the printing mode.
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*/
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int GetPrintMode() { return m_printMode; }
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int GetPrintMode() const { return m_printMode; }
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/**
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* Set the printing mode.
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@ -1223,22 +1223,16 @@ double PAD::ViewGetLOD( int aLayer, KIGFX::VIEW* aView ) const
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PCB_PAINTER* painter = static_cast<PCB_PAINTER*>( aView->GetPainter() );
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PCB_RENDER_SETTINGS* renderSettings = painter->GetSettings();
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BOARD* board = GetBoard();
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if( board && aLayer == LAYER_PADS_TH )
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{
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LSET visible = board->GetVisibleLayers() & board->GetEnabledLayers();
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if( !FlashLayer( visible ) )
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return HIDE;
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}
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if( aView->GetPrintMode() > 0 ) // In printing mode the pad is always drawable
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return 0.0;
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LSET visible = LSET::AllLayersMask();
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// Meta control for hiding all pads
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if( !aView->IsLayerVisible( LAYER_PADS ) )
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return HIDE;
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// Handle board visibility (unless printing)
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if( board && !aView->GetPrintMode() )
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visible = board->GetVisibleLayers() & board->GetEnabledLayers();
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// Handle Render tab switches
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if( ( GetAttribute() == PAD_ATTRIB_PTH || GetAttribute() == PAD_ATTRIB_NPTH )
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&& !aView->IsLayerVisible( LAYER_PADS_TH ) )
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@ -1258,14 +1252,30 @@ double PAD::ViewGetLOD( int aLayer, KIGFX::VIEW* aView ) const
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if( IsBackLayer( (PCB_LAYER_ID) aLayer ) && !aView->IsLayerVisible( LAYER_PAD_BK ) )
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return HIDE;
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if( IsNetnameLayer( aLayer ) )
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if( aLayer == LAYER_PADS_TH )
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{
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if( !FlashLayer( visible ) )
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return HIDE;
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}
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else if( IsHoleLayer( aLayer ) )
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{
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if( !( visible & LSET::PhysicalLayersMask() ).any() )
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return HIDE;
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}
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else if( IsNetnameLayer( aLayer ) )
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{
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// Hide netnames unless pad is flashed to a high-contrast layer
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if( renderSettings->GetHighContrast() )
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{
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// Hide netnames unless pad is flashed to a high-contrast layer
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if( !FlashLayer( renderSettings->GetPrimaryHighContrastLayer() ) )
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return HIDE;
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}
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else
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{
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// Hide netnames unless pad is flashed to a visible layer
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if( !FlashLayer( visible ) )
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return HIDE;
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}
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// Netnames will be shown only if zoom is appropriate
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int divisor = std::min( GetBoundingBox().GetWidth(), GetBoundingBox().GetHeight() );
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@ -233,9 +233,7 @@ COLOR4D PCB_RENDER_SETTINGS::GetColor( const VIEW_ITEM* aItem, int aLayer ) cons
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if( aLayer == LAYER_MARKER_SHADOWS )
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return m_backgroundColor.WithAlpha( 0.6 );
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if( aLayer == LAYER_PAD_PLATEDHOLES
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|| aLayer == LAYER_NON_PLATEDHOLES
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|| aLayer == LAYER_VIA_HOLES )
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if( IsHoleLayer( aLayer ) )
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{
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// Careful that we don't end up with the same colour for the annular ring and the hole
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// when printing in B&W.
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@ -596,46 +596,48 @@ double VIA::ViewGetLOD( int aLayer, KIGFX::VIEW* aView ) const
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PCB_PAINTER* painter = static_cast<PCB_PAINTER*>( aView->GetPainter() );
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PCB_RENDER_SETTINGS* renderSettings = painter->GetSettings();
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BOARD* board = GetBoard();
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LSET visible = LSET::AllLayersMask();
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if( IsNetnameLayer( aLayer ) )
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// Meta control for hiding all vias
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if( !aView->IsLayerVisible( LAYER_VIAS ) )
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return HIDE;
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// Handle board visibility (unless printing)
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if( board && !aView->GetPrintMode() )
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visible = board->GetVisibleLayers() & board->GetEnabledLayers();
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if( IsViaPadLayer( aLayer ) )
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{
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if( !FlashLayer( visible ) )
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return HIDE;
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}
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else if( IsHoleLayer( aLayer ) )
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{
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if( !( visible & LSET::PhysicalLayersMask() ).any() )
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return HIDE;
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}
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else if( IsNetnameLayer( aLayer ) )
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{
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// Show netnames only if via is flashed to a high-contrast layer
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if( renderSettings->GetHighContrast() )
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{
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// Hide netnames unless via is flashed to a high-contrast layer
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if( !FlashLayer( renderSettings->GetPrimaryHighContrastLayer() ) )
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return HIDE;
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}
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else
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{
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// Hide netnames unless pad is flashed to a visible layer
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if( !FlashLayer( visible ) )
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return HIDE;
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}
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// Netnames will be shown only if zoom is appropriate
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return m_Width == 0 ? HIDE : ( (double)Millimeter2iu( 10 ) / m_Width );
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}
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bool onVisibleLayer = false;
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PCB_LAYER_ID top;
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PCB_LAYER_ID bottom;
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LayerPair( &top, &bottom );
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for( int layer = top; layer <= bottom; ++layer )
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{
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if( aView->IsLayerVisible( layer ) )
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{
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onVisibleLayer = true;
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break;
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}
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}
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// Draw through vias unconditionally if the vias control is turned on.
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// Draw blind/buried/microvias only if at least one of the layers crossed is enabeld.
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if( aView->IsLayerVisible( LAYER_VIAS ) )
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{
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if( !onVisibleLayer && m_viaType != VIATYPE::THROUGH )
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return HIDE;
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return aView->IsLayerVisible( LAYER_VIAS ) ? 0.0 : HIDE;
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}
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return HIDE;
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// Passed all tests; show.
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return 0.0;
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}
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