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Make sure Use-Netclasses checkbox gets set when loading dialog. 

Fixes https://gitlab.com/kicad/code/kicad/-/issues/16110
This commit is contained in:
Jeff Young 2023-11-18 12:17:44 +00:00
parent b108e7058b
commit 21d53d0b86
3 changed files with 101 additions and 28 deletions
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54
pcbnew/dialogs/dialog_track_via_properties.cpp
View File

@ -101,6 +101,8 @@ DIALOG_TRACK_VIA_PROPERTIES::DIALOG_TRACK_VIA_PROPERTIES( PCB_BASE_FRAME* aParen
bool nets = false; bool nets = false;
int net = 0; int net = 0;
bool tracksMatchNetclassValues = true;
bool viasMatchNetclassValues = true;
bool hasLocked = false; bool hasLocked = false;
bool hasUnlocked = false; bool hasUnlocked = false;
@ -176,6 +178,16 @@ DIALOG_TRACK_VIA_PROPERTIES::DIALOG_TRACK_VIA_PROPERTIES( PCB_BASE_FRAME* aParen
track_selection_layer = UNDEFINED_LAYER; track_selection_layer = UNDEFINED_LAYER;
} }
if( tracksMatchNetclassValues )
{
MINOPTMAX<int> constraint = t->GetWidthConstraint();
if( constraint.HasOpt() )
tracksMatchNetclassValues &= constraint.Opt() == t->GetWidth();
else if( constraint.Min() > 0 )
tracksMatchNetclassValues &= constraint.Min() == t->GetWidth();
}
if( t->IsLocked() ) if( t->IsLocked() )
hasLocked = true; hasLocked = true;
else else
@ -273,6 +285,23 @@ DIALOG_TRACK_VIA_PROPERTIES::DIALOG_TRACK_VIA_PROPERTIES( PCB_BASE_FRAME* aParen
} }
} }
if( viasMatchNetclassValues )
{
MINOPTMAX<int> constraint = v->GetWidthConstraint();
if( constraint.HasOpt() )
viasMatchNetclassValues &= constraint.Opt() == v->GetWidth();
else if( constraint.Min() > 0 )
viasMatchNetclassValues &= constraint.Min() == v->GetWidth();
constraint = v->GetDrillConstraint();
if( constraint.HasOpt() )
viasMatchNetclassValues &= constraint.Opt() == v->GetDrillValue();
else if( constraint.Min() > 0 )
viasMatchNetclassValues &= constraint.Min() == v->GetDrillValue();
}
if( v->IsLocked() ) if( v->IsLocked() )
hasLocked = true; hasLocked = true;
else else
@ -349,6 +378,18 @@ DIALOG_TRACK_VIA_PROPERTIES::DIALOG_TRACK_VIA_PROPERTIES( PCB_BASE_FRAME* aParen
m_DesignRuleViasUnit->SetLabel( EDA_UNIT_UTILS::GetLabel( m_frame->GetUserUnits() ) ); m_DesignRuleViasUnit->SetLabel( EDA_UNIT_UTILS::GetLabel( m_frame->GetUserUnits() ) );
if( viasMatchNetclassValues )
{
m_viaDesignRules->SetValue( true );
m_DesignRuleVias->Enable( false );
m_DesignRuleViasCtrl->Enable( false );
m_DesignRuleViasUnit->Enable( false );
m_viaDiameter.Enable( false );
m_viaDrill.Enable( false );
}
else
{
int viaSelection = wxNOT_FOUND; int viaSelection = wxNOT_FOUND;
// 0 is the netclass place-holder // 0 is the netclass place-holder
@ -369,6 +410,7 @@ DIALOG_TRACK_VIA_PROPERTIES::DIALOG_TRACK_VIA_PROPERTIES( PCB_BASE_FRAME* aParen
} }
m_DesignRuleViasCtrl->SetSelection( viaSelection ); m_DesignRuleViasCtrl->SetSelection( viaSelection );
}
m_ViaTypeChoice->Enable(); m_ViaTypeChoice->Enable();
@ -396,6 +438,17 @@ DIALOG_TRACK_VIA_PROPERTIES::DIALOG_TRACK_VIA_PROPERTIES( PCB_BASE_FRAME* aParen
{ {
m_DesignRuleWidthsUnits->SetLabel( EDA_UNIT_UTILS::GetLabel( m_frame->GetUserUnits() ) ); m_DesignRuleWidthsUnits->SetLabel( EDA_UNIT_UTILS::GetLabel( m_frame->GetUserUnits() ) );
if( tracksMatchNetclassValues )
{
m_trackDesignRules->SetValue( true );
m_DesignRuleWidths->Enable( false );
m_DesignRuleWidthsCtrl->Enable( false );
m_DesignRuleWidthsUnits->Enable( false );
m_trackWidth.Enable( false );
}
else
{
int widthSelection = wxNOT_FOUND; int widthSelection = wxNOT_FOUND;
// 0 is the netclass place-holder // 0 is the netclass place-holder
@ -411,6 +464,7 @@ DIALOG_TRACK_VIA_PROPERTIES::DIALOG_TRACK_VIA_PROPERTIES( PCB_BASE_FRAME* aParen
m_DesignRuleWidthsCtrl->SetSelection( widthSelection ); m_DesignRuleWidthsCtrl->SetSelection( widthSelection );
} }
}
else else
{ {
m_MainSizer->Hide( m_sbTrackSizer, true ); m_MainSizer->Hide( m_sbTrackSizer, true );

18
pcbnew/pcb_track.cpp
View File

@ -320,6 +320,24 @@ MINOPTMAX<int> PCB_TRACK::GetWidthConstraint( wxString* aSource ) const
} }
MINOPTMAX<int> PCB_VIA::GetWidthConstraint( wxString* aSource ) const
{
DRC_CONSTRAINT constraint;
if( GetBoard() && GetBoard()->GetDesignSettings().m_DRCEngine )
{
BOARD_DESIGN_SETTINGS& bds = GetBoard()->GetDesignSettings();
constraint = bds.m_DRCEngine->EvalRules( VIA_DIAMETER_CONSTRAINT, this, nullptr, m_layer );
}
if( aSource )
*aSource = constraint.GetName();
return constraint.Value();
}
MINOPTMAX<int> PCB_VIA::GetDrillConstraint( wxString* aSource ) const MINOPTMAX<int> PCB_VIA::GetDrillConstraint( wxString* aSource ) const
{ {
DRC_CONSTRAINT constraint; DRC_CONSTRAINT constraint;

5
pcbnew/pcb_track.h
View File

@ -197,7 +197,7 @@ public:
*/ */
int GetLocalClearance( wxString* aSource ) const override; int GetLocalClearance( wxString* aSource ) const override;
MINOPTMAX<int> GetWidthConstraint( wxString* aSource = nullptr ) const; virtual MINOPTMAX<int> GetWidthConstraint( wxString* aSource = nullptr ) const;
wxString GetItemDescription( UNITS_PROVIDER* aUnitsProvider ) const override; wxString GetItemDescription( UNITS_PROVIDER* aUnitsProvider ) const override;
@ -417,6 +417,7 @@ public:
std::shared_ptr<SHAPE_SEGMENT> GetEffectiveHoleShape() const override; std::shared_ptr<SHAPE_SEGMENT> GetEffectiveHoleShape() const override;
MINOPTMAX<int> GetWidthConstraint( wxString* aSource = nullptr ) const override;
MINOPTMAX<int> GetDrillConstraint( wxString* aSource = nullptr ) const; MINOPTMAX<int> GetDrillConstraint( wxString* aSource = nullptr ) const;
bool IsTented() const override; bool IsTented() const override;
@ -556,7 +557,7 @@ public:
int GetDrill() const { return m_drill; } int GetDrill() const { return m_drill; }
/** /**
* Calculate the drill value for vias (m-Drill if > 0, or default drill value for the board. * Calculate the drill value for vias (m_drill if > 0, or default drill value for the board).
* *
* @return the calculated drill value. * @return the calculated drill value.
*/ */