Display via net labels on top
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@ -751,7 +751,8 @@ inline int GetNetnameLayer( int aLayer )
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return LAYER_PAD_FR_NETNAMES;
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else if( aLayer == LAYER_PAD_BK )
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return LAYER_PAD_BK_NETNAMES;
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// fixme :via names
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else if( aLayer >= LAYER_VIA_MICROVIA && aLayer <= LAYER_VIA_THROUGH )
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return LAYER_VIAS_NETNAMES;
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// Fallback
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return Cmts_User;
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@ -990,7 +990,7 @@ void VIA::Draw( EDA_DRAW_PANEL* panel, wxDC* aDC, GR_DRAWMODE aDrawMode, const w
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void VIA::ViewGetLayers( int aLayers[], int& aCount ) const
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{
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aLayers[0] = LAYER_VIAS_HOLES;
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aLayers[1] = GetNetnameLayer( m_Layer );
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aLayers[1] = LAYER_VIAS_NETNAMES;
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aCount = 3;
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// Just show it on common via & via holes layers
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@ -1012,7 +1012,8 @@ void VIA::ViewGetLayers( int aLayers[], int& aCount ) const
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break;
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default:
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assert( false );
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aLayers[2] = LAYER_GP_OVERLAY;
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wxASSERT( false );
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break;
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}
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}
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@ -42,9 +42,9 @@ using namespace std::placeholders;
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const LAYER_NUM GAL_LAYER_ORDER[] =
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{
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LAYER_GP_OVERLAY ,
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LAYER_GP_OVERLAY,
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LAYER_DRC,
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LAYER_PADS_NETNAMES,
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LAYER_PADS_NETNAMES, LAYER_VIAS_NETNAMES,
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Dwgs_User, Cmts_User, Eco1_User, Eco2_User, Edge_Cuts,
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LAYER_MOD_TEXT_FR,
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@ -194,10 +194,10 @@ void PCB_DRAW_PANEL_GAL::SetHighContrastLayer( PCB_LAYER_ID aLayer )
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// fixme do not like the idea of storing the list of layers here,
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// should be done in some other way I guess..
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LAYER_NUM layers[] = {
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GetNetnameLayer( aLayer ), LAYER_VIA_THROUGH,
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LAYER_VIAS_HOLES, LAYER_PADS,
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LAYER_PADS_HOLES, LAYER_NON_PLATED, LAYER_PADS_NETNAMES,
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LAYER_GP_OVERLAY, LAYER_RATSNEST
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GetNetnameLayer( aLayer ),
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LAYER_VIA_THROUGH, LAYER_VIAS_HOLES, LAYER_VIAS_NETNAMES,
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LAYER_PADS, LAYER_PADS_HOLES, LAYER_PADS_NETNAMES,
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LAYER_NON_PLATED, LAYER_GP_OVERLAY, LAYER_RATSNEST
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};
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for( unsigned int i = 0; i < sizeof( layers ) / sizeof( LAYER_NUM ); ++i )
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@ -230,10 +230,9 @@ void PCB_DRAW_PANEL_GAL::SetTopLayer( PCB_LAYER_ID aLayer )
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// Layers that should always have on-top attribute enabled
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const LAYER_NUM layers[] = {
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LAYER_VIA_THROUGH,
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LAYER_VIAS_HOLES, LAYER_PADS,
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LAYER_PADS_HOLES, LAYER_NON_PLATED, LAYER_PADS_NETNAMES,
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LAYER_GP_OVERLAY, LAYER_RATSNEST, Dwgs_User,
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LAYER_VIA_THROUGH, LAYER_VIAS_HOLES, LAYER_VIAS_NETNAMES,
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LAYER_PADS, LAYER_PADS_HOLES, LAYER_PADS_NETNAMES,
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LAYER_NON_PLATED, LAYER_GP_OVERLAY, LAYER_RATSNEST, Dwgs_User,
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LAYER_DRC
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};
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@ -401,6 +400,7 @@ void PCB_DRAW_PANEL_GAL::setDefaultLayerDeps()
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// Some more required layers settings
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m_view->SetRequired( LAYER_VIAS_HOLES, LAYER_VIA_THROUGH );
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m_view->SetRequired( LAYER_VIAS_NETNAMES, LAYER_VIA_THROUGH );
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m_view->SetRequired( LAYER_PADS_HOLES, LAYER_PADS );
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m_view->SetRequired( LAYER_NON_PLATED, LAYER_PADS );
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m_view->SetRequired( LAYER_PADS_NETNAMES, LAYER_PADS );
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@ -393,11 +393,6 @@ void PCB_PAINTER::draw( const VIA* aVia, int aLayer )
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VECTOR2D center( aVia->GetStart() );
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double radius = 0.0;
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// Only draw the via if at least one of the layers it crosses is being displayed
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BOARD* brd = aVia->GetBoard( );
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if( !( brd->GetVisibleLayers() & aVia->GetLayerSet() ).any() )
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return;
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// Draw description layer
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if( IsNetnameLayer( aLayer ) )
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{
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@ -418,14 +413,8 @@ void PCB_PAINTER::draw( const VIA* aVia, int aLayer )
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m_gal->Translate( position );
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// Default font settings
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m_gal->SetHorizontalJustify( GR_TEXT_HJUSTIFY_CENTER );
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m_gal->SetVerticalJustify( GR_TEXT_VJUSTIFY_CENTER );
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m_gal->SetFontBold( false );
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m_gal->SetFontItalic( false );
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m_gal->SetTextMirrored( false );
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m_gal->ResetTextAttributes();
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m_gal->SetStrokeColor( m_pcbSettings.GetColor( NULL, aLayer ) );
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m_gal->SetIsStroke( true );
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m_gal->SetIsFill( false );
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// Set the text position to the pad shape position (the pad position is not the best place)
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VECTOR2D textpos( 0.0, 0.0 );
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@ -450,7 +439,6 @@ void PCB_PAINTER::draw( const VIA* aVia, int aLayer )
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return;
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}
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// Choose drawing settings depending on if we are drawing via's pad or hole
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if( aLayer == LAYER_VIAS_HOLES )
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radius = aVia->GetDrillValue() / 2.0;
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