Don't do any hole clearance testing within a single footprint.
Fixes https://gitlab.com/kicad/code/kicad/issues/8141
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@ -509,9 +509,8 @@ bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( PAD* pad, SHAPE* pa
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if( fp->IsNetTie() && ( other->Type() == PCB_FP_SHAPE_T || other->Type() == PCB_PAD_T ) )
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testClearance = false;
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// CADSTAR implements thermal vias using pads insteads of vias
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if( fp->AllowThermalPads() && other->Type() == PCB_PAD_T )
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testHoles = false;
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// No hole testing within a footprint
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testHoles = false;
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}
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if( pad->GetAttribute() == PAD_ATTRIB_NPTH && !pad->FlashLayer( layer ) )
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@ -241,12 +241,6 @@ public:
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return GetKeywords().StartsWith( wxT( "net tie" ) );
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}
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// Might as well keep all the hacks in the same place....
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bool AllowThermalPads() const
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{
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return GetKeywords().StartsWith( wxT( "allow thermal pads" ) );
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}
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void Move( const wxPoint& aMoveVector ) override;
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void Rotate( const wxPoint& aRotCentre, double aAngle ) override;
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@ -655,7 +655,6 @@ void CADSTAR_PCB_ARCHIVE_LOADER::loadComponentLibrary()
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wxT( "" ) );
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FOOTPRINT* footprint = new FOOTPRINT( m_board );
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footprint->SetPosition( getKiCadPoint( component.Origin ) );
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footprint->SetKeywords( wxT( "allow thermal pads" ) );
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LIB_ID libID;
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libID.Parse( fpName, true );
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