Better reporting of hole-to-hole clearances and clearance resolutions.
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e0f6a6e475
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2d68cdff94
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@ -593,7 +593,8 @@ void DIALOG_DRC::OnDRCItemRClick( wxDataViewEvent& aEvent )
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if( rcItem->GetErrorCode() == DRCE_CLEARANCE
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if( rcItem->GetErrorCode() == DRCE_CLEARANCE
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|| rcItem->GetErrorCode() == DRCE_EDGE_CLEARANCE
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|| rcItem->GetErrorCode() == DRCE_EDGE_CLEARANCE
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|| rcItem->GetErrorCode() == DRCE_HOLE_CLEARANCE )
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|| rcItem->GetErrorCode() == DRCE_HOLE_CLEARANCE
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|| rcItem->GetErrorCode() == DRCE_DRILLED_HOLES_TOO_CLOSE )
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{
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{
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menu.Append( 3, _( "Run clearance resolution tool..." ) );
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menu.Append( 3, _( "Run clearance resolution tool..." ) );
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}
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}
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@ -643,6 +643,33 @@ DRC_CONSTRAINT DRC_ENGINE::EvalZoneConnection( const BOARD_ITEM* a, const BOARD_
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}
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}
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bool hasDrilledHole( const BOARD_ITEM* aItem )
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{
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if( !aItem->HasHole() )
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return false;
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switch( aItem->Type() )
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{
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case PCB_VIA_T:
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{
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const PCB_VIA* via = static_cast<const PCB_VIA*>( aItem );
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return via->GetViaType() == VIATYPE::THROUGH;
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}
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case PCB_PAD_T:
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{
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const PAD* pad = static_cast<const PAD*>( aItem );
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return pad->GetDrillSizeX() == pad->GetDrillSizeY();
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}
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default:
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return false;
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}
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}
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DRC_CONSTRAINT DRC_ENGINE::EvalRules( DRC_CONSTRAINT_T aConstraintType, const BOARD_ITEM* a,
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DRC_CONSTRAINT DRC_ENGINE::EvalRules( DRC_CONSTRAINT_T aConstraintType, const BOARD_ITEM* a,
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const BOARD_ITEM* b, PCB_LAYER_ID aLayer,
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const BOARD_ITEM* b, PCB_LAYER_ID aLayer,
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REPORTER* aReporter )
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REPORTER* aReporter )
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@ -901,6 +928,7 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRules( DRC_CONSTRAINT_T aConstraintType, const BO
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case DIFF_PAIR_GAP_CONSTRAINT:
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case DIFF_PAIR_GAP_CONSTRAINT:
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case LENGTH_CONSTRAINT:
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case LENGTH_CONSTRAINT:
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case CONNECTION_WIDTH_CONSTRAINT:
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case CONNECTION_WIDTH_CONSTRAINT:
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case HOLE_TO_HOLE_CONSTRAINT:
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{
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{
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if( aReporter )
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if( aReporter )
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{
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{
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@ -993,6 +1021,12 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRules( DRC_CONSTRAINT_T aConstraintType, const BO
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break;
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break;
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case HOLE_TO_HOLE_CONSTRAINT:
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REPORT( wxString::Format( _( "Checking board setup constraints "
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"hole to hole: min %s." ),
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min ) )
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break;
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default:
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default:
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REPORT( wxString::Format( _( "Checking %s." ),
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REPORT( wxString::Format( _( "Checking %s." ),
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EscapeHTML( c->constraint.GetName() ) ) )
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EscapeHTML( c->constraint.GetName() ) ) )
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@ -1136,7 +1170,21 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRules( DRC_CONSTRAINT_T aConstraintType, const BO
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return false;
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return false;
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}
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}
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if( !c->condition || c->condition->GetExpression().IsEmpty() )
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if( c->constraint.m_Type == HOLE_TO_HOLE_CONSTRAINT
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&& ( !hasDrilledHole( a ) || !hasDrilledHole( b ) ) )
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{
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// Report non-drilled-holes as an implicit condition
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if( aReporter )
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{
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const BOARD_ITEM* x = !hasDrilledHole( a ) ? a : b;
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REPORT( wxString::Format( _( "%s is not a drilled hole; rule ignored." ),
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x->GetSelectMenuText( UNITS ) ) )
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}
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return false;
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}
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else if( !c->condition || c->condition->GetExpression().IsEmpty() )
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{
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{
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if( aReporter )
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if( aReporter )
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{
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{
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@ -1217,15 +1217,13 @@ wxString PAD::GetSelectMenuText( EDA_UNITS aUnits ) const
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GetParent()->GetReference(),
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GetParent()->GetReference(),
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layerMaskDescribe() );
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layerMaskDescribe() );
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}
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}
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else if( GetAttribute() == PAD_ATTRIB::NPTH && !FlashLayer( F_Cu ) )
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else if( GetAttribute() == PAD_ATTRIB::NPTH )
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{
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{
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return wxString::Format( _( "Through hole pad %s of %s" ),
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return wxString::Format( _( "NPTH pad of %s" ), GetParent()->GetReference() );
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wxT( "(" ) + _( "NPTH, Mechanical" ) + wxT( ")" ),
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GetParent()->GetReference() );
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}
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}
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else
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else
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{
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{
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return wxString::Format( _( "Through hole pad %s of %s" ),
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return wxString::Format( _( "PTH pad %s of %s" ),
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GetNetnameMsg(),
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GetNetnameMsg(),
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GetParent()->GetReference() );
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GetParent()->GetReference() );
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}
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}
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@ -1240,15 +1238,13 @@ wxString PAD::GetSelectMenuText( EDA_UNITS aUnits ) const
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GetParent()->GetReference(),
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GetParent()->GetReference(),
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layerMaskDescribe() );
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layerMaskDescribe() );
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}
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}
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else if( GetAttribute() == PAD_ATTRIB::NPTH && !FlashLayer( F_Cu ) )
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else if( GetAttribute() == PAD_ATTRIB::NPTH )
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{
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{
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return wxString::Format( _( "Through hole pad %s of %s" ),
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return wxString::Format( _( "NPTH of %s" ), GetParent()->GetReference() );
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wxT( "(" ) + _( "NPTH, Mechanical" ) + wxT( ")" ),
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GetParent()->GetReference() );
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}
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}
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else
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else
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{
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{
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return wxString::Format( _( "Through hole pad %s %s of %s" ),
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return wxString::Format( _( "PTH pad %s %s of %s" ),
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GetNumber(),
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GetNumber(),
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GetNetnameMsg(),
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GetNetnameMsg(),
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GetParent()->GetReference() );
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GetParent()->GetReference() );
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@ -141,6 +141,13 @@ DRC_ENGINE BOARD_INSPECTION_TOOL::makeDRCEngine( bool* aCompileError, bool* aCou
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}
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}
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bool isNPTHPad( BOARD_ITEM* aItem )
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{
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return aItem->Type() == PCB_PAD_T
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&& static_cast<PAD*>( aItem )->GetAttribute() == PAD_ATTRIB::NPTH;
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}
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wxString BOARD_INSPECTION_TOOL::getItemDescription( BOARD_ITEM* aItem )
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wxString BOARD_INSPECTION_TOOL::getItemDescription( BOARD_ITEM* aItem )
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{
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{
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// Null items have no description
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// Null items have no description
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@ -149,9 +156,10 @@ wxString BOARD_INSPECTION_TOOL::getItemDescription( BOARD_ITEM* aItem )
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wxString s = aItem->GetSelectMenuText( m_frame->GetUserUnits() );
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wxString s = aItem->GetSelectMenuText( m_frame->GetUserUnits() );
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if( aItem->IsConnected() )
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if( aItem->IsConnected() && !isNPTHPad( aItem ) )
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{
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{
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BOARD_CONNECTED_ITEM* cItem = static_cast<BOARD_CONNECTED_ITEM*>( aItem );
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BOARD_CONNECTED_ITEM* cItem = static_cast<BOARD_CONNECTED_ITEM*>( aItem );
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s += wxS( " " ) + wxString::Format( _( "[netclass %s]" ),
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s += wxS( " " ) + wxString::Format( _( "[netclass %s]" ),
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cItem->GetEffectiveNetClass()->GetName() );
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cItem->GetEffectiveNetClass()->GetName() );
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}
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}
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@ -423,6 +431,21 @@ void BOARD_INSPECTION_TOOL::InspectDRCError( const std::shared_ptr<RC_ITEM>& aDR
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break;
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break;
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case DRCE_DRILLED_HOLES_TOO_CLOSE:
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r = m_inspectClearanceDialog->AddPage( _( "Hole to Hole" ) );
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reportHeader( _( "Hole to hole clearance resolution for:" ), a, b, r );
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if( compileError )
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reportCompileError( r );
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constraint = drcEngine.EvalRules( HOLE_TO_HOLE_CONSTRAINT, a, b, UNDEFINED_LAYER, r );
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clearance = constraint.m_Value.Min();
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clearanceStr = StringFromValue( r->GetUnits(), clearance, true );
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r->Report( "" );
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r->Report( wxString::Format( _( "Resolved clearance: %s." ), clearanceStr ) );
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break;
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case DRCE_EDGE_CLEARANCE:
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case DRCE_EDGE_CLEARANCE:
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r = m_inspectClearanceDialog->AddPage( _( "Edge Clearance" ) );
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r = m_inspectClearanceDialog->AddPage( _( "Edge Clearance" ) );
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reportHeader( _( "Edge clearance resolution for:" ), a, b, r );
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reportHeader( _( "Edge clearance resolution for:" ), a, b, r );
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@ -881,6 +904,7 @@ int BOARD_INSPECTION_TOOL::InspectClearance( const TOOL_EVENT& aEvent )
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if( a->HasHole() || b->HasHole() )
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if( a->HasHole() || b->HasHole() )
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{
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{
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PCB_LAYER_ID layer = UNDEFINED_LAYER;
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PCB_LAYER_ID layer = UNDEFINED_LAYER;
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bool pageAdded = false;
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if( a->HasHole() && b->IsOnLayer( active ) && IsCopperLayer( active ) )
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if( a->HasHole() && b->IsOnLayer( active ) && IsCopperLayer( active ) )
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layer = active;
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layer = active;
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@ -893,7 +917,18 @@ int BOARD_INSPECTION_TOOL::InspectClearance( const TOOL_EVENT& aEvent )
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if( layer >= 0 )
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if( layer >= 0 )
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{
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{
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r = m_inspectClearanceDialog->AddPage( _( "Hole" ) );
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if( !pageAdded )
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{
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r = m_inspectClearanceDialog->AddPage( _( "Hole" ) );
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pageAdded = true;
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}
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else
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{
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r->Report( "" );
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r->Report( "" );
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r->Report( "" );
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}
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reportHeader( _( "Hole clearance resolution for:" ), a, b, layer, r );
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reportHeader( _( "Hole clearance resolution for:" ), a, b, layer, r );
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constraint = drcEngine.EvalRules( HOLE_CLEARANCE_CONSTRAINT, a, b, layer, r );
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constraint = drcEngine.EvalRules( HOLE_CLEARANCE_CONSTRAINT, a, b, layer, r );
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@ -908,6 +943,35 @@ int BOARD_INSPECTION_TOOL::InspectClearance( const TOOL_EVENT& aEvent )
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r->Flush();
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r->Flush();
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}
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}
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if( a->HasHole() && b->HasHole() )
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{
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if( !pageAdded )
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{
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r = m_inspectClearanceDialog->AddPage( _( "Hole" ) );
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pageAdded = true;
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}
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else
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{
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r->Report( "" );
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r->Report( "" );
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r->Report( "" );
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}
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reportHeader( _( "Hole to hole clearance resolution for:" ), a, b, r );
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constraint = drcEngine.EvalRules( HOLE_TO_HOLE_CONSTRAINT, a, b, UNDEFINED_LAYER, r );
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clearance = constraint.m_Value.Min();
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if( compileError )
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reportCompileError( r );
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r->Report( "" );
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r->Report( wxString::Format( _( "Resolved clearance: %s." ),
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StringFromValue( units, clearance, true ) ) );
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r->Flush();
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}
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}
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}
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for( PCB_LAYER_ID edgeLayer : { Edge_Cuts, Margin } )
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for( PCB_LAYER_ID edgeLayer : { Edge_Cuts, Margin } )
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